Trademark applications and grants for Saigal, Dinesh. Saigal, Dinesh has 1 trademark applications. The latest application filed is for "ARTNINDIA"
Entity Type | INDIVIDUAL |
Address | 3287 MIRAGE WAY San Jose, CALIFORNIA UNITED STATES 95135 |
Patent Application | Date |
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INTERNET-BASED SEMICONDUCTOR MANUFACTURING EQUIPMENT HEALTH AND DIAGNOSTICS MONITORING 20190196461 - 16/227795 SAIGAL; DINESH ;   et al. | 2019-06-27 |
PVD BUFFER LAYERS FOR LED FABRICATION 20160293798 - 15/183594 Zhu; Mingwei ;   et al. | 2016-10-06 |
PVD BUFFER LAYERS FOR LED FABRICATION 20130285065 - 13/868385 Zhu; Mingwei ;   et al. | 2013-10-31 |
Pulsed magnetron for sputter deposition 20050247554 - 11/064689 Saigal, Dinesh ;   et al. | 2005-11-10 |
Pulsed magnetron for sputter deposition 20040112735 - 10/322230 Saigal, Dinesh ;   et al. | 2004-06-17 |
PVD buffer layers for LED fabrication 11,011,676 - 15/183,594 Zhu , et al. May 18, 2 | 2021-05-18 |
PVD buffer layers for LED fabrication 9,396,933 - 13/868,385 Zhu , et al. July 19, 2 | 2016-07-19 |
PVD buffer layers for LED fabrication 9,396,933 - 13/868,385 Zhu , et al. July 19, 2 | 2016-07-19 |
Method for high temperature metal deposition for reducing lateral silicidation 6,579,783 - 09/900,759 Saigal , et al. June 17, 2 | 2003-06-17 |
Physical vapor deposition apparatus with deposition and DC target power control 6,454,919 - 09/672,226 Sundarrajan , et al. September 24, 2 | 2002-09-24 |
Mark Image Registration | Serial | Trademark Application Date |
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![]() "ARTNINDIA" 97101388 |
ARTNINDIA 2021-10-31 |
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