Saenz; Juan

Patent Applications and Registrations

Patent applications and USPTO patent grants for Saenz; Juan.The latest application filed is for "reram read state verification based on cell turn-on characteristics".

Company Profile

5.8.9

Saenz; Juan - Menlo Park CA
Saenz; Juan - Mountain View CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Trademarks

Patent Activity

Patent	Date
Apparatus and method for identifying memory cells for data refresh based on monitor cell in a resistive memory device Grant 10,319,437 - Saenz , et al.	2019-06-11
Methods and apparatus for three-dimensional nonvolatile memory Grant 10,283,567 - Saenz , et al.	2019-05-07
Methods and apparatus for three-dimensional nonvolatile memory Grant 10,283,708 - Wu , et al.	2019-05-07
ReRAM read state verification based on cell turn-on characteristics Grant 10,256,402 - Rajamohanan , et al.	2019-04-09
Reram Read State Verification Based On Cell Turn-on Characteristics App 20190097132 - RAJAMOHANAN; Bijesh ; et al.	2019-03-28
Identifying Non-volatile Memory Cells For Data Refresh App 20190088315 - Saenz; Juan ; et al.	2019-03-21
Germanium-based Barrier Modulated Cell App 20180358550 - Kamalanathan; Deepak ; et al.	2018-12-13
Germanium-based barrier modulated cell Grant 10,153,430 - Kamalanathan , et al. Dec	2018-12-11
Methods And Apparatus For Three-dimensional Nonvolatile Memory App 20180315794 - Kamalanathan; Deepak ; et al.	2018-11-01
Methods And Apparatus For Three-dimensional Nonvolatile Memory App 20180261766 - Wu; Ming-Che ; et al.	2018-09-13
Methods And Apparatus For Three-dimensional Nonvolatile Memory App 20180247975 - Saenz; Juan ; et al.	2018-08-30
Multi-gate vertical field effect transistor with channel strips laterally confined by gate dielectric layers, and method of making thereof Grant 10,032,908 - Ratnam , et al. July 24, 2	2018-07-24
Multi-gate Vertical Field Effect Transistor With Channel Strips Laterally Confined By Gate Dielectric Layers, And Method Of Making Thereof App 20180197988 - RATNAM; Perumal ; et al.	2018-07-12
Methods And Apparatus For Three-dimensional Nonvolatile Memory App 20180166559 - Zhou; Guangle ; et al.	2018-06-14
Filament confinement in reversible resistance-switching memory elements Grant 9,805,793 - Rajamohanan , et al. October 31, 2	2017-10-31
Filament Confinement In Reversible Resistance-switching Memory Elements App 20170287557 - Rajamohanan; Bijesh ; et al.	2017-10-05
Controlling memory cell size in three dimensional nonvolatile memory Grant 9,741,768 - Melik-Martirosian , et al. August 22, 2	2017-08-22

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