| Patent | Date |
|---|
Carbon, Nitrogen And/or Fluorine Co-implants For Low Resistance Transistors
App 20220208973 - Nandakumar; Mahalingam ; et al. | 2022-06-30 |
Bipolar Junction Transistor With Constricted Collector Region Having High Gain And Early Voltage Product
App 20220093737 - Sadovnikov; Alexei ; et al. | 2022-03-24 |
Bcd Ic With Gate Etch And Self-aligned Implant Integration
App 20220068649 - Eissa; Mona M. ; et al. | 2022-03-03 |
MOS Transistor with Folded Channel and Folded Drift Region
App 20220037468 - Haynie; Sheldon Douglas ; et al. | 2022-02-03 |
Bipolar junction transistor with constricted collector region having high gain and early voltage product
Grant 11,217,665 - Sadovnikov , et al. January 4, 2 | 2022-01-04 |
Semiconductor device with deep trench isolation and trench capacitor
Grant 11,195,958 - Hu , et al. December 7, 2 | 2021-12-07 |
Fabricating Transistors With Implanting Dopants At First And Second Dosages In The Collector Region To Form The Base Region
App 20210343860 - SADOVNIKOV; Alexei ; et al. | 2021-11-04 |
Drain extended transistor
Grant 11,152,505 - Sadovnikov , et al. October 19, 2 | 2021-10-19 |
Dmos Transistor Having Thick Gate Oxide And Sti And Method Of Fabricating
App 20210280714 - Sadovnikov; Alexei ; et al. | 2021-09-09 |
Fabricating transistors with implanting dopants at first and second dosages in the collector region to form the base region
Grant 11,094,806 - Sadovnikov , et al. August 17, 2 | 2021-08-17 |
Bipolar Junction Transistor With Constricted Collector Region Having High Gain And Early Voltage Product
App 20210242308 - Sadovnikov; Alexei ; et al. | 2021-08-05 |
LDMOS with high-k drain STI dielectric
Grant 11,081,558 - Aghoram , et al. August 3, 2 | 2021-08-03 |
Bipolar Junction Transistor With Biased Structure Between Base And Emitter Regions
App 20210210625 - SADOVNIKOV; ALEXEI ; et al. | 2021-07-08 |
DMOS transistor having thick gate oxide and STI and method of fabricating
Grant 11,049,967 - Sadovnikov , et al. June 29, 2 | 2021-06-29 |
Integrated circuit with resurf region biasing under buried insulator layers
Grant 11,024,649 - Sadovnikov , et al. June 1, 2 | 2021-06-01 |
MOS transistor with folded channel and folded drift region
Grant 10,978,559 - Haynie , et al. April 13, 2 | 2021-04-13 |
Semiconductor Device With Deep Trench Isolation And Trench Capacitor
App 20210005760 - Hu; Binghua ; et al. | 2021-01-07 |
Sinker to buried layer connection region for narrow deep trenches
Grant 10,886,160 - Hu , et al. January 5, 2 | 2021-01-05 |
Semiconductor device with deep trench isolation and trench capacitor
Grant 10,811,543 - Hu , et al. October 20, 2 | 2020-10-20 |
Integrated Circuit With Resurf Region Biasing Under Buried Insulator Layers
App 20200227440 - Sadovnikov; Alexei ; et al. | 2020-07-16 |
Semiconductor Device With Deep Trench Isolation And Trench Capacitor
App 20200212229 - Hu; Binghua ; et al. | 2020-07-02 |
Ldmos With High-k Drain Sti Dielectric
App 20200212188 - Aghoram; Umamaheswari ; et al. | 2020-07-02 |
Dmos Transistor Having Thick Gate Oxide And Sti And Method Of Fabricating
App 20200144413 - Sadovnikov; Alexei ; et al. | 2020-05-07 |
Integrated circuit with resurf region biasing under buried insulator layers
Grant 10,636,815 - Sadovnikov , et al. | 2020-04-28 |
LDMOS with high-k drain STI dielectric
Grant 10,593,773 - Aghoram , et al. | 2020-03-17 |
Dual deep trenches for high voltage isolation
Grant 10,580,775 - Pendharkar , et al. | 2020-03-03 |
Drain Extended Transistor
App 20200006549 - Sadovnikov; Alexei ; et al. | 2020-01-02 |
Integrated JFET structure with implanted backgate
Grant 10,522,663 - Sadovnikov , et al. Dec | 2019-12-31 |
Integrated circuit with resurf region biasing under buried insulator layers
Grant 10,504,921 - Sadovnikov , et al. Dec | 2019-12-10 |
Integrated Circuit With Resurf Region Biasing Under Buried Insulator Layers
App 20190252410 - Sadovnikov; Alexei ; et al. | 2019-08-15 |
Fabricating Transistors With Implanting Dopants At First And Second Dosages In The Collector Region To Form The Base Region
App 20190207017 - SADOVNIKOV; Alexei ; et al. | 2019-07-04 |
Fabricating Transistors With A Dielectric Formed On A Sidewall Of A Gate Material And A Gate Oxide Before Forming Silicide
App 20190165129 - SADOVNIKOV; Alexei ; et al. | 2019-05-30 |
Method for creating the high voltage complementary BJT with lateral collector on bulk substrate with resurf effect
Grant 10,269,895 - Babcock , et al. | 2019-04-23 |
Ldmos With High-k Drain Sti Dielectric
App 20190103471 - Aghoram; Umamaheswari ; et al. | 2019-04-04 |
Sinker To Buried Layer Connection Region For Narrow Deep Trenches
App 20190096744 - HU; BINGHUA ; et al. | 2019-03-28 |
Method of improving lateral BJT characteristics in BCD technology
Grant 10,224,402 - Lavrovskaya , et al. | 2019-03-05 |
Integrated Jfet Structure With Implanted Backgate
App 20190019884 - Sadovnikov; Alexei ; et al. | 2019-01-17 |
Sinker to buried layer connection region for narrow deep trenches
Grant 10,163,680 - Hu , et al. Dec | 2018-12-25 |
Low dynamic resistance low capacitance diodes
Grant 10,153,269 - Strachan , et al. Dec | 2018-12-11 |
Integrated JFET structure with implanted backgate
Grant 10,079,294 - Sadovnikov , et al. September 18, 2 | 2018-09-18 |
Split-gate lateral extended drain MOS transistor structure and process
Grant 9,905,428 - Strachan , et al. February 27, 2 | 2018-02-27 |
Dual Deep Trenches For High Voltage Isolation
App 20180053765 - Pendharkar; Sameer ; et al. | 2018-02-22 |
Integrated Jfet Structure With Implanted Backgate
App 20170373171 - Sadovnikov; Alexei ; et al. | 2017-12-28 |
Low Dynamic Resistance Low Capacitance Diodes
App 20170345813 - Strachan; Andrew D. ; et al. | 2017-11-30 |
Method of forming a biCMOS semiconductor chip that increases the betas of the bipolar transistors
Grant 9,831,135 - Lavrovskaya , et al. November 28, 2 | 2017-11-28 |
Method For Creating The High Voltage Complementary Bjt With Lateral Collector On Bulk Substrate With Resurf Effect
App 20170309703 - BABCOCK; Jeffrey A. ; et al. | 2017-10-26 |
Dual deep trenches for high voltage isolation
Grant 9,786,665 - Pendharkar , et al. October 10, 2 | 2017-10-10 |
Low dynamic resistance low capacitance diodes
Grant 9,773,777 - Strachan , et al. September 26, 2 | 2017-09-26 |
Method for creating the high voltage complementary BJT with lateral collector on bulk substrate with resurf effect
Grant 9,741,790 - Babcock , et al. August 22, 2 | 2017-08-22 |
Low Dynamic Resistance Low Capacitance Diodes
App 20170200712 - Strachan; Andrew D. ; et al. | 2017-07-13 |
Integrated Circuit With Resurf Region Biasing Under Buried Insulator Layers
App 20170194352 - Sadovnikov; Alexei ; et al. | 2017-07-06 |
Method Of Forming A Bicmos Semiconductor Chip That Increases The Betas Of The Bipolar Transistors
App 20170140991 - Lavrovskaya; Natalia ; et al. | 2017-05-18 |
Split-gate Lateral Extended Drain Mos Transistor Structure And Process
App 20170125252 - Strachan; Andrew D. ; et al. | 2017-05-04 |
HV complementary bipolar transistors with lateral collectors on SOI with resurf regions under buried oxide
Grant 9,640,611 - Sadovnikov , et al. May 2, 2 | 2017-05-02 |
BICMOS device having commonly defined gate shield in an ED-CMOS transistor and base in a bipolar transistor
Grant 9,633,994 - Babcock , et al. April 25, 2 | 2017-04-25 |
Method of forming a gate shield in an ED-CMOS transistor and a base of a bipolar transistor using BICMOS technologies
Grant 9,633,995 - Babcock , et al. April 25, 2 | 2017-04-25 |
Method of forming a BICMOS semiconductor chip that increases the betas of the bipolar transistors
Grant 9,595,480 - Lavrovskaya , et al. March 14, 2 | 2017-03-14 |
Method For Creating The High Voltage Complementary Bjt With Lateral Collector On Bulk Substrate With Resurf Effect
App 20160233294 - BABCOCK; Jeffrey A. ; et al. | 2016-08-11 |
Method of forming a Gate Shield in an ED-CMOS Transistor and a base of a bipolar transistor using BICMOS Technologies
App 20160172245 - Babcock; Jeffrey A. ; et al. | 2016-06-16 |
Method Of Forming A Gate Shield In An Ed-cmos Transistor And A Baseof A Bipolar Transistor Using Bicmos Technologies
App 20160172355 - Babcock; Jeffrey A. ; et al. | 2016-06-16 |
Method Of Forming A Bicmos Semiconductor Chip That Increases The Betas Of The Bipolar Transistors
App 20160163598 - Lavrovskaya; Natalia ; et al. | 2016-06-09 |
Method Of Improving Lateral Bjt Characteristics In Bcd Technology
App 20160141363 - Lavrovskaya; Natalia ; et al. | 2016-05-19 |
Method for creating the high voltage complementary BJT with lateral collector on bulk substrate with resurf effect
Grant 9,343,459 - Babcock , et al. May 17, 2 | 2016-05-17 |
Method of forming a gate shield in an ED-CMOS transistor and a base of a bipolar transistor using BICMOS technologies
Grant 9,306,013 - Babcock , et al. April 5, 2 | 2016-04-05 |
Method For Creation Of The Gate Shield In Analog/rf Power Ed-cmos In Sige Bicmos Technologies
App 20150340448 - Babcock; Jeffrey A. ; et al. | 2015-11-26 |
Method For Creating The High Voltage Complementary Bjt With Lateral Collector On Bulk Substrate With Resurf Effect
App 20150287716 - Babcock; Jeffrey A. ; et al. | 2015-10-08 |
Hv Complementary Bipolar Transistors With Lateral Collectors On Soi With Resurf Regions Under Buried Oxide
App 20150270335 - Sadovnikov; Alexei ; et al. | 2015-09-24 |
DMOS transistor with a slanted super junction drift structure
Grant 8,878,295 - Hopper , et al. November 4, 2 | 2014-11-04 |
SiGe heterojunction bipolar transistor with an improved breakdown voltage-cutoff frequency product
Grant 8,648,391 - Babcock , et al. February 11, 2 | 2014-02-11 |
Sige Heterojunction Bipolar Transistor With An Improved Breakdown Voltage-cutoff Frequency Product
App 20130249057 - Babcock; Jeffrey A. ; et al. | 2013-09-26 |
Sige Heterojunction Bipolar Transistor With A Shallow Out-diffused P+ Emitter Region
App 20130248935 - Babcock; Jeffrey A. ; et al. | 2013-09-26 |
DMOS Transistor with a cavity that lies below the drift region
Grant 8,524,548 - French , et al. September 3, 2 | 2013-09-03 |
SiGe heterojunction bipolar transistor with a shallow out-diffused P+ emitter region
Grant 8,525,233 - Babcock , et al. September 3, 2 | 2013-09-03 |
DMOS Transistor with a Cavity that Lies Below the Drift Region
App 20120273881 - French; William ; et al. | 2012-11-01 |
Method for manufacturing bipolar transistors
Grant 8,298,901 - Foote , et al. October 30, 2 | 2012-10-30 |
DMOS Transistor with a Slanted Super Junction Drift Structure
App 20120261753 - Hopper; Peter J. ; et al. | 2012-10-18 |
Schottky junction-field-effect-transistor (JFET) structures and methods of forming JFET structures
Grant 8,207,559 - Babcock , et al. June 26, 2 | 2012-06-26 |
Self-aligned bipolar transistor structure
Grant 8,148,799 - El-Diwany , et al. April 3, 2 | 2012-04-03 |
System And Method For Increasing Breakdown Voltage Of Locos Isolated Devices
App 20110065256 - Foote, JR.; Richard W. ; et al. | 2011-03-17 |
System and method for increasing breakdown voltage of LOCOS isolated devices
Grant 7,867,871 - Foote , et al. January 11, 2 | 2011-01-11 |
Self-aligned Bipolar Transistor Structure
App 20100127352 - El-Diwany; Monir ; et al. | 2010-05-27 |
Method of controlling the breakdown voltage of BSCRs and BJT clamps
Grant 7,714,355 - Vashchenko , et al. May 11, 2 | 2010-05-11 |
Method of forming a self-aligned bipolar transistor structure using a selectively grown emitter
Grant 7,687,887 - El-Diwany , et al. March 30, 2 | 2010-03-30 |
Schottky Junction-field-effect-transistor (jfet) Structures And Methods Of Forming Jfet Structures
App 20100032731 - Babcock; Jeffrey A. ; et al. | 2010-02-11 |
Method of reducing fringing capacitance in a MOSFET
Grant 7,132,342 - Sadovnikov , et al. November 7, 2 | 2006-11-07 |
Low doped base spacer for reduction of emitter-base capacitance in bipolar transistors with selectively grown epitaxial base
Grant 6,967,144 - Sadovnikov November 22, 2 | 2005-11-22 |
Method of etching a lateral trench under an extrinsic base and improved bipolar transistor
Grant 6,964,907 - Hopper , et al. November 15, 2 | 2005-11-15 |
Single poly bipolar transistor and method that uses a selectively epitaxially grown highly-boron-doped silicon layer as a diffusion source for an extrinsic base region
Grant 6,699,741 - Sadovnikov , et al. March 2, 2 | 2004-03-02 |
Polysilicon-edge, low-power, high-frequency bipolar transistor and method of forming the transistor
Grant 6,603,188 - Darwish , et al. August 5, 2 | 2003-08-05 |
Diode junction based electrostatic discharge (ESD) protection structure
App 20020079540 - Vashchenko, Vladislav ; et al. | 2002-06-27 |
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