loadpatents
name:-0.021190166473389
name:-0.017159938812256
name:-0.0005500316619873
Roy; Ronnen Andrew Patent Filings

Roy; Ronnen Andrew

Patent Applications and Registrations

Patent applications and USPTO patent grants for Roy; Ronnen Andrew.The latest application filed is for "self-aligned silicide (salicide) process for low resistivity contacts to thin film silicon-on-insulator and bulk mosfets and for shallow junctions".

Company Profile
0.17.14
  • Roy; Ronnen Andrew - Ossining NY
  • Roy; Ronnen Andrew - Ossinging NY
  • Roy; Ronnen Andrew - Briarcliff Manor NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method and structure for reduction of contact resistance of metal silicides using a metal-germanium alloy
Grant 7,102,234 - Cabral, Jr. , et al. September 5, 2
2006-09-05
Structure for controlling the interface roughness of cobalt disilicide
Grant 7,081,676 - Agnello , et al. July 25, 2
2006-07-25
Self-aligned silicide (salicide) process for low resistivity contacts to thin film silicon-on-insulator and bulk mosfets and for shallow junctions
App 20060043484 - Cabral; Cyril JR. ;   et al.
2006-03-02
Self-aligned silicide (salicide) process for low resistivity contacts to thin film silicon-on-insulator and bulk MOSFETS and for shallow junctions
Grant 6,987,050 - Cabral, Jr. , et al. January 17, 2
2006-01-17
Method and structure for controlling the interface roughness of cobalt disilicide
Grant 6,809,030 - Agnello , et al. October 26, 2
2004-10-26
Method and structure for reduction of contact resistance of metal silicides using a metal-germanium alloy
App 20040195695 - Cabral,, Cyril JR. ;   et al.
2004-10-07
Method and structure for reduction of contact resistance of metal silicides using a metal-germanium alloy
Grant 6,753,606 - Cabral, Jr. , et al. June 22, 2
2004-06-22
Method and structure for controlling the interface roughness of cobalt disilicide
App 20040087160 - Agnello, Paul David ;   et al.
2004-05-06
All-in-one disposable/permanent spacer elevated source/drain, self-aligned silicide CMOS
Grant 6,727,135 - Lee , et al. April 27, 2
2004-04-27
Self-aligned silicide process utilizing ion implants for reduced silicon consumption and control of the silicide formation temperature and structure formed thereby
Grant 6,716,708 - Cabral, Jr. , et al. April 6, 2
2004-04-06
All-in-one disposable/permanent spacer elevated source/drain, self-aligned silicide CMOS
App 20030209765 - Lee, Kam Leung ;   et al.
2003-11-13
All-in-one disposable/permanent spacer elevated source/drain, self-aligned silicide CMOS
Grant 6,614,079 - Lee , et al. September 2, 2
2003-09-02
Self-aligned silicide process utilizing ion implants for reduced silicon consumption and control of the silicide formation temperature and structure formed thereby
App 20030132487 - Cabral, Cyril JR. ;   et al.
2003-07-17
Self-aligned silicide process utilizing ion implants for reduced silicon consumption and control of the silicide formation temperature and structure formed thereby
Grant 6,555,880 - Cabral, Jr. , et al. April 29, 2
2003-04-29
Self-aligned silicide (salicide) process for strained silicon MOSFET on SiGe and structure formed thereby
App 20030068883 - Ajmera, Atul Champaklal ;   et al.
2003-04-10
All-in-one disposable/permanent spacer elevated source/drain, self-aligned silicide CMOS
App 20030015762 - Lee, Kam Leung ;   et al.
2003-01-23
Self-aligned silicide (salicide) process for strained silicon MOSFET ON SiGe and structure formed thereby
Grant 6,503,833 - Ajmera , et al. January 7, 2
2003-01-07
Self-aligned silicide process utilizing ion implants for reduced silicon consumption and control of the silicide formation temperature and structure formed thereby
App 20020185691 - Cabral, Cyril JR. ;   et al.
2002-12-12
Method and structure for controlling the interface roughness of cobalt disilicide
App 20020182836 - Agnello, Paul David ;   et al.
2002-12-05
Method and structure for retarding high temperature agglomeration of silicides using alloys
App 20020151158 - Cabral, Cyril JR. ;   et al.
2002-10-17
Method and structure for controlling the interface roughness of cobalt disilicide
Grant 6,440,851 - Agnello , et al. August 27, 2
2002-08-27
Damascene-gate process for the fabrication of MOSFET devices with minimum poly-gate depletion, silicided source and drain junctions, and low sheet resistance gate-poly
Grant 6,440,808 - Boyd , et al. August 27, 2
2002-08-27
Method And Structure For Retarding High Temperature Agglomeration Of Silicides Using Alloys
App 20020061636 - Cabral, Cyril JR. ;   et al.
2002-05-23
Method and structure for reduction of contact resistance of metal silicides using a metal-germanium alloy
App 20020042197 - Cabral,, Cyril JR. ;   et al.
2002-04-11
Self-aligned silicone process for low resistivity contacts to thin film silicon-on-insulator mosfets
App 20020031909 - Cabral, Cyril JR. ;   et al.
2002-03-14
Self-aligned silicide (salicide) process for low resistivity contacts to thin film silicon-on-insulator and bulk MOSFETS and for shallow Junctions
App 20020022366 - Cabral, Cyril JR. ;   et al.
2002-02-21
Method and structure for reduction of contact resistance of metal silicides using a metal-germanium alloy
Grant 6,331,486 - Cabral, Jr. , et al. December 18, 2
2001-12-18
Microwave annealing
Grant 6,051,283 - Lee , et al. April 18, 2
2000-04-18
Low temperature formation of low resistivity titanium silicide
Grant 5,828,131 - Cabral, Jr. , et al. October 27, 1
1998-10-27
Tasin oxygen diffusion barrier in multilayer structures
Grant 5,796,166 - Agnello , et al. August 18, 1
1998-08-18
Tasin oxygen diffusion barrier in multilayer structures
Grant 5,776,823 - Agnello , et al. July 7, 1
1998-07-07

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