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name:-0.1200008392334
name:-0.095856904983521
name:-0.018589019775391
Roy; Mihir K. Patent Filings

Roy; Mihir K.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Roy; Mihir K..The latest application filed is for "high density interconnect device and method".

Company Profile
15.65.77
  • Roy; Mihir K. - Chandler AZ
  • Roy; Mihir K - Chandler AZ
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Methods of forming a package substrate
Grant 11,443,970 - Konchady , et al. September 13, 2
2022-09-13
High Density Interconnect Device And Method
App 20220028790 - Roy; Mihir K. ;   et al.
2022-01-27
High density interconnect device and method
Grant 11,158,578 - Roy , et al. October 26, 2
2021-10-26
Helical Plated Through-hole Package Inductor
App 20210304952 - Lambert; William J. ;   et al.
2021-09-30
Method of making an inductor
Grant 10,998,120 - Lambert , et al. May 4, 2
2021-05-04
Package power delivery using plane and shaped vias
Grant 10,971,416 - Bharath , et al. April 6, 2
2021-04-06
High Density Organic Bridge Device And Method
App 20200294924 - Roy; Mihir K. ;   et al.
2020-09-17
Substrate conductor structure and method
Grant 10,734,282 - Chase , et al.
2020-08-04
Solder Resist Layers For Coreless Packages And Methods Of Fabrication
App 20200194300 - KONCHADY; Manohar S. ;   et al.
2020-06-18
High density organic bridge device and method
Grant 10,672,713 - Roy , et al.
2020-06-02
Solder resist layers for coreless packages and methods of fabrication
Grant 10,629,469 - Konchady , et al.
2020-04-21
High Density Interconnect Device And Method
App 20200111745 - Roy; Mihir K. ;   et al.
2020-04-09
Package Power Delivery Using Plane And Shaped Vias
App 20190355636 - Bharath; Krishna ;   et al.
2019-11-21
High density interconnect device and method
Grant 10,446,499 - Roy , et al. Oc
2019-10-15
Package power delivery using plane and shaped vias
Grant 10,410,939 - Bharath , et al. Sept
2019-09-10
Inductor formed in substrate
Grant 10,312,007 - Roy , et al.
2019-06-04
Helical Plated Through-hole Package Inductor
App 20190051447 - Lambert; William J. ;   et al.
2019-02-14
Substrate Conductor Structure And Method
App 20190027405 - Chase; Harold Ryan ;   et al.
2019-01-24
High Density Organic Bridge Device And Method
App 20190019755 - Roy; Mihir K. ;   et al.
2019-01-17
Helical plated through-hole package inductor
Grant 10,163,557 - Lambert , et al. Dec
2018-12-25
Vertically Embedded Passive Components
App 20180332708 - LAMBERT; William J. ;   et al.
2018-11-15
Improved Package Power Delivery Using Plane And Shaped Vias
App 20180331003 - BHARATH; Krishna ;   et al.
2018-11-15
Self-cooled Laser Integrated Device And Substrate Architecture
App 20180329240 - RAGHUNATHAN; Vivek ;   et al.
2018-11-15
Substrate conductor structure and method
Grant 10,121,701 - Chase , et al. November 6, 2
2018-11-06
High density organic bridge device and method
Grant 10,103,105 - Roy , et al. October 16, 2
2018-10-16
Direct chip attach using embedded traces
Grant 10,085,341 - Roy , et al. September 25, 2
2018-09-25
Electrical Interconnect Formed Through Buildup Process
App 20180213655 - Roy; Mihir K. ;   et al.
2018-07-26
Electrical interconnect formed through buildup process
Grant 10,028,394 - Roy , et al. July 17, 2
2018-07-17
Microelectronic device and method of manufacturing same
Grant 9,999,129 - Guzek , et al. June 12, 2
2018-06-12
Package with bi-layered dielectric structure
Grant 9,917,044 - Zhou , et al. March 13, 2
2018-03-13
Hybrid pitch package with ultra high density interconnect capability
Grant 9,899,311 - Manusharow , et al. February 20, 2
2018-02-20
Process for forming a semiconductor device substrate
Grant 9,820,390 - Roy , et al. November 14, 2
2017-11-14
Dual Side Solder Resist Layers For Coreless Packages And Packages With An Embedded Interconnect Bridge And Their Methods Of Fabrication
App 20170250150 - KONCHADY; Manohar S. ;   et al.
2017-08-31
Electronic package and method of connecting a first die to a second die to form an electronic package
Grant 9,741,686 - Chase , et al. August 22, 2
2017-08-22
Dual side solder resist layers for coreless packages and packages with an embedded interconnect bridge and their methods of fabrication
Grant 9,704,735 - Konchady , et al. July 11, 2
2017-07-11
Direct Chip Attach Using Embedded Traces
App 20170188460 - Roy; Mihir K. ;   et al.
2017-06-29
Helical Plated Through-hole Package Inductor
App 20170178786 - Lambert; William J. ;   et al.
2017-06-22
High Density Interconnect Device And Method
App 20170162509 - Roy; Mihir K. ;   et al.
2017-06-08
High Density Organic Bridge Device And Method
App 20170125349 - Roy; Mihir K. ;   et al.
2017-05-04
Hybrid pitch package with ultra high density interconnect capability
Grant 9,633,938 - Manusharow , et al. April 25, 2
2017-04-25
Package With Bi-layered Dielectric Structure
App 20170103941 - Zhou; Zheng ;   et al.
2017-04-13
Method of forming a circuit board
Grant 9,622,350 - Roy , et al. April 11, 2
2017-04-11
Hybrid Pitch Package With Ultra High Density Interconnect Capability
App 20170092573 - MANUSHAROW; Mathew J. ;   et al.
2017-03-30
Hybrid Pitch Package With Ultra High Density Interconnect Capability
App 20170092575 - Manusharow; Mathew J. ;   et al.
2017-03-30
Weaved Electrical Components In A Substrate Package Core
App 20170027062 - ROY; MIHIR K. ;   et al.
2017-01-26
Landside stiffening capacitors to enable ultrathin and other low-Z products
Grant 9,552,977 - Roy , et al. January 24, 2
2017-01-24
High density organic bridge device and method
Grant 9,548,264 - Roy , et al. January 17, 2
2017-01-17
Suspended inductor microelectronic structures
Grant 9,526,175 - Manusharow , et al. December 20, 2
2016-12-20
Weaved electrical components in a substrate package core
Grant 9,521,751 - Roy , et al. December 13, 2
2016-12-13
Substrate Conductor Structure And Method
App 20160336223 - Chase; Harold Ryan ;   et al.
2016-11-17
Substrate conductor structure and method
Grant 9,406,587 - Chase , et al. August 2, 2
2016-08-02
Electronic Package And Method Of Connecting A First Die To A Second Die To Form An Electronic Package
App 20160204067 - Chase; Harold Ryan ;   et al.
2016-07-14
Device packaging with substrates having embedded lines and metal defined pads
Grant 9,355,952 - Hlad , et al. May 31, 2
2016-05-31
High Density Organic Bridge Device And Method
App 20160133552 - Roy; Mihir K. ;   et al.
2016-05-12
Electronic package and method of connecting a first die to a second die to form an electronic package
Grant 9,275,975 - Chase , et al. March 1, 2
2016-03-01
Dual Side Solder Resist Layers For Coreless Packages And Packages With An Embedded Interconnect Bridge And Their Methods Of Fabrication
App 20160056102 - Konchady; Manohar S. ;   et al.
2016-02-25
High density organic bridge device and method
Grant 9,236,366 - Roy , et al. January 12, 2
2016-01-12
Non-cylindrical conducting shapes in multilayer laminated substrate cores
Grant 9,198,293 - Chase , et al. November 24, 2
2015-11-24
Device Packaging With Substrates Having Embedded Lines And Metal Defined Pads
App 20150318238 - HLAD; Mark S. ;   et al.
2015-11-05
Electronic Package And Method Of Connecting A First Die To A Second Die To Form An Electronic Package
App 20150279813 - Chase; Harold Ryan ;   et al.
2015-10-01
In situ-built pin-grid arrays for coreless substrates, and methods of making same
Grant 9,111,916 - Roy , et al. August 18, 2
2015-08-18
Device packaging with substrates having embedded lines and metal defined pads
Grant 9,093,313 - Hlad , et al. July 28, 2
2015-07-28
Weaved Electrical Components In A Substrate Package Core
App 20150138743 - ROY; Mihir K. ;   et al.
2015-05-21
Hybrid-core Through Holes And Vias
App 20150089806 - ROY; MIHIR K. ;   et al.
2015-04-02
Direct Chip Attach Using Embedded Traces
App 20150092378 - ROY; Mihir K. ;   et al.
2015-04-02
In situ-built pin-grid arrays for coreless substrates, and methods of making same
Grant 8,952,540 - Roy , et al. February 10, 2
2015-02-10
High Density Interconnect Device And Method
App 20150035144 - Roy; Mihir K. ;   et al.
2015-02-05
Package Assembly Configurations For Multiple Dies And Associated Techniques
App 20150014852 - Liu; Yueli ;   et al.
2015-01-15
Device Packaging With Substrates Having Embedded Lines And Metal Defined Pads
App 20150008578 - Hlad; Mark S. ;   et al.
2015-01-08
Hybrid core through holes and vias
Grant 8,928,151 - Roy , et al. January 6, 2
2015-01-06
Heat dissipation device embedded within a microelectronic die
Grant 8,907,461 - Konchady , et al. December 9, 2
2014-12-09
Heat Dissipation Device Embedded Within A Microelectronic Die
App 20140353817 - Konchady; Manohar S ;   et al.
2014-12-04
High density interconnect device and method
Grant 8,866,308 - Roy , et al. October 21, 2
2014-10-21
Device packaging with substrates having embedded lines and metal defined pads
Grant 8,835,217 - Hlad , et al. September 16, 2
2014-09-16
Suspended Inductor Microelectronic Structures
App 20140251669 - Manusharow; Mathew J. ;   et al.
2014-09-11
Non-cylindrical Conducting Shapes In Multilayer Laminated Substrate Cores
App 20140197545 - Chase; Harold R. ;   et al.
2014-07-17
High Density Organic Bridge Device And Method
App 20140174807 - Roy; Mihir K. ;   et al.
2014-06-26
In Situ-built Pin-grid Arrays For Coreless Substrates, And Methods Of Making Same
App 20140179060 - Roy; Mihir K. ;   et al.
2014-06-26
High Density Interconnect Device And Method
App 20140175636 - Roy; Mihir K. ;   et al.
2014-06-26
Electrical Interconnect Formed Through Buildup Process
App 20140166353 - Roy; Mihir K. ;   et al.
2014-06-19
Inductor Formed In Substrate
App 20140159850 - Roy; Mihir K. ;   et al.
2014-06-12
Landside Stiffening Capacitors To Enable Ultrathin And Other Low-z Products
App 20140160675 - Roy; Mihir K. ;   et al.
2014-06-12
Recessed Discrete Component Mounting On Organic Substrate
App 20140158414 - BALDWIN; CHRIS ;   et al.
2014-06-12
Patch on interposer assembly and structures formed thereby
Grant 8,659,171 - Roberts , et al. February 25, 2
2014-02-25
Hybrid-core Through Holes And Vias
App 20140008760 - Roy; Mihir K. ;   et al.
2014-01-09
Reduced PTH pad for enabling core routing and substrate layer count reduction
Grant 8,617,990 - Mallik , et al. December 31, 2
2013-12-31
Hybrid-core through holes and vias
Grant 8,552,564 - Roy , et al. October 8, 2
2013-10-08
Patch On Interposer Assembly And Structures Formed Thereby
App 20130141859 - Roberts; Brent M. ;   et al.
2013-06-06
Through mold via polymer block package
Grant 8,450,857 - Roy , et al. May 28, 2
2013-05-28
Microelectronic package and method for a compression-based mid-level interconnect
Grant 8,440,506 - Roberts , et al. May 14, 2
2013-05-14
Patch on interposer assembly and structures formed thereby
Grant 8,389,337 - Roberts , et al. March 5, 2
2013-03-05
Patch on interposer through PGA interconnect structures
Grant 8,381,393 - Roberts , et al. February 26, 2
2013-02-26
In Situ-built Pin-grid Arrays For Coreless Substrates, And Methods Of Making Same
App 20130001794 - Roy; Mihir K. ;   et al.
2013-01-03
Through Mold Via Polymer Block Package
App 20120299179 - Roy; Mihir K. ;   et al.
2012-11-29
Microelectronic Package And Method For A Compression-based Mid-level Interconnect
App 20120279059 - Roberts; Brent M. ;   et al.
2012-11-08
Microelectronic package and method for a compression-based mid-level interconnect
Grant 8,278,752 - Roberts , et al. October 2, 2
2012-10-02
Through mold via polymer block package
Grant 8,278,214 - Roy , et al. October 2, 2
2012-10-02
Device Packaging With Substrates Having Embedded Lines And Metal Defined Pads
App 20120161330 - Hlad; Mark S. ;   et al.
2012-06-28
Reduced Pth Pad For Enabling Core Routing And Substrate Layer Count Reduction
App 20120153495 - Mallik; Debendra ;   et al.
2012-06-21
Hybrid-core Through Holes And Vias
App 20120146180 - Roy; Mihir K. ;   et al.
2012-06-14
Patch on interposer assembly and structures formed thereby
App 20110156276 - Roberts; Brent M. ;   et al.
2011-06-30
Patch on interposer through PGA interconnect structures
App 20110157808 - Roberts; Brent M. ;   et al.
2011-06-30
Microelectronic Package And Method For A Compression-based Mid-level Interconnect
App 20110147913 - Roberts; Brent M. ;   et al.
2011-06-23
Through Mold Via Polymer Block Package
App 20110147929 - Roy; Mihir K. ;   et al.
2011-06-23
Microelectronic device and method of manufacturing same
App 20110108947 - Guzek; John S. ;   et al.
2011-05-12
Polymer-based Integrated Thin Film Capacitors, Packages Containing Same And Methods Related Thereto
App 20080145622 - Roy; Mihir K. ;   et al.
2008-06-19

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