loadpatents
name:-0.014860868453979
name:-0.015750169754028
name:-0.00044703483581543
Rost; Timothy A Patent Filings

Rost; Timothy A

Patent Applications and Registrations

Patent applications and USPTO patent grants for Rost; Timothy A.The latest application filed is for "transistor design and layout for performance improvement with strain".

Company Profile
0.14.13
  • Rost; Timothy A - Plano TX US
  • Rost; Timothy A. - Plano TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Transistor design and layout for performance improvement with strain
Grant 8,604,524 - Rost December 10, 2
2013-12-10
Capacitor integration at top-metal level with a protective cladding for copper surface protection
Grant 7,674,682 - Burke , et al. March 9, 2
2010-03-09
Transistor Design and Layout for Performance Improvement with Strain
App 20090095988 - Rost; Timothy A.
2009-04-16
Transistor Design and Layout for Performance Improvement with Strain
App 20090095987 - Rost; Timothy A.
2009-04-16
Transistor design and layout for performance improvement with strain
Grant 7,482,214 - Rost January 27, 2
2009-01-27
One Mask High Density Capacitor for Integrated Circuits
App 20080020538 - Rost; Timothy A. ;   et al.
2008-01-24
One mask high density capacitor for integrated circuits
Grant 7,291,897 - Rost , et al. November 6, 2
2007-11-06
Versatile system for limiting mobile charge ingress in SOI semiconductor structures
Grant 7,148,558 - Rost , et al. December 12, 2
2006-12-12
Capacitor integration at top-metal level with a protection layer for the copper surface
Grant 7,015,093 - Papa Rao , et al. March 21, 2
2006-03-21
Dual mask capacitor for integrated circuits
Grant 6,924,208 - Rost , et al. August 2, 2
2005-08-02
Transistor design and layout for performance improvement with strain
App 20050139929 - Rost, Timothy A.
2005-06-30
Dual mask capacitor for integrated circuits
Grant 6,898,068 - Rost , et al. May 24, 2
2005-05-24
One mask high density capacitor for integrated circuits
App 20050093050 - Rost, Timothy A. ;   et al.
2005-05-05
Capacitor integration at top-metal level with a protective cladding for copper surface protection
App 20050093093 - Burke, Edmund ;   et al.
2005-05-05
Capacitor integration at top-metal level with a protection layer for the copper surface
App 20050095781 - Papa Rao, Satyavolu S. ;   et al.
2005-05-05
Dual Mask Capacitor For Integrated Circuits
App 20050063139 - Rost, Timothy A. ;   et al.
2005-03-24
Dual mask capacitor for integrated circuits
App 20050063138 - Rost, Timothy A. ;   et al.
2005-03-24
Versatile system for limiting mobile charge ingress in SOI semiconductor structures
App 20050051844 - Rost, Timothy A. ;   et al.
2005-03-10
Method for measuring NBTI degradation effects on integrated circuits
Grant 6,815,970 - Rost , et al. November 9, 2
2004-11-09
Versatile system for limiting mobile charge ingress in SOI semiconductor structures
Grant 6,803,295 - Rost , et al. October 12, 2
2004-10-12
Integrated Circuit Providing Thermally Conductive Structures Substantially Horizontally Coupled To One Another Within One Or More Heat Dissipation Layers To Dissipate Heat From A Heat Generating Structure
Grant 6,710,443 - Rost , et al. March 23, 2
2004-03-23
Versatile system for limiting mobile charge ingress in SOI semiconductor structures
App 20030122193 - Rost, Timothy A. ;   et al.
2003-07-03
Method for measuring NBTI degradation effects on integrated circuits
App 20030042926 - Rost, Timothy A. ;   et al.
2003-03-06
Method for improving performance and reliability of MOS technologies and data retention characteristics of flash memory cells
App 20010007785 - Rost, Timothy A. ;   et al.
2001-07-12
On-chip ESD protection in dual voltage CMOS
Grant 6,143,594 - Tsao , et al. November 7, 2
2000-11-07
On-chip ESD protection in dual voltage CMOS
Grant 6,137,144 - Tsao , et al. October 24, 2
2000-10-24

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