Rosser; Thomas Edward

Patent Applications and Registrations

Patent applications and USPTO patent grants for Rosser; Thomas Edward.The latest application filed is for "method and apparatus for modifying existing circuit design".

Company Profile

0.9.7

Rosser; Thomas Edward - Austin TX
Rosser; Thomas Edward - Poughkeepsie NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and system for modeling logical circuit blocks including transistor gate capacitance loading effects Grant 7,552,040 - Dorfman , et al. June 23, 2	2009-06-23
Method And Apparatus For Modifying Existing Circuit Design App 20080270955 - Isakson; John Mack ; et al.	2008-10-30
Techniques For Calculating Circuit Block Delay And Transition Times Including Transistor Gate Capacitance Loading Effects App 20080177517 - Dorfman; Barry Lee ; et al.	2008-07-24
Method and apparatus for detecting and correcting inaccuracies in curve-fitted models Grant 7,194,394 - Dorfman , et al. March 20, 2	2007-03-20
Method of power consumption reduction in clocked circuits Grant 6,922,818 - Chu , et al. July 26, 2	2005-07-26
Method and system for modeling logical circuit blocks including transistor gate capacitance loading effects App 20040162716 - Dorfman, Barry Lee ; et al.	2004-08-19
Method, system, and computer program product for improving wireability near dense clock nets Grant 6,728,944 - Clabes , et al. April 27, 2	2004-04-27
Method, system, and computer program product for correcting anticipated problems related to global routing Grant 6,654,943 - Clabes , et al. November 25, 2	2003-11-25
Method, system, and computer program product for improving wireability near dense clock nets App 20030101427 - Clabes, Joachim Gerhard ; et al.	2003-05-29
Method and apparatus for detecting and correcting inaccuracies in curve-fitted models App 20030093235 - Dorfman, Barry Lee ; et al.	2003-05-15
Method, system, and computer program product for correcting anticipated problems related to global routing App 20030074645 - Clabes, Joachim Gerhard ; et al.	2003-04-17
Method, system, and computer program product for optimizing logic during synthesis of logic designs Grant 6,526,543 - Rosser February 25, 2	2003-02-25
Method of power consumption reduction in clocked circuits App 20020152409 - Chu, Sam Gat-Shang ; et al.	2002-10-17
System and method for restructuring of logic circuitry Grant 6,282,695 - Reddy , et al. August 28, 2	2001-08-28
Identifying candidate nodes for phase assignment in a logic network Grant 6,035,110 - Puri , et al. March 7, 2	2000-03-07
Computer program product for enabling a computer to remove redundancies using quasi algebraic methods Grant 5,774,369 - Horstmann , et al. June 30, 1	1998-06-30

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