| Patent | Date |
|---|
Nanosheet field effect transistors with partial inside spacers
Grant 11,342,446 - Guillorn , et al. May 24, 2 | 2022-05-24 |
Gate-all-around field effect transistor having multiple threshold voltages
Grant 11,245,020 - Bao , et al. February 8, 2 | 2022-02-08 |
Vertical fin field effect transistor with air gap spacers
Grant 11,024,709 - Mallela , et al. June 1, 2 | 2021-06-01 |
Self Aligned Replacement Metal Source/drain Finfet
App 20210028287 - Alptekin; Emre ; et al. | 2021-01-28 |
Self aligned replacement metal source/drain finFET
Grant 10,818,759 - Alptekin , et al. October 27, 2 | 2020-10-27 |
Structures, methods and applications for electrical pulse anneal processes
Grant 10,755,949 - Abou-Khalil , et al. A | 2020-08-25 |
Gate-all-around Field Effect Transistor Having Multiple Threshold Voltages
App 20200258995 - A1 | 2020-08-13 |
Gate-all-around Field Effect Transistor Having Multiple Threshold Voltages
App 20200251568 - Kind Code | 2020-08-06 |
Vertical Fin Field Effect Transistor With Air Gap Spacers
App 20200212174 - Mallela; Hari V. ; et al. | 2020-07-02 |
Vertical fin field effect transistor with air gap spacers
Grant 10,644,104 - Mallela , et al. | 2020-05-05 |
Nanosheet Field Effect Transistors With Partial Inside Spacers
App 20200098893 - Guillorn; Michael A. ; et al. | 2020-03-26 |
Gate-all-around field effect transistor having multiple threshold voltages
Grant 10,586,854 - Bao , et al. | 2020-03-10 |
Nanosheet field effect transistors with partial inside spacers
Grant 10,559,670 - Guillorn , et al. Feb | 2020-02-11 |
Self Aligned Replacement Metal Source/drain Finfet
App 20190326406 - Alptekin; Emre ; et al. | 2019-10-24 |
Self aligned replacement metal source/drain finFET
Grant 10,418,450 - Alptekin , et al. Sept | 2019-09-17 |
Multiple-threshold Nanosheet Transistors
App 20190252495 - Bao; Ruqiang ; et al. | 2019-08-15 |
Multiple-threshold nanosheet transistors
Grant 10,340,340 - Bao , et al. | 2019-07-02 |
Structures, Methods And Applications For Electrical Pulse Anneal Processes
App 20190198347 - ABOU-KHALIL; Michel J. ; et al. | 2019-06-27 |
Structures, methods and applications for electrical pulse anneal processes
Grant 10,283,374 - Abou-Khalil , et al. | 2019-05-07 |
Nanosheet MOSFET with partial release and source/drain epitaxy
Grant 10,249,739 - Guillorn , et al. | 2019-04-02 |
Vertical fin field effect transistor with air gap spacers
Grant 10,243,041 - Mallela , et al. | 2019-03-26 |
Vertical Fin Field Effect Transistor With Air Gap Spacers
App 20190027557 - Mallela; Hari V. ; et al. | 2019-01-24 |
Forming MOSFET structures with work function modification
Grant 10,170,477 - Bao , et al. J | 2019-01-01 |
Vertical fin field effect transistor with air gap spacers
Grant 10,170,543 - Mallela , et al. J | 2019-01-01 |
Nanosheet field effect transistors with partial inside spacers
Grant 10,170,584 - Guillorn , et al. J | 2019-01-01 |
Three-dimensional stacked junctionless channels for dense SRAM
Grant 10,170,485 - Guillorn , et al. J | 2019-01-01 |
Forming MOSFET structures with work function modification
Grant 10,147,725 - Bao , et al. De | 2018-12-04 |
Three-Dimensional Stacked Junctionless Channels For Dense SRAM
App 20180342525 - Guillorn; Michael A. ; et al. | 2018-11-29 |
Gate-all-around field effect transistor having multiple threshold voltages
Grant 10,128,347 - Bao , et al. November 13, 2 | 2018-11-13 |
Structures, Methods And Applications For Electrical Pulse Anneal Processes
App 20180308708 - ABOU-KHALIL; Michel J. ; et al. | 2018-10-25 |
Gate-all-around Field Effect Transistor Having Multiple Threshold Voltages
App 20180308945 - Bao; Ruqiang ; et al. | 2018-10-25 |
Three-dimensional stacked junctionless channels for dense SRAM
Grant 10,096,607 - Guillorn , et al. October 9, 2 | 2018-10-09 |
Nanosheet Mosfet With Partial Release And Source/drain Epitaxy
App 20180254329 - Guillorn; Michael A. ; et al. | 2018-09-06 |
Modulating transistor performance
Grant 10,056,382 - Guo , et al. August 21, 2 | 2018-08-21 |
Nanosheet Field Effect Transistors With Partial Inside Spacers
App 20180219083 - Guillorn; Michael A. ; et al. | 2018-08-02 |
Nanosheet Field Effect Transistors With Partial Inside Spacers
App 20180219082 - Guillorn; Michael A. ; et al. | 2018-08-02 |
Structures, methods and applications for electrical pulse anneal processes
Grant 10,037,895 - Abou-Khalil , et al. July 31, 2 | 2018-07-31 |
Channel replacement and bimodal doping scheme for bulk finFet threshold voltage modulation with reduced performance penalty
Grant 10,032,885 - Karve , et al. July 24, 2 | 2018-07-24 |
Gate-all-around Field Effect Transistor Having Multiple Threshold Voltages
App 20180190782 - Bao; Ruqiang ; et al. | 2018-07-05 |
Source/drain epitaxial electrical monitor
Grant 9,972,550 - Nowak , et al. May 15, 2 | 2018-05-15 |
Multiple-threshold Nanosheet Transistors
App 20180114833 - Bao; Ruqiang ; et al. | 2018-04-26 |
Modulating Transistor Performance
App 20180108661 - Guo; Dechao ; et al. | 2018-04-19 |
Capacitive measurements of divots in semiconductor devices
Grant 9,941,179 - Logan , et al. April 10, 2 | 2018-04-10 |
Multi-finger devices in mutliple-gate-contacted-pitch, integrated structures
Grant 9,935,106 - Nowak , et al. April 3, 2 | 2018-04-03 |
Vertical fin field effect transistor with air gap spacers
Grant 9,911,804 - Mallela , et al. March 6, 2 | 2018-03-06 |
Vertical Fin Field Effect Transistor With Air Gap Spacers
App 20180053821 - Mallela; Hari V. ; et al. | 2018-02-22 |
Vertical Fin Field Effect Transistor With Air Gap Spacers
App 20180053840 - Mallela; Hari V. ; et al. | 2018-02-22 |
Vertical Fin Field Effect Transistor With Air Gap Spacers
App 20180053823 - Mallela; Hari V. ; et al. | 2018-02-22 |
Structures, methods and applications for electrical pulse anneal processes
Grant 9,881,810 - Abou-Khalil , et al. January 30, 2 | 2018-01-30 |
Vertical field effect transistor with subway etch replacement metal gate
Grant 9,859,421 - Robison , et al. January 2, 2 | 2018-01-02 |
Vertical field effect transistors with metallic source/drain regions
Grant 9,859,384 - Mallela , et al. January 2, 2 | 2018-01-02 |
Extraction of resistance associated with laterally diffused dopant profiles in CMOS devices
Grant 9,852,956 - Logan , et al. December 26, 2 | 2017-12-26 |
Performance-enhanced vertical device and method of forming thereof
Grant 9,847,416 - Nowak , et al. December 19, 2 | 2017-12-19 |
Vertical Field Effect Transistors With Metallic Source/drain Regions
App 20170317177 - Mallela; Hari V. ; et al. | 2017-11-02 |
FDSOI voltage reference
Grant 9,805,990 - Bryant , et al. October 31, 2 | 2017-10-31 |
Multi-finger Devices In Mutliple-gate-contacted-pitch, Integrated Structures
App 20170287911 - Nowak; Edward J. ; et al. | 2017-10-05 |
Channel replacement and bimodal doping scheme for bulk finFET threshold voltage modulation with reduced performance penalty
Grant 9,735,275 - Karve , et al. August 15, 2 | 2017-08-15 |
Vertical field effect transistors with metallic source/drain regions
Grant 9,728,466 - Mallela , et al. August 8, 2 | 2017-08-08 |
Channel Replacement And Bimodal Doping Scheme For Bulk Finfet Threshold Voltage Modulation With Reduced Performance Penalty
App 20170179254 - Karve; Gauri ; et al. | 2017-06-22 |
Channel Replacement And Bimodal Doping Scheme For Bulk Finfet Threshold Voltage Modulation With Reduced Performance Penalty
App 20170179274 - Karve; Gauri ; et al. | 2017-06-22 |
Self Aligned Replacement Metal Source/drain Finfet
App 20170141197 - Alptekin; Emre ; et al. | 2017-05-18 |
Forming Mosfet Structures With Work Function Modification
App 20170133272 - BAO; RUQIANG ; et al. | 2017-05-11 |
Forming Mosfet Structures With Work Function Modification
App 20170133372 - BAO; RUQIANG ; et al. | 2017-05-11 |
Source/drain Epitaxial Electrical Monitor
App 20170098585 - NOWAK; Edward J. ; et al. | 2017-04-06 |
High Voltage Finfet Structure With Shaped Drift Region
App 20170062609 - Logan; Lyndon R. ; et al. | 2017-03-02 |
Field-isolated bulk FinFET
Grant 9,536,882 - Anderson , et al. January 3, 2 | 2017-01-03 |
High Voltage Finfet Structure With Shaped Drift Region
App 20160380095 - Logan; Lyndon R. ; et al. | 2016-12-29 |
High Performance Heat Shields With Reduced Capacitance
App 20160379999 - Chou; Anthony I. ; et al. | 2016-12-29 |
Fdsoi Voltage Reference
App 20160380100 - Bryant; Andres ; et al. | 2016-12-29 |
High performance heat shields with reduced capacitance
Grant 9,530,798 - Chou , et al. December 27, 2 | 2016-12-27 |
Capacitive Measurements Of Divots In Semiconductor Devices
App 20160370311 - LOGAN; Lyndon R. ; et al. | 2016-12-22 |
Self aligned replacement metal source/drain finFET
Grant 9,466,693 - Alptekin , et al. October 11, 2 | 2016-10-11 |
Extraction Of Resistance Associated With Laterally Diffused Dopant Profiles In Cmos Devices
App 20160225680 - Logan; Lyndon Ronald ; et al. | 2016-08-04 |
Field-isolated Bulk Finfet
App 20160181247 - Anderson; Brent A. ; et al. | 2016-06-23 |
Semiconductor device including SIU butted junction to reduce short-channel penalty
Grant 9,349,749 - Ontalus , et al. May 24, 2 | 2016-05-24 |
MOL resistor with metal grid heat shield
Grant 9,337,088 - Clark, Jr. , et al. May 10, 2 | 2016-05-10 |
Fin-type PIN diode array
Grant 9,318,622 - Logan , et al. April 19, 2 | 2016-04-19 |
Extremely thin semiconductor-on-insulator (ETSOI) layer
Grant 9,263,517 - Abadeer , et al. February 16, 2 | 2016-02-16 |
Structures, Methods And Applications For Electrical Pulse Anneal Processes
App 20160035717 - ABOU-KHALIL; Michel J. ; et al. | 2016-02-04 |
Structures, Methods And Applications For Electrical Pulse Anneal Processes
App 20160035716 - ABOU-KHALIL; Michel J. ; et al. | 2016-02-04 |
Precision trench capacitor
Grant 9,240,406 - Feng , et al. January 19, 2 | 2016-01-19 |
Semiconductor Device Including Soi Butted Junction To Reduce Short-channel Penalty
App 20150364491 - Ontalus; Viorel ; et al. | 2015-12-17 |
Mol Resistor With Metal Grid Heat Shield
App 20150364398 - Clark, JR.; William F. ; et al. | 2015-12-17 |
Use of contacts to create differential stresses on devices
Grant 9,196,528 - Ellis-Monaghan , et al. November 24, 2 | 2015-11-24 |
Precision Trench Capacitor
App 20150303191 - Feng; Kai D. ; et al. | 2015-10-22 |
Semiconductor device including SOI butted junction to reduce short-channel penalty
Grant 9,165,944 - Ontalus , et al. October 20, 2 | 2015-10-20 |
Junction Butting In Soi Transistor With Embedded Source/drain
App 20150270284 - Chou; Anthony I. ; et al. | 2015-09-24 |
ZRAM heterochannel memory
Grant 9,105,707 - Bryant , et al. August 11, 2 | 2015-08-11 |
Butted SOI junction isolation structures and devices and method of fabrication
Grant 9,105,718 - Johnson , et al. August 11, 2 | 2015-08-11 |
Semiconductor-on-insulator (SOI) structure with selectivity placed sub-insulator layer void(s) and method of forming the SOI structure
Grant 9,059,203 - Furukawa , et al. June 16, 2 | 2015-06-16 |
Measuring current and resistance using combined diodes/resistor structure to monitor integrated circuit manufacturing process variations
Grant 9,059,190 - Logan , et al. June 16, 2 | 2015-06-16 |
Creating extremely thin semiconductor-on-insulator (ETSOI) having substantially uniform thickness
Grant 9,018,024 - Berliner , et al. April 28, 2 | 2015-04-28 |
Semiconductor Device Including Soi Butted Junction To Reduce Short-channel Penalty
App 20150097243 - Ontalus; Viorel ; et al. | 2015-04-09 |
Structure and method to create a damascene local interconnect during metal gate deposition
Grant 8,993,428 - Ellis-Monaghan , et al. March 31, 2 | 2015-03-31 |
Zram Heterochannel Memory
App 20150028397 - BRYANT; Andres ; et al. | 2015-01-29 |
Integrated circuit including thermal gate, related method and design structure
Grant 8,912,630 - Rankin , et al. December 16, 2 | 2014-12-16 |
Silicon-on-insulator (soi) Body-contact Pass Gate Structure
App 20140347083 - Bryant; Andres ; et al. | 2014-11-27 |
Metal gate structures for CMOS transistor devices having reduced parasitic capacitance
Grant 8,815,669 - Cai , et al. August 26, 2 | 2014-08-26 |
Use of contacts to create differential stresses on devices
Grant 8,815,671 - Ellis-Monaghan , et al. August 26, 2 | 2014-08-26 |
Butted Soi Junction Isolation Structures And Devices And Method Of Fabrication
App 20140203359 - Johnson; Jeffrey B. ; et al. | 2014-07-24 |
Measuring Current And Resistance Using Combined Diodes/resistor Structure To Monitor Integrated Circuit Manufacturing Process Variations
App 20140191235 - Logan; Lyndon R. ; et al. | 2014-07-10 |
Butted SOI junction isolation structures and devices and method of fabrication
Grant 8,741,725 - Johnson , et al. June 3, 2 | 2014-06-03 |
Metal Gate Structures For Cmos Transistor Devices Having Reduced Parasitic Capacitance
App 20140138751 - Cai; Jin ; et al. | 2014-05-22 |
Structures, Methods And Applications For Electrical Pulse Anneal Processes
App 20140124903 - ABOU-KHALIL; Michel J. ; et al. | 2014-05-08 |
Measuring current and resistance using combined diodes/resistor structure to monitor integrated circuit manufacturing process variations
Grant 8,709,833 - Logan , et al. April 29, 2 | 2014-04-29 |
Metal gate structures for CMOS transistor devices having reduced parasitic capacitance
Grant 8,685,817 - Cai , et al. April 1, 2 | 2014-04-01 |
Compact thermally controlled thin film resistors utilizing substrate contacts and methods of manufacture
Grant 8,652,922 - Lukaitis , et al. February 18, 2 | 2014-02-18 |
Asymmetric hetero-structure FET and method of manufacture
Grant 8,637,871 - Anderson , et al. January 28, 2 | 2014-01-28 |
Semiconductor-on-insulator (soi) Structure With Selectively Placed Sub-insulator Layer Void(s) And Method Of Forming The Soi Structure
App 20140021548 - Furukawa; Toshiharu ; et al. | 2014-01-23 |
Semiconductor-on-insulator (SOI) structure with selectively placed sub-insulator layer void(s) and method of forming the SOI structure
Grant 8,610,211 - Furukawa , et al. December 17, 2 | 2013-12-17 |
Integrated Circuit Including Thermal Gate, Related Method And Design Structure
App 20130270678 - Rankin; Jed H. ; et al. | 2013-10-17 |
Compact thermally controlled thin film resistors utilizing substrate contacts and methods of manufacture
Grant 8,541,864 - Lukaitis , et al. September 24, 2 | 2013-09-24 |
Vertical silicide e-fuse
Grant 8,530,319 - Gebreselasie , et al. September 10, 2 | 2013-09-10 |
Use Of Contacts To Create Differential Stresses On Devices
App 20130210227 - Ellis-Monaghan; John J. ; et al. | 2013-08-15 |
Use Of Contacts To Create Differential Stresses On Devices
App 20130200434 - Ellis-Monaghan; John J. ; et al. | 2013-08-08 |
Extremely Thin Semiconductor-on-insulator (etsoi) Layer
App 20130200486 - Chatty; Kiran V. ; et al. | 2013-08-08 |
Thin film resistors and methods of manufacture
Grant 8,486,796 - Harmon , et al. July 16, 2 | 2013-07-16 |
Measuring Current And Resistance Using Combined Diodes/resistor Structure To Monitor Integrated Circuit Manufacturing Process Variations
App 20130161615 - Logan; Lyndon R. ; et al. | 2013-06-27 |
Methods and structures for increased thermal dissipation of thin film resistors
Grant 8,470,682 - Anderson , et al. June 25, 2 | 2013-06-25 |
Use of contacts to create differential stresses on devices
Grant 8,460,981 - Ellis-Monaghan , et al. June 11, 2 | 2013-06-11 |
High Performance Low Power Bulk Fet Device And Method Of Manufacture
App 20130113051 - Cai; Jin ; et al. | 2013-05-09 |
High performance low power bulk FET device and method of manufacture
Grant 8,361,872 - Cai , et al. January 29, 2 | 2013-01-29 |
Compact Thermally Controlled Thin Film Resistors Utilizing Substrate Contacts And Methods Of Manufacture
App 20120313215 - LUKAITIS; Joseph M. ; et al. | 2012-12-13 |
Uniformly Aligned Well And Isolation Regions In A Substrate And Resulting Structure
App 20120280356 - Abadeer; Wagdi W. ; et al. | 2012-11-08 |
Compact thermally controlled thin film resistors utilizing substrate contacts and methods of manufacture
Grant 8,298,904 - Lukaitis , et al. October 30, 2 | 2012-10-30 |
Structure and Method for Manufacturing Asymmetric Devices
App 20120217585 - Nayfeh; Hasan M. ; et al. | 2012-08-30 |
Structure and method for manufacturing asymmetric devices
Grant 8,232,151 - Nayfeh , et al. July 31, 2 | 2012-07-31 |
Method of generating uniformly aligned well and isolation regions in a substrate and resulting structure
Grant 8,232,177 - Abadeer , et al. July 31, 2 | 2012-07-31 |
Compact Thermally Controlled Thin Film Resistors Utilizing Substrate Contacts And Methods Of Manufacture
App 20120184080 - LUKAITIS; Joseph M. ; et al. | 2012-07-19 |
Compact Thermally Controlled Thin Film Resistors Utilizing Substrate Contacts And Methods Of Manufacture
App 20120181663 - LUKAITIS; Joseph M. ; et al. | 2012-07-19 |
Methods And Structures For Increased Thermal Dissipation Of Thin Film Resistors
App 20120146187 - ANDERSON; Brent A. ; et al. | 2012-06-14 |
Thin Film Resistors And Methods Of Manufacture
App 20120126370 - HARMON; David L. ; et al. | 2012-05-24 |
Asymmetric Hetero-structure Fet And Method Of Manufacture
App 20120112206 - ANDERSON; Brent A. ; et al. | 2012-05-10 |
Butted Soi Junction Isolation Structures And Devices And Method Of Fabrication
App 20120112280 - Johnson; Jeffrey B. ; et al. | 2012-05-10 |
Silicon-on-insulator (soi) Body-contact Pass Gate Structure
App 20120105095 - Bryant; Andres ; et al. | 2012-05-03 |
Forming An Extremely Thin Semiconductor-on-insulator (etsoi) Layer
App 20120098087 - Abadeer; Wagdi W. ; et al. | 2012-04-26 |
Vertical Silicide E-fuse
App 20120091556 - Gebreselasie; Ephrem G. ; et al. | 2012-04-19 |
Use Of Contacts To Create Differential Stresses On Devices
App 20120074501 - Ellis-Monaghan; John J. ; et al. | 2012-03-29 |
Use Of Contacts To Create Differential Stresses On Devices
App 20120074502 - Ellis-Monaghan; John J. ; et al. | 2012-03-29 |
High Performance Low Power Bulk Fet Device And Method Of Manufacture
App 20120056275 - CAI; Jin ; et al. | 2012-03-08 |
Forming an extremely thin semiconductor-on-insulator (ETSOI) layer
Grant 8,110,483 - Abadeer , et al. February 7, 2 | 2012-02-07 |
Semiconductor-on-insulator (soi) Structure With Selectively Placed Sub-insulator Layer Void(s) And Method Of Forming The Soi Structure
App 20120018806 - Furukawa; Toshiharu ; et al. | 2012-01-26 |
Enhanced stress-retention fin-FET devices and methods of fabricating enhanced stress retention fin-FET devices
Grant 8,084,822 - Chatty , et al. December 27, 2 | 2011-12-27 |
Semiconductor structure incorporating multiple nitride layers to improve thermal dissipation away from a device and a method of forming the structure
Grant 8,053,870 - Anderson , et al. November 8, 2 | 2011-11-08 |
Structure And Method For Manufacturing Asymmetric Devices
App 20110254059 - Nayfeh; Hasan M. ; et al. | 2011-10-20 |
Structure and method for manufacturing asymmetric devices
Grant 8,034,692 - Nayfeh , et al. October 11, 2 | 2011-10-11 |
Semispherical integrated circuit structures
Grant 7,986,022 - Cheng , et al. July 26, 2 | 2011-07-26 |
Semispherical Integrated Circuit Structures
App 20110115054 - Cheng; Kangguo ; et al. | 2011-05-19 |
Stress Memorization Technique Using Silicon Spacer
App 20110101506 - Butt; Shahid A. ; et al. | 2011-05-05 |
Reduced floating body effect without impact on performance-enhancing stress
Grant 7,936,017 - Clark, Jr. , et al. May 3, 2 | 2011-05-03 |
Creating Extremely Thin Semiconductor-on-insulator (etsoi) Having Substantially Uniform Thickness
App 20110095393 - Berliner; Nathaniel C. ; et al. | 2011-04-28 |
Forming An Extremely Thin Semiconductor-on-insulator (etsoi) Layer
App 20110095366 - Abadeer; Wagdi W. ; et al. | 2011-04-28 |
Structure And Method For Manufacturing Asymmetric Devices
App 20110089499 - Nayfeh; Hasan M. ; et al. | 2011-04-21 |
Structure And Method To Create A Damascene Local Interconnect During Metal Gate Deposition
App 20110079827 - ELLIS-MONAGHAN; John J. ; et al. | 2011-04-07 |
Enhanced Stress-retention Fin-fet Devices And Methods Of Fabricating Enhanced Stress Retention Fin-fet Devices
App 20110073951 - Chatty; Kiran V. ; et al. | 2011-03-31 |
Method of Generating Uniformly Aligned Well and Isolation Regions in a Substrate and Resulting Structure
App 20110073985 - Abadeer; Wagdi W. ; et al. | 2011-03-31 |
Structures, Methods And Applications For Electrical Pulse Anneal Processes
App 20110049683 - Abou-Khalil; Michel J. ; et al. | 2011-03-03 |
SOI transistor with merged lateral bipolar transistor
Grant 7,808,039 - Cai , et al. October 5, 2 | 2010-10-05 |
Methods for fabricating active devices on a semiconductor-on-insulator substrate utilizing multiple depth shallow trench isolations
Grant 7,790,564 - Abadeer , et al. September 7, 2 | 2010-09-07 |
Enhanced stress-retention silicon-on-insulator devices and methods of fabricating enhanced stress retention silicon-on-insulator devices
Grant 7,737,498 - Chatty , et al. June 15, 2 | 2010-06-15 |
Device structures for active devices fabricated using a semiconductor-on-insulator substrate and design structures for a radiofrequency integrated circuit
Grant 7,709,926 - Abadeer , et al. May 4, 2 | 2010-05-04 |
Reduced Floating Body Effect Without Impact on Performance-Enhancing Stress
App 20090283828 - Clark, JR.; William F. ; et al. | 2009-11-19 |
Enhanced Stress-retention Silicon-on-insulator Devices And Methods Of Fabricating Enhanced Stress Retention Silicon-on-insulator Devices
App 20090278201 - Chatty; Kiran V. ; et al. | 2009-11-12 |
Device Structures For Active Devices Fabricated Using A Semiconductor-on-insulator Substrate And Design Structures For A Radiofrequency Integrated Circuit
App 20090267178 - Abadeer; Wagdi W. ; et al. | 2009-10-29 |
Methods For Fabricating Active Devices On A Semiconductor-on-insulator Substrate Utilizing Multiple Depth Shallow Trench Isolations
App 20090269903 - Abadeer; Wagdi W. ; et al. | 2009-10-29 |
Soi Transistor With Merged Lateral Bipolar Transistor
App 20090256204 - Cai; Jin ; et al. | 2009-10-15 |
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