loadpatents
name:-0.024982929229736
name:-0.031229972839355
name:-0.0078599452972412
Rengarajan; Krishnan S. Patent Filings

Rengarajan; Krishnan S.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Rengarajan; Krishnan S..The latest application filed is for "feed forward equalizer with power-optimized distributed arithmetic architecture and method".

Company Profile
9.34.28
  • Rengarajan; Krishnan S. - Bangalore IN
  • Rengarajan; Krishnan S. - Bengaluru IN
  • Rengarajan; Krishnan S. - Karnataka IN
  • Rengarajan; Krishnan S - Karnataka IN
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Fully digital, static, true single-phase clock (TSPC) flip-flop
Grant 10,840,892 - Rengarajan , et al. November 17, 2
2020-11-17
Tunable negative bitline write assist and boost attenuation circuit
Grant 10,783,958 - Chandra , et al. Sept
2020-09-22
Tunable negative bitline write assist and boost attenuation circuit
Grant 10,783,956 - Chandra , et al. Sept
2020-09-22
Feed forward equalizer with power-optimized distributed arithmetic architecture and method
Grant 10,721,104 - Rengarajan , et al.
2020-07-21
Low-power Scan Flip-flop
App 20200186131 - Rengarajan; Krishnan S. ;   et al.
2020-06-11
Feed Forward Equalizer With Power-optimized Distributed Arithmetic Architecture And Method
App 20200186401 - Rengarajan; Krishnan S. ;   et al.
2020-06-11
Low-power scan flip-flop
Grant 10,659,017 - Rengarajan , et al.
2020-05-19
Scoped search engine
Grant 10,489,455 - Adams , et al. Nov
2019-11-26
On-demand feed forward equalizer with distributed arithmetic architecture and method
Grant 10,447,510 - Rengarajan , et al. Oc
2019-10-15
Tunable Negative Bitline Write Assist And Boost Attenuation Circuit
App 20190304536 - CHANDRA; Dinesh ;   et al.
2019-10-03
Feed forward equalizer with power-optimized distributed arithmetic architecture and method
Grant 10,432,436 - Rengarajan , et al. O
2019-10-01
Tunable negative bit line write assist and boost attenuation circuit
Grant 10,319,431 - Chandra , et al.
2019-06-11
Tunable Negative Bitline Write Assist And Boost Attenuation Circuit
App 20190147946 - CHANDRA; Dinesh ;   et al.
2019-05-16
Tunable negative bitline write assist and boost attenuation circuit
Grant 10,217,510 - Chandra , et al. Feb
2019-02-26
Tunable negative bitline write assist and boost attenuation circuit
Grant 9,984,742 - Chandra , et al. May 29, 2
2018-05-29
Tunable Negative Bitline Write Assist And Boost Attenuation Circuit
App 20180130522 - CHANDRA; Dinesh ;   et al.
2018-05-10
Tunable Negative Bitline Write Assist And Boost Attenuation Circuit
App 20180068717 - CHANDRA; Dinesh ;   et al.
2018-03-08
Minimization of bias temperature instability (BTI) degradation in circuits
Grant 9,859,873 - Agarwal , et al. January 2, 2
2018-01-02
Tunable negative bitline write assist and boost attenuation circuit
Grant 9,847,119 - Chandra , et al. December 19, 2
2017-12-19
Disturb free bitcell and array
Grant 9,589,658 - Agarwal , et al. March 7, 2
2017-03-07
Disturb Free Bitcell And Array
App 20170053705 - AGARWAL; Navin ;   et al.
2017-02-23
Circuit to improve SRAM stability
Grant 9,570,155 - Braceras , et al. February 14, 2
2017-02-14
Boost control to improve SRAM write operation
Grant 9,548,104 - Braceras , et al. January 17, 2
2017-01-17
Tunable Negative Bitline Write Assist And Boost Attenuation Circuit
App 20170004876 - CHANDRA; Dinesh ;   et al.
2017-01-05
Boost Control To Improve Sram Write Operation
App 20170004874 - Braceras; George M. ;   et al.
2017-01-05
Circuit To Improve Sram Stability
App 20160365139 - Braceras; George M. ;   et al.
2016-12-15
Tunable negative bitline write assist and boost attenuation circuit
Grant 9,496,025 - Chandra , et al. November 15, 2
2016-11-15
Data-dependent self-biased differential sense amplifier
Grant 9,460,760 - Jayaraman , et al. October 4, 2
2016-10-04
High performance sense amplifier
Grant 9,437,282 - Braceras , et al. September 6, 2
2016-09-06
Tunable Negative Bitline Write Assist And Boost Attenuation Circuit
App 20160232966 - CHANDRA; Dinesh ;   et al.
2016-08-11
Data-dependent Self-biased Differential Sense Amplifier
App 20160217832 - Jayaraman; Balaji ;   et al.
2016-07-28
Tunable Negative Bitline Write Assist And Boost Attenuation Circuit
App 20160203857 - CHANDRA; Dinesh ;   et al.
2016-07-14
Minimization Of Bias Temperature Instability (bti) Degradation In Circuits
App 20160164497 - Agarwal; Navin ;   et al.
2016-06-09
Scoped Search Engine
App 20160140243 - Adams; Samuel S. ;   et al.
2016-05-19
Method for defining a default state of a charge trap based memory cell
Grant 9,324,430 - Chishti , et al. April 26, 2
2016-04-26
Low power sense amplifier for static random access memory
Grant 9,286,969 - Agarwal , et al. March 15, 2
2016-03-15
Refresh hidden eDRAM memory
Grant 9,281,045 - Anand , et al. March 8, 2
2016-03-08
Bias temperature instability state detection and correction
Grant 9,251,890 - Agarwal , et al. February 2, 2
2016-02-02
Memory cells with read access schemes
Grant 9,236,116 - Braceras , et al. January 12, 2
2016-01-12
Low Power Sense Amplifier For Static Random Access Memory
App 20150380079 - Agarwal; Pankaj ;   et al.
2015-12-31
Method For Defining A Default State of a Charge Trap Based Memory Cell
App 20150318043 - Chishti; Sheikh Sabiq ;   et al.
2015-11-05
Sense amplifier for static random access memory with a pair of complementary data lines isolated from a corresponding pair of complementary bit lines
Grant 9,047,980 - Agarwal , et al. June 2, 2
2015-06-02
Crosstalk compensation for high speed, reduced swing circuits
Grant 8,797,096 - Nalawade , et al. August 5, 2
2014-08-05
Sense Amplifier For Static Random Access Memory
App 20140036581 - Agarwal; Pankaj ;   et al.
2014-02-06
Asymmetric memory cells
Grant 8,593,861 - Braceras , et al. November 26, 2
2013-11-26
Crosstalk Compensation For High Speed, Reduced Swing Circuits
App 20130147547 - NALAWADE; Prasad S. ;   et al.
2013-06-13
Dynamic Wordline Assist Scheme To Improve Performance Tradeoff In Sram
App 20130121065 - Agarwal; Pankaj ;   et al.
2013-05-16
Dynamic wordline assist scheme to improve performance tradeoff in SRAM
Grant 8,427,896 - Agarwal , et al. April 23, 2
2013-04-23
Asymmetric Memory Cells
App 20130088931 - BRACERAS; George M. ;   et al.
2013-04-11
Reset circuit for termination of tracking circuits in self timed compiler memories
Grant 7,755,949 - Rengarajan , et al. July 13, 2
2010-07-13
Reset Circuit For Termination Of Tracking Circuits In Self Timed Compiler Memories
App 20100046309 - RENGARAJAN; KRISHNAN S. ;   et al.
2010-02-25
Novel High Performance, Area Efficient Direct Bitline Sensing Circuit
App 20090147605 - Rengarajan; Krishnan S. ;   et al.
2009-06-11
Match sensing circuit for a content addressable memory device
Grant 7,372,713 - Kuliyampattil , et al. May 13, 2
2008-05-13
Match Sensing Circuit For A Content Addressable Memory Device
App 20070242493 - Kuliyampattil; Nisha Padattil ;   et al.
2007-10-18

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