loadpatents
name:-0.025442838668823
name:-0.02006983757019
name:-0.00055885314941406
REMEZ; Offir Patent Filings

REMEZ; Offir

Patent Applications and Registrations

Patent applications and USPTO patent grants for REMEZ; Offir.The latest application filed is for "methods for control of pandemics by widespread gathered data from accessible tools".

Company Profile
0.19.30
  • REMEZ; Offir - Ramat Gan IL
  • Remez; Offir - Hod HaSharon IL
  • Remez; Offir - Kfar Netter IL
  • Remez; Offir - Hos HaSharon IL
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Methods For Control Of Pandemics By Widespread Gathered Data From Accessible Tools
App 20210366622 - ZAKAY; Nir ;   et al.
2021-11-25
Silicon chip of a monolithic construction for use in implementing multiple graphic cores in a graphics processing and display subsystem
Grant 9,659,340 - Remez , et al. May 23, 2
2017-05-23
Application-transparent resolution control by way of command stream interception
App 20160232643 - Bakalash; Reuven ;   et al.
2016-08-11
Method of dynamic load-balancing within a PC-based computing system employing a multiple GPU-based graphics pipeline architecture supporting multiple modes of GPU parallelization
Grant 9,405,586 - Remez August 2, 2
2016-08-02
Application-transparent resolution control by way of command stream interception
App 20160027142 - Bakalash; Reuven ;   et al.
2016-01-28
Application-transparent resolution control by way of command stream interception
Grant 9,082,196 - Bakalash , et al. July 14, 2
2015-07-14
Silicon Chip Of A Monolithic Construction For Use In Implementing Multiple Graphic Cores In A Graphics Processing And Display Subsystem
App 20140292775 - REMEZ; Offir ;   et al.
2014-10-02
Silicon chip of a monolithic construction for use in implementing multiple graphic cores in a graphics processing and display subsystem
Grant 8,754,897 - Bakalash , et al. June 17, 2
2014-06-17
Method Of Dynamic Load-balancing Within A Pc-based Computing System Employing A Multiple Gpu-based Graphics Pipeline Architecture Supporting Multiple Modes Of Gpu Parallelization
App 20140125682 - BAKALASH; Reuven ;   et al.
2014-05-08
Method of and system for time-division based parallelization of graphics processing units (GPUs) employing a hardware hub with router interfaced between the CPU and the GPUs for the transfer of geometric data and graphics commands and rendered pixel data within the system
Grant 8,629,877 - Bakalash , et al. January 14, 2
2014-01-14
Application-transparent resolution control by way of command stream interception
App 20130176322 - Bakalash; Reuven ;   et al.
2013-07-11
Method Of And Subsystem For Graphics Processing In A Pc-level Computing System
App 20110279462 - Bakalash; Reuven ;   et al.
2011-11-17
Silicon Chip Of A Monolithic Construction For Use In Implementing Multiple Graphic Cores In A Graphics Processing And Display Subsystem
App 20110169841 - Bakalash; Reuven ;   et al.
2011-07-14
PC-based computing systems employing a bridge chip having a routing unit for distributing geometrical data and graphics commands to parallelized GPU-driven pipeline cores supported on a plurality of graphics cards and said bridge chip during the running of a graphics application
Grant 7,843,457 - Bakalash , et al. November 30, 2
2010-11-30
Graphics processing and display system employing multiple graphics cores on a silicon chip of monolithic construction
Grant 7,834,880 - Bakalash , et al. November 16, 2
2010-11-16
PC-based computing system employing a silicon chip implementing parallelized GPU-driven pipelines cores supporting multiple modes of parallelization dynamically controlled while running a graphics application
Grant 7,812,845 - Bakalash , et al. October 12, 2
2010-10-12
PC-based computing system employing a silicon chip of monolithic construction having a routing unit, a control unit and a profiling unit for parallelizing the operation of multiple GPU-driven pipeline cores according to the object division mode of parallel operation
Grant 7,812,846 - Bakalash , et al. October 12, 2
2010-10-12
PC-based computing system employing a silicon chip having a routing unit and a control unit for parallelizing multiple GPU-driven pipeline cores according to the object division mode of parallel operation during the running of a graphics application
Grant 7,812,844 - Bakalash , et al. October 12, 2
2010-10-12
PC-based computing system employing parallelized graphics processing units (GPUS) interfaced with the central processing unit (CPU) using a PC bus and a hardware graphics hub having a router
Grant 7,808,499 - Bakalash , et al. October 5, 2
2010-10-05
PC-based computing system having an integrated graphics subsystem supporting parallel graphics processing operations across a plurality of different graphics processing units (GPUS) from the same or different vendors, in a manner transparent to graphics applications
Grant 7,808,504 - Bakalash , et al. October 5, 2
2010-10-05
Graphics hub subsystem for interfacing parallalized graphics processing units (GPUs) with the central processing unit (CPU) of a PC-based computing system having an CPU interface module and a PC bus
Grant 7,800,611 - Bakalash , et al. September 21, 2
2010-09-21
PC-based computing system employing a multi-GPU graphics pipeline architecture supporting multiple modes of GPU parallelization dymamically controlled while running a graphics application
Grant 7,800,610 - Bakalash , et al. September 21, 2
2010-09-21
Method of providing a PC-based computing system with parallel graphics processing capabilities
Grant 7,800,619 - Bakalash , et al. September 21, 2
2010-09-21
PC-based computing system employing multiple graphics processing units (GPUS) interfaced with the central processing unit (CPU) using a PC bus and a hardware hub, and parallelized according to the object division mode of parallel operation
Grant 7,796,130 - Bakalash , et al. September 14, 2
2010-09-14
Multi-GPU graphics processing subsystem for installation in a PC-based computing system having a central processing unit (CPU) and a PC bus
Grant 7,796,129 - Bakalash , et al. September 14, 2
2010-09-14
Graphics Processing and Display System Employing Multiple Graphics Cores on a Silicon Chip of Monolithic Construction
App 20090096798 - Bakalash; Reuven ;   et al.
2009-04-16
Graphics hub subsystem for interfacing parallalized graphics processing units (GPUS) with the central processing unit (CPU) of a PC-based computing system having an CPU interface module and a PC bus
App 20080238917 - Bakalash; Reuven ;   et al.
2008-10-02
Method of providing a PC-based computing system with parallel graphics processing capabilities
App 20080165198 - Bakalash; Reuven ;   et al.
2008-07-10
PC-based computing system employing multiple graphics processing units (GPUS) interfaced with the central processing unit (CPU) using a PC bus and a hardware hub, and parallelized according to the object division mode of parallel operation
App 20080165184 - Bakalash; Reuven ;   et al.
2008-07-10
Method of dynamic load-balancing within a PC-based computing system employing a multiple GPU-based graphics pipeline architecture supporting multiple modes of GPU parallelization
App 20080165196 - Bakalash; Reuven ;   et al.
2008-07-10
Multi-GPU graphics processing subsystem for installation in a PC-based computing system having a central processing unit (CPU) and a PC bus
App 20080165197 - Bakalash; Reuven ;   et al.
2008-07-10
PC-based computing system employing a silicon chip with a routing unit to distribute geometrical data and graphics commands to multiple GPU-driven pipeline cores during a mode of parallel operation
App 20080136826 - Bakalash; Reuven ;   et al.
2008-06-12
PC-based computing system employing a silicon chip having a routing unit and a control unit for parallelizing multiple GPU-driven pipeline cores during a graphics application
App 20080136827 - Bakalash; Reuven ;   et al.
2008-06-12
PC-based computing system employing a multi-GPU graphics pipeline architecture supporting multiple modes of GPU parallelization dymamically controlled while running a graphics application
App 20080136825 - Bakalash; Reuven ;   et al.
2008-06-12
PC-based computing system employing a silicon chip implementing parallelized GPU-driven pipelines cores supporting multiple modes of parallelization dynamically controlled while running a graphics application
App 20080129744 - Bakalash; Reuven ;   et al.
2008-06-05
Graphics subsytem for integation in a PC-based computing system and providing multiple GPU-driven pipeline cores supporting multiple modes of parallelization dynamically controlled while running a graphics application
App 20080129745 - Bakalash; Reuven ;   et al.
2008-06-05
PC-based computing system employing a bridge chip having a routing unit and a control unit for parallelizing multiple GPU-driven pipeline cores during the running of a graphics application
App 20080129742 - Bakalash; Reuven ;   et al.
2008-06-05
Silicon chip of monolithic construction for integration in a PC-based computing system and having multiple GPU-driven pipeline cores supporting multiple modes of parallelization dynamically controlled while running a graphics application
App 20080129743 - Bakalash; Reuven ;   et al.
2008-06-05
PC-based computing system employing a bridge chip having a routing unit, a control unit and a profiling unit for parallelizing the operation of multiple GPU-driven pipeline cores according to the object division mode of parallel operation
App 20080129741 - Bakalash; Reuven ;   et al.
2008-06-05
PC-based computing system employing a bridge chip implementing parallelized GPU-driven pipelines cores supporting multiple modes of parallelization dynamically controlled while running a graphics application
App 20080122850 - Bakalash; Reuven ;   et al.
2008-05-29
PC-based computing systems employing a bridge chip having a routing unit for distributing geometrical data and graphics commands to parallelized GPU-driven pipeline cores during the running of a graphics application
App 20080122851 - Bakalash; Reuven ;   et al.
2008-05-29
PC-based computing system employing parallelized GPU-driven pipeline cores integrated with a routing unit and control unit on a silicon chip of monolithic construction
App 20080117218 - Bakalash; Reuven ;   et al.
2008-05-22
PC-based computing system employing a silicon chip of monolithic construction having a routing unit, a control unit and a profiling unit for parallelizing the operation of multiple GPU-driven pipeline cores according to the object division mode of parallel operation
App 20080117219 - Bakalash; Reuven ;   et al.
2008-05-22
Method and System for Multiple 3-D Graphic Pipeline Over a Pc Bus
App 20070279411 - Bakalash; Reuven ;   et al.
2007-12-06
Graphics processing and display system employing multiple graphics cores on a silicon chip of monolithic construction
App 20060279577 - Bakalash; Reuven ;   et al.
2006-12-14
Graphics processing and display system employing multiple graphics cores on a silicon chip of monolithic construction
App 20060232590 - Bakalash; Reuven ;   et al.
2006-10-19

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