PRAMANIK; Dipankar

Patent Applications and Registrations

Patent applications and USPTO patent grants for PRAMANIK; Dipankar.The latest application filed is for "ligand-targeted molecules and methods thereof".

Company Profile

0.136.135

PRAMANIK; Dipankar - Delhi IN
Pramanik; Dipankar - Saratoga CA
Pramanik; Dipankar - Baltimore MD
Pramanik; Dipankar - Cupertino CA
Pramanik; Dipankar - Union City CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Ligand-targeted Molecules And Methods Thereof App 20180104353 - SENGUPTA; Shiladitya ; et al.	2018-04-19
Ligand-targeted molecules and methods thereof Grant 9,884,123 - Sengupta , et al. February 6, 2	2018-02-06
Hydrogenated amorphous silicon dielectric for superconducting devices Grant 9,593,414 - Barabash , et al. March 14, 2	2017-03-14
Method for suppressing lattice defects in a semiconductor substrate Grant 9,472,423 - Moroz , et al. October 18, 2	2016-10-18
Analysis of stress impact on transistor performance Grant 9,465,897 - Moroz , et al. October 11, 2	2016-10-11
Superconducting circuits with reduced microwave absorption Grant 9,455,073 - Barabash , et al. September 27, 2	2016-09-27
Zinc blende cadmium--manganese--telluride with reduced hole compensation effects and methods for forming the same Grant 9,431,569 - Barabash , et al. August 30, 2	2016-08-30
Methods for Forming Ferroelectric Phases in Materials and Devices Utilizing the Same App 20160181091 - Niyogi; Sandip ; et al.	2016-06-23
Using Metal Silicides as Electrodes for MSM Stack in Selector for Non-Volatile Memory Application App 20160149129 - Bodke; Ashish ; et al.	2016-05-26
Simultaneous Carbon and Nitrogen Doping of Si in MSM Stack as a Selector Device for Non-Volatile Memory Application App 20160148976 - Bodke; Ashish ; et al.	2016-05-26
Method for forming metal oxides and silicides in a memory device Grant 9,343,673 - Pramanik , et al. May 17, 2	2016-05-17
Photo-induced MSM stack Grant 9,337,238 - Kashefi , et al. May 10, 2	2016-05-10
Nonvolatile resistive memory element with an oxygen-gettering layer Grant 9,331,276 - Chiang , et al. May 3, 2	2016-05-03
Creating an embedded ReRAM memory from a high-k metal gate transistor structure Grant 9,331,279 - Pramanik , et al. May 3, 2	2016-05-03
Photo-Induced MSM Stack App 20160118440 - Kashefi; Kevin ; et al.	2016-04-28
Fluorine passivation of dielectric for superconducting electronics Grant 9,297,067 - Pramanik , et al. March 29, 2	2016-03-29
System and method for modifying a data set of a photomask Grant 9,292,627 - Pramanik , et al. March 22, 2	2016-03-22
Multi-level memory array having resistive elements for multi-bit data storage Grant 9,275,727 - Pramanik , et al. March 1, 2	2016-03-01
Electrode for low-leakage devices Grant 9,245,941 - Barabash , et al. January 26, 2	2016-01-26
Tunneling barrier creation in MSM stack as a selector device for non-volatile memory application Grant 9,246,092 - Bodke , et al. January 26, 2	2016-01-26
Switching conditions for resistive random access memory cells Grant 9,240,236 - Barabash , et al. January 19, 2	2016-01-19
Capacitors including inner and outer electrodes Grant 9,224,799 - Barabash , et al. December 29, 2	2015-12-29
Deposition of rutile films with very high dielectric constant Grant 9,222,170 - Barabash , et al. December 29, 2	2015-12-29
Analysis of stress impact on transistor performance Grant 9,189,580 - Moroz , et al. November 17, 2	2015-11-17
Method for forming ReRAM chips operating at low operating temperatures Grant 9,177,996 - Pramanik , et al. November 3, 2	2015-11-03
Amorphous silicon doped with fluorine for selectors of resistive random access memory cells Grant 9,177,916 - Barabash , et al. November 3, 2	2015-11-03
Deposition of anisotropic dielectric layers orientationally matched to the physically separated substrate Grant 9,178,011 - Barabash , et al. November 3, 2	2015-11-03
Superconducting Circuits with Reduced Microwave Absorption App 20150313046 - Barabash; Sergey ; et al.	2015-10-29
Multi-Level Memory Array Having Resistive Elements for Multi-Bit Data Storage App 20150310910 - Pramanik; Dipankar ; et al.	2015-10-29
Analysis of stress impact on transistor performance Grant 9,141,737 - Moroz , et al. September 22, 2	2015-09-22
Methods of Manufacturing Embedded Bipolar Switching Resistive Memory App 20150262663 - Lee; Mankoo ; et al.	2015-09-17
Atomic layer deposition of metal oxide materials for memory applications Grant 9,130,165 - Wang , et al. September 8, 2	2015-09-08
Creating An Embedded ReRam Memory From A High-K Metal Gate Transistor Structure App 20150236260 - Pramanik; Dipankar ; et al.	2015-08-20
Method of depositing films with narrow-band conductive properties Grant 9,105,704 - Barabash , et al. August 11, 2	2015-08-11
Methods to characterize an embedded interface of a CMOS gate stack Grant 9,099,488 - Niyogi , et al. August 4, 2	2015-08-04
Catalytic growth of Josephson junction tunnel barrier Grant 9,082,927 - Pramanik , et al. July 14, 2	2015-07-14
Methods of manufacturing embedded bipolar switching resistive memory Grant 9,076,523 - Lee , et al. July 7, 2	2015-07-07
Zinc Blende Cadmium-Manganese-Telluride with Reduced Hole Compensation Effects and Methods for Forming the Same App 20150187982 - Barabash; Sergey ; et al.	2015-07-02
Hydrogenated Amorphous Silicon Dielectric for Superconducting Devices App 20150184286 - Barabash; Sergey ; et al.	2015-07-02
Capacitors Including Inner and Outer Electrodes App 20150187865 - Barabash; Sergey ; et al.	2015-07-02
Methods to Characterize an Embedded Interface of a CMOS Gate Stack App 20150179757 - Niyogi; Sandip ; et al.	2015-06-25
Catalytic Growth of Josephson Junction Tunnel Barrier App 20150179916 - Pramanik; Dipankar ; et al.	2015-06-25
Fluorine Passivation During Deposition of Dielectrics for Superconducting Electronics App 20150179915 - Greer; Frank ; et al.	2015-06-25
Fluorine Passivation of Dielectric for Superconducting Electronics App 20150179913 - Pramanik; Dipankar ; et al.	2015-06-25
Resistive random access memory cells having metal alloy current limiting layers Grant 9,054,307 - Wang , et al. June 9, 2	2015-06-09
Creating an embedded ReRAM memory from a high-k metal gate transistor structure Grant 9,054,032 - Pramanik , et al. June 9, 2	2015-06-09
Nonvolatile resistive memory element with an oxygen-gettering layer App 20150155485 - Chiang; Tony P. ; et al.	2015-06-04
Method for Forming Metal Oxides and Silicides in a Memory Device App 20150123071 - Pramanik; Dipankar ; et al.	2015-05-07
Site-isolated rapid thermal processing methods and apparatus Grant 9,023,739 - Korczynski , et al. May 5, 2	2015-05-05
Method for improving data retention of ReRAM chips operating at low operating temperatures Grant 9,025,360 - Pramanik , et al. May 5, 2	2015-05-05
Barrier design for steering elements Grant 9,019,744 - Barabash , et al. April 28, 2	2015-04-28
Controlling ReRam forming voltage with doping Grant 9,012,260 - Barabash , et al. April 21, 2	2015-04-21
ReRAM materials stack for low-operating-power and high-density applications Grant 9,000,407 - Wang , et al. April 7, 2	2015-04-07
Multi-level memory array having resistive elements for multi-bit data storage Grant 8,995,166 - Pramanik , et al. March 31, 2	2015-03-31
Memory device having an integrated two-terminal current limiting resistor Grant 8,987,865 - Pramanik , et al. March 24, 2	2015-03-24
Amorphous IGZO Devices and Methods for Forming the Same App 20150079727 - Lee; Mankoo ; et al.	2015-03-19
Nonvolatile resistive memory element with an oxygen-gettering layer Grant 8,981,332 - Chiang , et al. March 17, 2	2015-03-17
Method for forming metal oxides and silicides in a memory device Grant 8,975,114 - Pramanik , et al. March 10, 2	2015-03-10
Memory cell having an integrated two-terminal current limiting resistor Grant 8,975,727 - Wang , et al. March 10, 2	2015-03-10
Fullerene-based capacitor electrode Grant 8,975,134 - Barabash , et al. March 10, 2	2015-03-10
Controlling ReRam Forming Voltage with Doping App 20150064873 - Barabash; Sergey ; et al.	2015-03-05
Atomic Layer Deposition of Metal Oxide Materials for Memory Applications App 20150056749 - Wang; Yun ; et al.	2015-02-26
Ligand-targeted Molecules And Methods Thereof App 20150045428 - Sengupta; Shiladitya ; et al.	2015-02-12
Nonvolatile Resistive Memory Element With an Integrated Oxygen Isolation Structure App 20150017780 - Wang; Yun ; et al.	2015-01-15
Flourine-stabilized interface Grant 8,921,181 - Pramanik December 30, 2	2014-12-30
Multifunctional Electrode App 20140374240 - Pham; Hieu ; et al.	2014-12-25
Resistive random access memory cells having doped current limiting layers Grant 8,912,518 - Chi , et al. December 16, 2	2014-12-16
Multifunctional electrode Grant 8,906,736 - Pham , et al. December 9, 2	2014-12-09
Controlling ReRam forming voltage with doping Grant 8,907,313 - Barabash , et al. December 9, 2	2014-12-09
MoOx-based resistance switching materials Grant 8,907,314 - Barabash , et al. December 9, 2	2014-12-09
ReRAM materials stack for low-operating-power and high-density applications App 20140353566 - Wang; Yun ; et al.	2014-12-04
Memory device with a textured lowered electrode Grant 8,895,390 - Pramanik November 25, 2	2014-11-25
Atomic layer deposition of metal oxide materials for memory applications Grant 8,883,655 - Wang , et al. November 11, 2	2014-11-11
Analysis of stress impact on transistor performance Grant 8,881,073 - Moroz , et al. November 4, 2	2014-11-04
Nonvolatile resistive memory element with an integrated oxygen isolation structure Grant 8,878,152 - Wang , et al. November 4, 2	2014-11-04
Creating An Embedded ReRam Memory From A High-K Metal Gate Transistor Structure App 20140319449 - Pramanik; Dipankar ; et al.	2014-10-30
Diffusion barriers Grant 8,871,601 - Zhang , et al. October 28, 2	2014-10-28
Resistive Random Access Memory Cells Having METAL ALLOY Current Limiting layers App 20140315369 - Wang; Yun ; et al.	2014-10-23
Multifunctional electrode Grant 8,859,328 - Pham , et al. October 14, 2	2014-10-14
Low-emissivity coatings Grant 8,859,093 - Zhang , et al. October 14, 2	2014-10-14
Low temperature migration enhanced Si-Ge epitaxy with plasma assisted surface activation App 20140299056 - Kraus; Philip ; et al.	2014-10-09
Memory Device Having An Integrated Two-Terminal Current Limiting Resistor App 20140299834 - Pramanik; Dipankar ; et al.	2014-10-09
Circular transmission line methods compatible with combinatorial processing of semiconductors Grant 8,854,067 - Joshi , et al. October 7, 2	2014-10-07
Methods of Plasma Surface Treatment in a PVD Chamber App 20140262749 - Bodke; Ashish ; et al.	2014-09-18
Performance Enhancement of Forming-Free ReRAM Devices Using 3D Nanoparticles App 20140264224 - Zhang; Xuena ; et al.	2014-09-18
Method for Improving Data Retention of ReRAM Chips Operating at Low Operating Temperatures App 20140269004 - Pramanik; Dipankar ; et al.	2014-09-18
Electrode for Low-Leakage Devices App 20140273427 - Barabash; Sergey ; et al.	2014-09-18
Nonvolatile resistive memory element with an oxygen-gettering layer App 20140268993 - Chiang; Tony P. ; et al.	2014-09-18
Ultrathin Coating for One Way Mirror Applications App 20140268377 - Zhang; Xuena ; et al.	2014-09-18
Fluorine Passivation in CMOS Image Sensors App 20140264507 - Lee; Mankoo ; et al.	2014-09-18
Method for Forming ReRAM Chips Operating at Low Operating Temperatures App 20140273300 - Pramanik; Dipankar ; et al.	2014-09-18
Channel-Last Methods for Making FETS App 20140264281 - Niyogi; Sandip ; et al.	2014-09-18
Deposition of Anisotropic Dielectric Layers Orientationally Matched to the Physically Separated Substrate App 20140264747 - Barabash; Sergey ; et al.	2014-09-18
Two step deposition of molybdenum dioxide electrode for high quality dielectric stacks Grant 8,835,310 - Barabash , et al. September 16, 2	2014-09-16
Resistive random access memory cells having metal alloy current limiting layers Grant 8,817,524 - Wang , et al. August 26, 2	2014-08-26
Multifunctional Electrode App 20140224645 - Pham; Hieu ; et al.	2014-08-14
Creating an embedded reram memory from a high-K metal gate transistor structure Grant 8,803,124 - Pramanik , et al. August 12, 2	2014-08-12
Low temperature migration enhanced Si-Ge epitaxy with plasma assisted surface activation Grant 8,778,811 - Kraus , et al. July 15, 2	2014-07-15
Multifunctional electrode Grant 8,779,407 - Pham , et al. July 15, 2	2014-07-15
Device Design For Partially Oriented Rutile Dielectrics App 20140191365 - Barabash; Sergey ; et al.	2014-07-10
Low-Emissivity Coatings App 20140186617 - Zhang; Xuena ; et al.	2014-07-03
Barrier Design for Steering Elements App 20140185357 - Barabash; Sergey ; et al.	2014-07-03
Flourine-Stabilized Interface App 20140183666 - Pramanik; Dipankar	2014-07-03
Diffusion Barriers App 20140183737 - Zhang; Xuena ; et al.	2014-07-03
MoOx-Based Resistance Switching Materials App 20140183432 - Barabash; Sergey ; et al.	2014-07-03
Fullerene-Based Capacitor Electrode App 20140183664 - Barabash; Sergey ; et al.	2014-07-03
Device design for partially oriented rutile dielectrics Grant 8,766,404 - Barabash , et al. July 1, 2	2014-07-01
Deposition of Rutile Films with Very High Dielectric Constant App 20140175422 - Barabash; Sergey ; et al.	2014-06-26
Two Step Deposition of Molybdenum Dioxide Electrode for High Quality Dielectric Stacks App 20140175604 - Barabash; Sergey ; et al.	2014-06-26
Site-Isolated Rapid Thermal Processing Methods and Apparatus App 20140179123 - Korczynski; Ed ; et al.	2014-06-26
Multi-Level Memory Array Having Resistive Elements For Multi-Bit Data Storage App 20140177315 - Pramanik; Dipankar ; et al.	2014-06-26
Method of Depositing Films with Narrow-Band Conductive Properties App 20140175567 - Barabash; Sergey ; et al.	2014-06-26
Analysis of stress impact on transistor performance Grant 8,762,924 - Moroz , et al. June 24, 2	2014-06-24
Controlling ReRam Forming Voltage with Doping App 20140166958 - Barabash; Sergey ; et al.	2014-06-19
Back-Contact Electron Reflectors Enhancing Thin Film Solar Cell Efficiency App 20140166107 - Lee; Mankoo ; et al.	2014-06-19
Methods of Manufacturing Embedded Bipolar Switching Resistive Memory App 20140169062 - Lee; Mankoo ; et al.	2014-06-19
Memory device having an integrated two-terminal current limiting resistor Grant 8,748,237 - Pramanik , et al. June 10, 2	2014-06-10
Multifunctional electrode Grant 8,735,217 - Pham , et al. May 27, 2	2014-05-27
Resistive Random Access Memory Cells Having Doped Current Limiting layers App 20140124725 - Chi; David ; et al.	2014-05-08
Resistive Random Access Memory Cells Having METAL ALLOY Current Limiting layers App 20140117303 - Wang; Yun ; et al.	2014-05-01
Analysis of stress impact on transistor performance Grant 8,713,510 - Moroz , et al. April 29, 2	2014-04-29
Analysis Of Stress Impact On Transistor Performance App 20140115556 - Moroz; Victor ; et al.	2014-04-24
Method to control amorphous oxide layer formation at interfaces of thin film stacks for memory and logic components App 20140110764 - Niyogi; Sandip ; et al.	2014-04-24
Nonvolatile Resistive Memory Element With A Passivated Switching Layer App 20140103280 - Chen; Charlene ; et al.	2014-04-17
Method of Determining Electromigration (EM) Lifetimes and Lifetime Criteria App 20140109030 - Lee; Mankoo ; et al.	2014-04-17
Filler cells for design optimization in a place-and-route system Grant 8,694,942 - Lin , et al. April 8, 2	2014-04-08
Elevation of transistor channels to reduce impact of shallow trench isolation on transistor performance Grant 8,686,512 - Moroz , et al. April 1, 2	2014-04-01
Atomic Layer Deposition of Metal Oxide Materials for Memory Applications App 20140073107 - Wang; Yun ; et al.	2014-03-13
System And Method For Modifying A Data Set Of A Photomask App 20140068527 - PRAMANIK; Dipankar ; et al.	2014-03-06
Circular Transmission Line Methods Compatible With Combinatorial Processing Of Semiconductors App 20140055152 - Joshi; Amol ; et al.	2014-02-27
Analysis of stress impact on transistor performance Grant 8,661,398 - Moroz , et al. February 25, 2	2014-02-25
Memory Device Having An Integrated Two-Terminal Current Limiting Resistor App 20140051223 - Pramanik; Dipankar ; et al.	2014-02-20
Multifunctional Electrode App 20140038380 - Pham; Hieu ; et al.	2014-02-06
Nonvolatile resistive memory element with a passivated switching layer Grant 8,637,413 - Chen , et al. January 28, 2	2014-01-28
Analysis of stress impact on transistor performance Grant 8,615,728 - Moroz , et al. December 24, 2	2013-12-24
Atomic Layer Deposition of Hafnium and Zirconium Oxides for Memory Applications App 20130334484 - Wang; Yun ; et al.	2013-12-19
Smart Polymeric Nanoparticles Which Overcome Multidrug Resistance To Cancer Therapeutics And Treatment-related Systemic Toxicity App 20130330412 - Maitra; Anirban ; et al.	2013-12-12
Filler Cells For Design Optimization In A Place-and-route System App 20130332893 - Lin; Xi-Wei ; et al.	2013-12-12
Memory device having an integrated two-terminal current limiting resistor Grant 8,598,682 - Pramanik , et al. December 3, 2	2013-12-03
System and method for modifying a data set of a photomask Grant 8,572,517 - Pramanik , et al. October 29, 2	2013-10-29
Memory device having an integrated two-terminal current limiting resistor Grant 8,563,366 - Pramanik , et al. October 22, 2	2013-10-22
Analysis of stress impact on transistor performance Grant 8,560,995 - Moroz , et al. October 15, 2	2013-10-15
Atomic layer deposition of hafnium and zirconium oxides for memory applications Grant 8,546,275 - Wang , et al. October 1, 2	2013-10-01
Graphene Combinatorial Processing App 20130236632 - Niyogi; Sandip ; et al.	2013-09-12
Memory Device Having An Integrated Two-Terminal Current Limiting Resistor App 20130221314 - Pramanik; Dipankar ; et al.	2013-08-29
Memory Cell Having an Integrated Two-Terminal Current Limiting Resistor App 20130221315 - Wang; Yun ; et al.	2013-08-29
Nonvolatile Resistive Memory Element With An Integrated Oxygen Isolation Structure App 20130221307 - Wang; Yun ; et al.	2013-08-29
Memory Device Having An Integrated Two-terminal Current Limiting Resistor App 20130224928 - Pramanik; Dipankar ; et al.	2013-08-29
Creating An Embedded Reram Memory From A High-k Metal Gate Transistor Structure App 20130221317 - Pramanik; Dipankar ; et al.	2013-08-29
Memory Device with a Textured Lowered Electrode App 20130214240 - Pramanik; Dipankar	2013-08-22
Method for Forming Metal Oxides and Silicides in a Memory Device App 20130214238 - Pramanik; Dipankar ; et al.	2013-08-22
Multifunctional Electrode App 20130200323 - Pham; Hieu ; et al.	2013-08-08
Filler cells for design optimization in a place-and-route system Grant 8,504,969 - Lin , et al. August 6, 2	2013-08-06
Atomic layer deposition of metal oxide materials for memory applications Grant 8,466,446 - Wang , et al. June 18, 2	2013-06-18
Method for forming metal oxides and silicides in a memory device Grant 8,466,005 - Pramanik , et al. June 18, 2	2013-06-18
Nonvolatile Resistive Memory Element With A Passivated Switching Layer App 20130140512 - Chen; Charlene ; et al.	2013-06-06
Method For Rapid Estimation Of Layout-dependent Threshold Voltage Variation In A Mosfet Array App 20130125075 - MOROZ; VICTOR ; et al.	2013-05-16
Memory device with a textured lowered electrode Grant 8,426,270 - Pramanik April 23, 2	2013-04-23
Analysis of stress impact on transistor performance Grant 8,413,096 - Moroz , et al. April 2, 2	2013-04-02
Analysis of stress impact on transistor performance Grant 8,407,634 - Moroz , et al. March 26, 2	2013-03-26
Atomic Layer Deposition Of Hafnium And Zirconium Oxides For Memory Applications App 20130071984 - Wang; Yun ; et al.	2013-03-21
Atomic Layer Deposition Of Metal Oxide Materials For Memory Applications App 20130056702 - Wang; Yun ; et al.	2013-03-07
LOW TEMPERATURE MIGRATION ENHANCED Si-Ge EPITAXY WITH PLASMA ASSISTED SURFACE ACTIVATION App 20130045587 - Kraus; Philip A. ; et al.	2013-02-21
Method For Forming Metal Oxides And Silicides In A Memory Device App 20130023085 - Pramanik; Dipankar ; et al.	2013-01-24
Memory Device With A Textured Lowered Electrode App 20130023105 - Pramanik; Dipankar	2013-01-24
Method for rapid estimation of layout-dependent threshold voltage variation in a MOSFET array Grant 8,347,252 - Moroz , et al. January 1, 2	2013-01-01
Atomic layer deposition of metal oxide materials for memory applications Grant 8,288,297 - Wang , et al. October 16, 2	2012-10-16
Method for compensation of process-induced performance variation in a MOSFET integrated circuit Grant 8,219,961 - Moroz , et al. July 10, 2	2012-07-10
Method of correlating silicon stress to device instance parameters for circuit simulation Grant 8,086,990 - Lin , et al. December 27, 2	2011-12-27
Elevation Of Transistor Channels To Reduce Impact Of Shallow Trench Isolation On Transistor Performance App 20110309453 - Moroz; Victor ; et al.	2011-12-22
Stress-managed revision of integrated circuit layouts Grant 8,069,430 - Moroz , et al. November 29, 2	2011-11-29
Elevation of transistor channels to reduce impact of shallow trench isolation on transistor performance Grant 8,035,168 - Moroz , et al. October 11, 2	2011-10-11
Method for Compensation of Process-Induced Performance Variation in a Mosfet Integrated Circuit App 20110219351 - Moroz; Victor ; et al.	2011-09-08
Method for compensation of process-induced performance variation in a MOSFET integrated circuit Grant 7,949,985 - Moroz , et al. May 24, 2	2011-05-24
Filler Cells For Design Optimization In A Place-and-route System App 20110078639 - LIN; XI-WEI ; et al.	2011-03-31
Managing integrated circuit stress using dummy diffusion regions Grant 7,897,479 - Lin , et al. March 1, 2	2011-03-01
Filler cells for design optimization in a place-and-route system Grant 7,895,548 - Lin , et al. February 22, 2	2011-02-22
Elevation of transistor channels to reduce impact of shallow trench isolation on transistor performance Grant 7,863,146 - Moroz , et al. January 4, 2	2011-01-04
Managing integrated circuit stress using stress adjustment trenches Grant 7,767,515 - Moroz , et al. August 3, 2	2010-08-03
Method for determining best and worst cases for interconnects in timing analysis Grant 7,739,095 - Lin , et al. June 15, 2	2010-06-15
Transistor array with selected subset having suppressed layout sensitivity of threshold voltage Grant 7,705,406 - Moroz , et al. April 27, 2	2010-04-27
Method for suppressing layout sensitivity of threshold voltage in a transistor array Grant 7,691,693 - Moroz , et al. April 6, 2	2010-04-06
Analysis Of Stress Impact On Transistor Performance App 20100042958 - Moroz; Victor ; et al.	2010-02-18
Stress Engineering For Cap Layer Induced Stress App 20100024978 - MOROZ; VICTOR ; et al.	2010-02-04
Stress Engineering For Cap Layer Induced Stress App 20100029050 - MOROZ; VICTOR ; et al.	2010-02-04
Method For Suppressing Lattice Defects In A Semiconductor Substrate App 20100025777 - Moroz; Victor ; et al.	2010-02-04
Analysis Of Stress Impact On Transistor Performance App 20100023902 - Moroz; Victor ; et al.	2010-01-28
Analysis Of Stress Impact On Transistor Performance App 20100023899 - Moroz; Victor ; et al.	2010-01-28
Analysis Of Stress Impact On Transistor Performance App 20100023901 - Moroz; Victor ; et al.	2010-01-28
Analysis Of Stress Impact On Transistor Performance App 20100023900 - Moroz; Victor ; et al.	2010-01-28
Managing Integrated Circuit Stress Using Stress Adjustment Trenches App 20100019317 - Moroz; Victor ; et al.	2010-01-28
Stress-managed Revision Of Integrated Circuit Layouts App 20090313595 - Moroz; Victor ; et al.	2009-12-17
System And Method For Modifying A Data Set Of A Photomask App 20090307649 - Pramanik; Dipankar ; et al.	2009-12-10
Analysis Of Stress Impact On Transistor Performance App 20090288048 - Moroz; Victor ; et al.	2009-11-19
Method for Rapid Estimation of Layout-Dependent Threshold Voltage Variation in a MOSFET Array App 20090288049 - MOROZ; VICTOR ; et al.	2009-11-19
Stress-managed revision of integrated circuit layouts Grant 7,600,207 - Moroz , et al. October 6, 2	2009-10-06
Method For Suppressing Layout Sensitivity Of Threshold Voltage In A Transistor Array App 20090236673 - Moroz; Victor ; et al.	2009-09-24
Method for rapid estimation of layout-dependent threshold voltage variation in a MOSFET array Grant 7,584,438 - Moroz , et al. September 1, 2	2009-09-01
Method Of Correlating Silicon Stress To Device Instance Parameters For Circuit Simulation App 20090217217 - Lin; Xi-Wei ; et al.	2009-08-27
Method of correlating silicon stress to device instance parameters for circuit simulation Grant 7,542,891 - Lin , et al. June 2, 2	2009-06-02
Method and apparatus for fast identification of high stress regions in integrated circuit structure Grant 7,543,254 - Xu , et al. June 2, 2	2009-06-02
Method for Suppressing Lattice Defects in a Semiconductor Substrate App 20090108293 - Moroz; Victor ; et al.	2009-04-30
Method for Trapping Implant Damage in a Semiconductor Substrate App 20090108408 - Moroz; Victor ; et al.	2009-04-30
Filler Cells For Design Optimization In A Place-and-route System App 20090113368 - Lin; Xi-Wei ; et al.	2009-04-30
Managing integrated circuit stress using dummy diffusion regions Grant 7,484,198 - Lin , et al. January 27, 2	2009-01-27
Managing Integrated Circuit Stress Using Dummy Diffusion Regions App 20090007043 - Lin; Xi-Wei ; et al.	2009-01-01
Method For Suppressing Layout Sensitivity Of Threshold Voltage In A Transistor Array App 20080296698 - Moroz; Victor ; et al.	2008-12-04
Method For Compensation Of Process-induced Performance Variation In A Mosfet Integrated Circuit App 20080297237 - Moroz; Victor ; et al.	2008-12-04
Method For Rapid Estimation Of Layout-dependent Threshold Voltage Variation In A Mosfet Array App 20080301599 - Moroz; Victor ; et al.	2008-12-04
Method For Determining Best And Worst Cases For Interconnects In Timing Analysis App 20080228460 - Lin; Xi-Wei ; et al.	2008-09-18
Method of Correlating Silicon Stress to Device Instance Parameters for Circuit Simulation App 20080127005 - Lin; Xi-Wei ; et al.	2008-05-29
Method And Apparatus For Fast Identification Of High Stress Regions In Integrated Circuit Structure App 20080066023 - Xu; Xiaopeng ; et al.	2008-03-13
Elevation Of Transistor Channels To Reduce Impact Of Shallow Trench Isolation On Transistor Performance App 20070298566 - MOROZ; VICTOR ; et al.	2007-12-27
Stress Engineering For Cap Layer Induced Stress App 20070246776 - Moroz; Victor ; et al.	2007-10-25
Elevation of transistor channels to reduce impact of shallow trench isolation on transistor performance App 20070202652 - Moroz; Victor ; et al.	2007-08-30
Managing integrated circuit stress using stress adjustment trenches App 20070202663 - Moroz; Victor ; et al.	2007-08-30
Stress-managed revision of integrated circuit layouts App 20070204250 - Moroz; Victor ; et al.	2007-08-30
Managing integrated circuit stress using dummy diffusion regions App 20070202662 - Lin; Xi-Wei ; et al.	2007-08-30
Mask cost driven logic optimization and synthesis Grant 6,931,617 - Sanie , et al. August 16, 2	2005-08-16
Selectively applying resolution enhancement techniques to improve performance and manufacturing cost of integrated circuits Grant 6,928,635 - Pramanik , et al. August 9, 2	2005-08-09
Mask cost driven logic optimization and synthesis App 20040210856 - Sanie, Michael ; et al.	2004-10-21
Selectively applying resolution enhancement techniques to improve performance and manufacturing cost of integrated circuits App 20040060020 - Pramanik, Dipankar ; et al.	2004-03-25
Methods of forming a semiconductor device Grant 6,176,983 - Bothra , et al. January 23, 2	2001-01-23
Method of making high resistive structures in salicided process semiconductor devices Grant 5,834,356 - Bothra , et al. November 10, 1	1998-11-10
Silicon corner rounding in shallow trench isolation process Grant 5,811,346 - Sur , et al. September 22, 1	1998-09-22
Device reliability of MOS devices using silicon rich plasma oxide films Grant 5,763,937 - Jain , et al. June 9, 1	1998-06-09
Method improving integrated circuit planarization during etchback Grant 5,496,774 - Pramanik , et al. March 5, 1	1996-03-05
Method of making structure for suppression of field inversion caused by charge build-up in the dielectric Grant 5,492,865 - Nariani , et al. February 20, 1	1996-02-20
Method and structure for suppressing stress-induced defects in integrated circuit conductive lines Grant 5,436,410 - Jain , et al. July 25, 1	1995-07-25
Method enhancing planarization etchback margin, reliability, and stability of a semiconductor device Grant 5,403,780 - Jain , et al. April 4, 1	1995-04-04
Structure for suppression of field inversion caused by charge build-up in the dielectric Grant 5,374,833 - Nariani , et al. December 20, 1	1994-12-20
Method for suppressing charge loss in EEPROMs/EPROMS and instabilities in SRAM load resistors Grant 5,290,727 - Jain , et al. March 1, 1	1994-03-01
Charge neutralization using silicon-enriched oxide layer Grant 5,128,279 - Nariani , et al. July 7, 1	1992-07-07
Charge neutralization using silicon-enriched oxide layer Grant 5,057,897 - Nariani , et al. October 15, 1	1991-10-15