Prabhu; Ashok S.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Prabhu; Ashok S..The latest application filed is for "wire bond wires for interference shielding".

Company Profile

8.32.28

Prabhu; Ashok S. - San Jose CA
Prabhu; Ashok S. - Sunnyvale CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Wire Bond Wires For Interference Shielding App 20200118939 - Awujoola; Abiola ; et al.	2020-04-16
Wire bond wires for interference shielding Grant 10,559,537 - Awujoola , et al. Feb	2020-02-11
Embedded wire bond wires Grant 10,490,528 - Prabhu , et al. Nov	2019-11-26
Dies-on-package devices and methods therefor Grant 10,354,976 - Tao , et al. July 16, 2	2019-07-16
Embedded wire bond wires for vertical integration with separate surface mount and wire bond mounting surfaces Grant 10,325,877 - Delacruz , et al.	2019-06-18
Microelectronic Package For Wafer-level Chip Scale Packaging With Fan-out App 20190096861 - Katkar; Rajesh ; et al.	2019-03-28
Wire Bond Wires For Interference Shielding App 20190027444 - Awujoola; Abiola ; et al.	2019-01-24
Microelectronic package for wafer-level chip scale packaging with fan-out Grant 10,181,457 - Prabhu , et al. Ja	2019-01-15
Wire bond wires for interference shielding Grant 10,115,678 - Awujoola , et al. October 30, 2	2018-10-30
Embedded Wire Bond Wires for Vertical Integration With Separate Surface Mount and Wire Bond Mounting Surfaces App 20180240773 - Delacruz; Javier A. ; et al.	2018-08-23
Packaged microelectronic device for a package-on-package device Grant 10,043,779 - Prabhu , et al. August 7, 2	2018-08-07
Package-on-package devices with same level WLP components and methods therefor Grant 9,991,233 - Tao , et al. June 5, 2	2018-06-05
Package on-package devices with upper RDL of WLPS and methods therefor Grant 9,991,235 - Tao , et al. June 5, 2	2018-06-05
Embedded wire bond wires for vertical integration with separate surface mount and wire bond mounting surfaces Grant 9,984,992 - DeLaCruz , et al. May 29, 2	2018-05-29
Package on-package devices with multiple levels and methods therefor Grant 9,985,007 - Tao , et al. May 29, 2	2018-05-29
Package-on-package devices with WLP components with dual RDLs for surface mount dies and methods therefor Grant 9,972,609 - Tao , et al. May 15, 2	2018-05-15
Wafer-level packaged components and methods therefor Grant 9,972,573 - Tao , et al. May 15, 2	2018-05-15
`RDL-First` packaged microelectronic device for a package-on-package device Grant 9,911,718 - Prabhu , et al. March 6, 2	2018-03-06
Wire Bond Wires for Interference Shielding App 20180061774 - Awujoola; Abiola ; et al.	2018-03-01
Wafer-Level Packaged Components and Methods Therefor App 20180025987 - Tao; Min ; et al.	2018-01-25
Package-on-Package Devices with Same Level WLP Components and Methods Therefor App 20180026011 - Tao; Min ; et al.	2018-01-25
Package-on-Package Devices with Multiple Levels and Methods Therefor App 20180026018 - Tao; Min ; et al.	2018-01-25
Dies-on-Package Devices and Methods Therefor App 20180026017 - Tao; Min ; et al.	2018-01-25
Package-on-Package Devices with Upper RDL of WLPS and Methods Therefor App 20180026016 - Tao; Min ; et al.	2018-01-25
Package-on-Package Devices with WLP Components with Dual RDLS for Surface Mount Dies and Methods Therefor App 20180026019 - Tao; Min ; et al.	2018-01-25
Flipped die stack assemblies with leadframe interconnects Grant 9,871,019 - Prabhu , et al. January 16, 2	2018-01-16
Flipped die stack Grant 9,825,002 - Katkar , et al. November 21, 2	2017-11-21
Wire bond wires for interference shielding Grant 9,812,402 - Awujoola , et al. November 7, 2	2017-11-07
Ball bonding metal wire bond wires to metal pads Grant 9,761,554 - Subido , et al. September 12, 2	2017-09-12
Embedded wire bond wires for vertical integration with separate surface mount and wire bond mounting surfaces App 20170194281 - DeLaCruz; Javier A. ; et al.	2017-07-06
Wafer-level flipped die stacks with leadframes or metal foil interconnects Grant 9,666,513 - Prabhu , et al. May 30, 2	2017-05-30
'RDL-First' Packaged Microelectronic Device for a Package-on-Package Device App 20170141042 - Prabhu; Ashok S. ; et al.	2017-05-18
Packaged Microelectronic Device for a Package-on-Package Device App 20170141083 - Prabhu; Ashok S. ; et al.	2017-05-18
Microelectronic Package for Wafer-Level Chip Scale Packaging with Fan-Out App 20170117260 - Prabhu; Ashok S. ; et al.	2017-04-27
Wire Bond Wires For Interference Shielding App 20170117231 - Awujoola; Abiola ; et al.	2017-04-27
Embedded wire bond wires App 20170103968 - PRABHU; Ashok S. ; et al.	2017-04-13
Wafer-level Flipped Die Stacks With Leadframes Or Metal Foil Interconnects App 20170077016 - Prabhu; Ashok S. ; et al.	2017-03-16
Flipped Die Stack App 20170018529 - Katkar; Rajesh ; et al.	2017-01-19
Flipped Die Stack Assemblies With Leadframe Interconnects App 20170018485 - Prabhu; Ashok S. ; et al.	2017-01-19
Ball Bonding Metal Wire Bond Wires To Metal Pads App 20160329294 - SUBIDO; Willmar ; et al.	2016-11-10
Wire bond wires for interference shielding Grant 9,490,222 - Awujoola , et al. November 8, 2	2016-11-08
Wafer-level flipped die stacks with leadframes or metal foil interconnects Grant 9,490,195 - Prabhu , et al. November 8, 2	2016-11-08
DC/DC converter power module package incorporating a stacked controller and construction methodology Grant 8,679,896 - Joshi , et al. March 25, 2	2014-03-25
Method and apparatus for achieving galvanic isolation in package having integral isolation medium Grant 8,674,418 - Poddar , et al. March 18, 2	2014-03-18
DC/DC Converter Power Module Package Incorporating a Stacked Controller and Construction Methodology App 20130214399 - Joshi; Rajeev ; et al.	2013-08-22
Method And Apparatus For Achieving Galvanic Isolation In Package Having Integral Isolation Medium App 20130043970 - PODDAR; Anindya ; et al.	2013-02-21
Low Profile Package And Method App 20120326300 - FENG; Tao ; et al.	2012-12-27
Dc/dc Convertor Power Module Package Incorporating A Stacked Controller And Construction Methodology App 20120326287 - Joshi; Rajeev ; et al.	2012-12-27
Lead frame interconnect scheme with high power density Grant 8,283,760 - Pham , et al. October 9, 2	2012-10-09
Methods And Systems For Packaging Integrated Circuits With Thin Metal Contacts App 20100015329 - NGUYEN; Luu T. ; et al.	2010-01-21
Gang Flipping For Flip-chip Packaging App 20080241991 - Poddar; Anindya ; et al.	2008-10-02
Wire bonding on thinned portions of a lead-frame configured for use in a micro-array integrated circuit package Grant 7,259,460 - Bayan , et al. August 21, 2	2007-08-21
Method of fabricating a micro-array integrated circuit package Grant 7,186,588 - Bayan , et al. March 6, 2	2007-03-06
Substrate for use in semiconductor manufacturing and method of making same Grant 7,102,209 - Bayan , et al. September 5, 2	2006-09-05
Solder pad configuration for use in a micro-array integrated circuit package Grant 7,087,986 - Bayan , et al. August 8, 2	2006-08-08
Die attach region for use in a micro-array integrated circuit package Grant 7,064,419 - Bayan , et al. June 20, 2	2006-06-20
Spacer with passive components for use in multi-chip modules Grant 6,933,597 - Poddar , et al. August 23, 2	2005-08-23
Multi-station rotary die handling device Grant 6,364,089 - Singh , et al. April 2, 2	2002-04-02

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