loadpatents
name:-0.029664039611816
name:-0.023138999938965
name:-0.0037930011749268
Pozder; Scott K. Patent Filings

Pozder; Scott K.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Pozder; Scott K..The latest application filed is for "chip package interaction (cpi) back-end-of-line (beol) monitoring structure and method".

Company Profile
3.22.21
  • Pozder; Scott K. - Saratoga Springs NY
  • Pozder; Scott K. - Austin TX US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Chip package interaction (CPI) back-end-of-line (BEOL) monitoring structure and method
Grant 10,643,912 - Pozder , et al.
2020-05-05
Chip Package Interaction (cpi) Back-end-of-line (beol) Monitoring Structure And Method
App 20190027413 - Pozder; Scott K. ;   et al.
2019-01-24
3-D semiconductor die structure with containing feature and method
Grant 8,581,383 - Pozder , et al. November 12, 2
2013-11-12
3-d Semiconductor Die Structure With Containing Feature And Method
App 20100327440 - POZDER; SCOTT K. ;   et al.
2010-12-30
3-D semiconductor die structure with containing feature and method
Grant 7,811,932 - Pozder , et al. October 12, 2
2010-10-12
Mechanical integrity evaluation of low-k devices with bump shear
Grant 7,622,309 - Su , et al. November 24, 2
2009-11-24
Fabrication of three dimensional integrated circuit employing multiple die panels
Grant 7,622,313 - Jones , et al. November 24, 2
2009-11-24
3-d Semiconductor Die Structure With Containing Feature And Method
App 20090166888 - Pozder; Scott K. ;   et al.
2009-07-02
Method of forming crack arrest features in embedded device build-up package and package thereof
Grant 7,553,753 - Zhao , et al. June 30, 2
2009-06-30
Semiconductor device having a fuse and method of forming thereof
Grant 7,535,078 - Kobayashi , et al. May 19, 2
2009-05-19
Barrier For Use In 3-d Integration Of Circuits
App 20080197497 - POZDER; SCOTT K. ;   et al.
2008-08-21
Barrier for use in 3-D integration of circuits
Grant 7,378,339 - Pozder , et al. May 27, 2
2008-05-27
Semiconductor stacked die/wafer configuration and packaging and method thereof
Grant 7,358,616 - Alam , et al. April 15, 2
2008-04-15
Method Of Forming Crack Arrest Features In Embedded Device Build-up Package And Package Thereof
App 20080057696 - Zhao; Jie-Hua ;   et al.
2008-03-06
Semiconductor device having a fuse and method of forming thereof
App 20070267651 - Kobayashi; Thomas S. ;   et al.
2007-11-22
Barrier For Use In 3-d Integration Of Circuits
App 20070231950 - Pozder; Scott K. ;   et al.
2007-10-04
Die level metal density gradient for improved flip chip package reliability
Grant 7,276,435 - Pozder , et al. October 2, 2
2007-10-02
Magnetic alignment of integrated circuits to each other
App 20070181653 - Michaelson; Lynne M. ;   et al.
2007-08-09
Integrated circuit having structural support for a flip-chip interconnect pad and method therefor
Grant 7,247,552 - Pozder , et al. July 24, 2
2007-07-24
Semiconductor stacked die/wafer configuration and packaging and method thereof
App 20070057384 - Alam; Syed M. ;   et al.
2007-03-15
Fabrication of three dimensional integrated circuit employing multiple die panels
App 20070023121 - Jones; Robert E. ;   et al.
2007-02-01
Method for forming a bond pad interface
Grant 7,169,694 - Pozder , et al. January 30, 2
2007-01-30
Mechanical integrity evaluation of low-k devices with bump shear
App 20060292711 - Su; Peng ;   et al.
2006-12-28
Semiconductor device with magnetically permeable heat sink
Grant 7,153,726 - Pozder , et al. December 26, 2
2006-12-26
Integrated circuit having structural support for a flip-chip interconnect pad and method therefor
App 20060154470 - Pozder; Scott K. ;   et al.
2006-07-13
Separately strained N-channel and P-channel transistors
Grant 7,041,576 - Pozder , et al. May 9, 2
2006-05-09
Semiconductor device with magnetically permeable heat sink
App 20050285259 - Pozder, Scott K. ;   et al.
2005-12-29
Backside body contact
App 20050280088 - Min, Byoung W. ;   et al.
2005-12-22
Separately strained N-channel and P-channel transistors
App 20050275017 - Pozder, Scott K. ;   et al.
2005-12-15
Semiconductor device with magnetically permeable heat sink
Grant 6,958,548 - Pozder , et al. October 25, 2
2005-10-25
Metal reduction in wafer scribe area
Grant 6,951,801 - Pozder , et al. October 4, 2
2005-10-04
Semiconductor device with magnetically permeable heat sink
App 20050104193 - Pozder, Scott K. ;   et al.
2005-05-19
Method for forming a bond pad interface
App 20050014356 - Pozder, Scott K. ;   et al.
2005-01-20
Method for forming a semiconductor device having a mechanically robust pad interface
Grant 6,803,302 - Pozder , et al. October 12, 2
2004-10-12
Metal reduction in wafer scribe area
App 20040147097 - Pozder, Scott K. ;   et al.
2004-07-29
Semiconductor device having a fuse and method of forming thereof
App 20030151060 - Kobayashi, Thomas S. ;   et al.
2003-08-14
Method Of Forming A Bond Pad And Structure Thereof
App 20030054626 - Kobayashi, Thomas S. ;   et al.
2003-03-20
Method of forming a bond pad and structure thereof
Grant 6,531,384 - Kobayashi , et al. March 11, 2
2003-03-11
Method and apparatus for manufacturing an interconnect structure
Grant 6,429,531 - Mistry , et al. August 6, 2
2002-08-06
Method of forming an alternative ground contact for a semiconductor die
Grant 6,420,208 - Pozder , et al. July 16, 2
2002-07-16
Method for forming a semiconductor device having a mechanically robust pad interface.
App 20010051426 - POZDER, SCOTT K. ;   et al.
2001-12-13
Semiconductor device adhesive layer structure and process for forming structure
Grant 6,294,458 - Zhang , et al. September 25, 2
2001-09-25

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