Angelo Pinto

USPTO Trademark & Patent Filings

Trademark applications and grants for Angelo Pinto. Angelo Pinto has 4 trademark applications. The latest application filed is for "LOUISVILLE 87"

Company Profile

Angelo Pinto
Pinto, Angelo
angelo pinto
Pinto; Angelo - San Diego CA
PINTO; Angelo - San Diego CA

Entity Type	INDIVIDUAL
Address	130 Camdike Street Valley Streem, NEW YORK UNITED STATES 11580

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Trademarks Patents

Patent Applications

Patent Application	Date
DIGITAL CURRENT MEASUREMENT FOR IN-SITU DEVICE MONITORING 20190107569 - 15/730486 Kidd; David ; et al.	2019-04-11
INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND (110) PMOS FINFET SIDEWALL CHANNELS 20150014789 - 14/499834 Xiong; Weize W. ; et al.	2015-01-15
INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND (110) PMOS FINFET SIDEWALL CHANNELS 20140035057 - 13/855520 Xiong; Weize W. ; et al.	2014-02-06
INTEGRATION SCHEME FOR CHANGING CRYSTAL ORIENTATION IN HYBRID ORIENTATION TECHNOLOGY (HOT) USING DIRECT SILICON BONDED (DSB) SUBSTRATES 20130292780 - 13/937398 PINTO; Angelo ; et al.	2013-11-07
REDUCTION OF STI CORNER DEFECTS DURING SPE IN SEMICONDUCTOR DEVICE FABRICATION USING DSB SUBSTRATE AND HOT TECHNOLOGY 20130029471 - 13/544519 Pinto; Angelo ; et al.	2013-01-31
Integration scheme for changing crystal orientation in hybrid orientation technology (HOT) using direct silicon bonded (DSB) substrates 9,123,570 - 13/937,398 Pinto , et al. September 1, 2	2015-09-01
Integrated circuits with aligned (100) NMOS and (110) PMOS finFET sidewall channels 9,053,966 - 14/499,834 Xiong , et al. June 9, 2	2015-06-09
Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET sidewall channels 8,872,220 - 13/855,520 Xiong , et al. October 28, 2	2014-10-28
Reduction of STI corner defects during SPE in semiconductor device fabrication using DSB substrate and hot technology 8,846,487 - 13/544,519 Pinto , et al. September 30, 2	2014-09-30
Reduction of STI corner defects during SPE in semiconductor device fabrication using DSB substrate and hot technology 8,846,487 - 13/544,519 Pinto , et al. September 30, 2	2014-09-30

Patent Grants & Applications

Trademark Applications

Mark Image Registration \| Serial	Trademark Application Date
"LOUISVILLE 87" 90082830	LOUISVILLE 87 2020-07-30
"LOUISVILLE 87" 90082826	LOUISVILLE 87 2020-07-30
"G" 5622854 87961268	G 2018-06-13
"G STYLES" 5631838 87889112	G STYLES 2018-04-23

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