Pille; Juergen

Patent Applications and Registrations

Patent applications and USPTO patent grants for Pille; Juergen.The latest application filed is for "erasing a partition of an sram array with hardware support".

Company Profile

19.58.58

Pille; Juergen - Stuttgart DE
Pille; Juergen - Boeblingen DE
Pille; Juergen - Surttgart DE
Pille; Juergen - Stuttgartt DE

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Integrated circuit including logic circuitry Grant 11,328,110 - Pille , et al. May 10, 2	2022-05-10
Semiconductor circuit including an initialization circuit for initializing memory cells and clearing of relatively large blocks of memory Grant 11,302,378 - Schmidt , et al. April 12, 2	2022-04-12
Erasing Large Blocks Of Charge-based Memory With Hardware Support App 20220013159 - Schmidt; Martin Bernhard ; et al.	2022-01-13
Erasing A Partition Of An Sram Array With Hardware Support App 20220013166 - Schmidt; Martin Bernhard ; et al.	2022-01-13
Stressing integrated circuits using a radiation source Grant 11,209,479 - Eckert , et al. December 28, 2	2021-12-28
Integrated circuit with vertical structures on nodes of a grid Grant 11,171,142 - Pille , et al. November 9, 2	2021-11-09
Microelectronic device with a memory element utilizing stacked vertical devices Grant 11,164,879 - Pille , et al. November 2, 2	2021-11-02
Integrated Circuit Including Logic Circuitry App 20210312116 - Pille; Juergen ; et al.	2021-10-07
Stressing Integrated Circuits Using A Radiation Source App 20210123969 - Eckert; Martin ; et al.	2021-04-29
Memory block erasure Grant 10,901,651 - Schmidt , et al. January 26, 2	2021-01-26
Buried conductive layer supplying digital circuits Grant 10,833,089 - Pille , et al. November 10, 2	2020-11-10
Microelectronic device utilizing stacked vertical devices Grant 10,804,266 - Pille , et al. October 13, 2	2020-10-13
Buried Conductive Layer Supplying Digital Circuits App 20200161312 - PILLE; Juergen ; et al.	2020-05-21
Memory Block Erasure App 20200159440 - Schmidt; Martin B. ; et al.	2020-05-21
Microelectronic Device With A Memory Element Utilizing Stacked Vertical Devices App 20200161311 - PILLE; Juergen ; et al.	2020-05-21
Integrated Circuit With Vertical Structures On Nodes Of A Grid App 20200161310 - PILLE; Juergen ; et al.	2020-05-21
Microelectronic Device Utilizing Stacked Vertical Devices App 20200161300 - PILLE; Juergen ; et al.	2020-05-21
Memory block erasure Grant 10,585,619 - Schmidt , et al.	2020-03-10
Build synthesized soft arrays Grant 10,586,006 - Frisch , et al.	2020-03-10
Current-mode sense amplifier Grant 10,529,388 - Fritsch , et al. J	2020-01-07
Activation of memory core circuits in an integrated circuit Grant 10,388,357 - Kalla , et al. A	2019-08-20
Build Synthesized Soft Arrays App 20190251221 - Frisch; Albert ; et al.	2019-08-15
Activation Of Memory Core Circuits In An Integrated Circuit App 20190228811 - Kalla; Thomas ; et al.	2019-07-25
Build synthesized soft arrays Grant 10,318,688 - Frisch , et al.	2019-06-11
Activation of memory core circuits in an integrated circuit Grant 10,210,923 - Kalla , et al. Feb	2019-02-19
Activation of memory core circuits in an integrated circuit Grant 10,204,674 - Kalla , et al. Feb	2019-02-12
Activation Of Memory Core Circuits In An Integrated Circuit App 20190019549 - Kalla; Thomas ; et al.	2019-01-17
Activation Of Memory Core Circuits In An Integrated Circuit App 20190019547 - Kalla; Thomas ; et al.	2019-01-17
Activation Of Memory Core Circuits In An Integrated Circuit App 20190019548 - Kalla; Thomas ; et al.	2019-01-17
Current-Mode Sense Amplifier App 20180374517 - Fritsch; Alexander ; et al.	2018-12-27
Current-mode sense amplifier Grant 10,096,346 - Fritsch , et al. October 9, 2	2018-10-09
Build Synthesized Soft Arrays App 20180068043 - Frisch; Albert ; et al.	2018-03-08
Automated stressing and testing of semiconductor memory cells Grant 9,837,142 - Chan , et al. December 5, 2	2017-12-05
Current-Mode Sense Amplifier App 20170316812 - Fritsch; Alexander ; et al.	2017-11-02
Automated stressing and testing of semiconductor memory cells Grant 9,805,823 - Chan , et al. October 31, 2	2017-10-31
Current-mode sense amplifier Grant 9,761,286 - Fritsch , et al. September 12, 2	2017-09-12
Stressing and testing semiconductor memory cells Grant 9,704,567 - Kugel , et al. July 11, 2	2017-07-11
Single Ended Bitline Current Sense Amplifier For Sram Applications App 20170084314 - Fritsch; Alexander ; et al.	2017-03-23
Current-mode sense amplifier Grant 9,595,304 - Fritsch , et al. March 14, 2	2017-03-14
Single ended bitline current sense amplifier for SRAM applications Grant 9,589,604 - Fritsch , et al. March 7, 2	2017-03-07
Current-mode sense amplifier Grant 9,552,851 - Fritsch , et al. January 24, 2	2017-01-24
Transforming a phase-locked-loop generated chip clock signal to a local clock signal Grant 9,537,474 - Chan , et al. January 3, 2	2017-01-03
Current-Mode Sense Amplifier App 20160365130 - Fritsch; Alexander ; et al.	2016-12-15
Transforming A Phase-locked-loop Generated Chip Clock Signal To A Local Clock Signal App 20160344377 - CHAN; Yuen Hung ; et al.	2016-11-24
Transforming a phase-locked-loop generated chip clock signal to a local clock signal Grant 9,401,698 - Chan , et al. July 26, 2	2016-07-26
Current-Mode Sense Amplifier App 20160072461 - Fritsch; Alexander ; et al.	2016-03-10
Advanced array local clock buffer base block circuit Grant 9,098,659 - Dengler , et al. August 4, 2	2015-08-04
Complementary metal-oxide-semiconductor (CMOS) min/max voltage circuit for switching between multiple voltages Grant 8,942,052 - Huott , et al. January 27, 2	2015-01-27
Complementary Metal-Oxide-Semiconductor (CMOS) Min/Max Voltage Circuit for Switching Between Multiple Voltages App 20140140157 - Huott; William V. ; et al.	2014-05-22
Advanced Array Local Clock Buffer Base Block Circuit App 20140137070 - Dengler; Osama ; et al.	2014-05-15
Boost circuit for generating an adjustable boost voltage Grant 8,493,812 - Dengler , et al. July 23, 2	2013-07-23
Advanced Array Local Clock Buffer Base Block Circuit App 20130091375 - Dengler; Osama ; et al.	2013-04-11
Low power programmable clock delay generator with integrated decode function Grant 8,237,481 - Chan , et al. August 7, 2	2012-08-07
Boost Circuit For Generating An Adjustable Boost Voltage App 20120106237 - DENGLER; OSAMA ; et al.	2012-05-03
Progamable control clock circuit for arrays Grant 7,936,198 - Sautter , et al. May 3, 2	2011-05-03
Wordline booster design structure and method of operating a wordine booster circuit Grant 7,921,388 - Ehrenreich , et al. April 5, 2	2011-04-05
Method and system for pipeline reduction Grant 7,844,799 - Leenstra , et al. November 30, 2	2010-11-30
Test interface for memory elements Grant 7,844,871 - Brandt , et al. November 30, 2	2010-11-30
Single-ended read and differential write scheme Grant 7,813,163 - Pille , et al. October 12, 2	2010-10-12
Method to reduce leakage of a SRAM-array Grant 7,808,856 - Ehrenreich , et al. October 5, 2	2010-10-05
Functional float mode screen to test for leakage defects on SRAM bitlines Grant 7,760,541 - Adams , et al. July 20, 2	2010-07-20
Redundancy in signal distribution trees Grant 7,755,408 - Ehrenreich , et al. July 13, 2	2010-07-13
Progamable Control Clock Circuit For Arrays App 20100164586 - Sautter; Rolf ; et al.	2010-07-01
Test Interface For Memory Elements App 20100122128 - Brandt; Uwe ; et al.	2010-05-13
Level shifter for boosting wordline voltage and memory cell performance Grant 7,710,796 - Cottier , et al. May 4, 2	2010-05-04
Design structure for improving performance of SRAM cells, SRAM cell, SRAM array, and write circuit Grant 7,675,794 - Behrends , et al. March 9, 2	2010-03-09
Functional Float Mode Screen to Test for Leakage Defects on SRAM Bitlines App 20100039876 - Adams; Chad A. ; et al.	2010-02-18
Wordline booster circuit and method of operating a wordline booster circuit Grant 7,636,254 - Ehrenreich , et al. December 22, 2	2009-12-22
Method to improve performance of SRAM cells, SRAM cell, SRAM array, and write circuit Grant 7,626,851 - Behrends , et al. December 1, 2	2009-12-01
Method To Reduce Leakage Of A Sram-array App 20090285046 - Ehrenreich; Sebastian ; et al.	2009-11-19
Low Power Programmable Clock Delay Generator with Integrated Decode Function App 20090267667 - Chan; Yuen H. ; et al.	2009-10-29
Design Structure For Improving Performance Of Sram Cells, Sram Cell, Sram Array, And Write Circuit App 20090154263 - Behrends; Derick G. ; et al.	2009-06-18
Level Shifter For Boosting Wordline Voltage And Memory Cell Performance App 20090116307 - Cottier; Scott R. ; et al.	2009-05-07
Single-ended read and differential write scheme App 20090059688 - Pille; Juergen ; et al.	2009-03-05
Layout Generator for Routing and Designing an LSI App 20080301616 - Krauch; Ulrich ; et al.	2008-12-04
Redundancy in Signal Distribution Trees App 20080256413 - Ehrenreich; Sebastian ; et al.	2008-10-16
Automatic method for routing and designing an LSI Grant 7,401,312 - Krauch , et al. July 15, 2	2008-07-15
Random access memory with a plurality of symmetrical memory cells Grant 7,388,773 - Adams , et al. June 17, 2	2008-06-17
Method To Improve Performance Of Sram Cells, Sram Cell, Sram Array, And Write Circuit App 20080123442 - Behrends; Derick G. ; et al.	2008-05-29
6 Transistor Memory Circuit Pair Supporting Simultaneous Read/Write and Method Therefore App 20080080259 - Buettner; Stefan ; et al.	2008-04-03
Wordline Booster Design Structure and Method of Operating a Wordline Booster Circuit App 20080068902 - Ehrenreich; Sebastian ; et al.	2008-03-20
Wordline Booster Circuit and Method of Operating a Wordline Booster Circuit App 20080068901 - Ehrenreich; Sebastian ; et al.	2008-03-20
Redundancy in signal distribution trees Grant 7,336,115 - Ehrenreich , et al. February 26, 2	2008-02-26
Power saving by disabling cyclic bitline precharge Grant 7,295,481 - Pille , et al. November 13, 2	2007-11-13
Methods and apparatus for accessing memory Grant 7,289,370 - Adams , et al. October 30, 2	2007-10-30
Automatic check for cyclic operating conditions for SOI circuit simulation Grant 7,194,399 - Kroell , et al. March 20, 2	2007-03-20
Random Access Memory With A Plurality Of Symmetrical Memory Cells App 20070041240 - Adams; Chad A. ; et al.	2007-02-22
Methods and apparatus for accessing memory App 20070019461 - Adams; Chad Allen ; et al.	2007-01-25
Memory array with multiple read ports Grant 7,092,310 - Eckert , et al. August 15, 2	2006-08-15
Redundancy in signal distribution trees App 20060179396 - Ehrenreich; Sebastian ; et al.	2006-08-10
Method for placement of pipeline latches App 20060136854 - Arp; Andreas ; et al.	2006-06-22
Automatic Addition Of Power Connections To Chip Power App 20060085778 - Keinert; Joachim ; et al.	2006-04-20
Device and method for decoding an address word into word-line signals Grant 6,977,863 - Buettner , et al. December 20, 2	2005-12-20
Memory array with multiple read ports App 20050135179 - Eckert, Martin ; et al.	2005-06-23
Device and method for decoding an address word into word-line signals App 20050128845 - Buettner, Stefan ; et al.	2005-06-16
Automatic method for routing and designing an LSI App 20050132319 - Krauch, Ulrich ; et al.	2005-06-16
Power Saving By Disabling Cyclic Bitline Precharge App 20050117421 - Pille, Juergen ; et al.	2005-06-02
Device and method for decoding an address word into word-line signals Grant 6,873,567 - Buettner , et al. March 29, 2	2005-03-29
Receiving latch with hysteresis Grant 6,801,069 - Livolsi , et al. October 5, 2	2004-10-05
Read/write alignment scheme for port reduction of multi-port SRAM cells Grant 6,785,781 - Leenstra , et al. August 31, 2	2004-08-31
Hierarchical priority filter with integrated serialization for determining the entry with the highest priority in a buffer memory Grant 6,725,332 - Leenstra , et al. April 20, 2	2004-04-20
Device and method for decoding an address word into word-line signals App 20040027885 - Buettner, Stefan ; et al.	2004-02-12
Storage cell with integrated soft error detection and correction Grant 6,668,341 - Krauch , et al. December 23, 2	2003-12-23
Method and system for pipeline reduction App 20030208672 - Leenstra, Jens ; et al.	2003-11-06
Multiple port memory apparatus Grant 6,629,215 - Pille , et al. September 30, 2	2003-09-30
Static logic compatible multiport latch Grant 6,614,265 - Buettner , et al. September 2, 2	2003-09-02
SOI transistor with body contact and method of forming same Grant 6,537,861 - Kroell , et al. March 25, 2	2003-03-25
Static logic compatible multiport latch App 20020149408 - Buettner, Stefan ; et al.	2002-10-17
Automatic check for cyclic operating conditions for SOI circuit simulation App 20020016705 - Kroell, Karl-Eugen ; et al.	2002-02-07
SOI array sense and write margin qualification App 20020003733 - Eckert, Martin ; et al.	2002-01-10
Multiple port memory apparatus App 20010044882 - Pille, Juergen ; et al.	2001-11-22
Read/write alignment scheme for port red uction of multi-port SRAM cells App 20010034817 - Leenstra, Jens ; et al.	2001-10-25
Hierarchical priority filter with integrated serialization App 20010029557 - Leenstra, Jens ; et al.	2001-10-11
Dual-to -single-rail converter for the read out of static storage arrays App 20010005331 - Pille, Juergen ; et al.	2001-06-28