loadpatents
name:-0.12887787818909
name:-0.12612009048462
name:-0.034557104110718
Peterson; Kirk D. Patent Filings

Peterson; Kirk D.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Peterson; Kirk D..The latest application filed is for "multicomponent module design and fabrication".

Company Profile
37.144.133
  • Peterson; Kirk D. - Jericho VT
  • Peterson; Kirk D. - Allen TX
  • Peterson; Kirk D. - Essex Junction VT
  • Peterson, Kirk D. - Plano TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Multicomponent Module Design And Fabrication
App 20220308564 - Peterson; Kirk D. ;   et al.
2022-09-29
Predetermining separate thermal control points for chips of a multi-chip module
Grant 11,422,597 - Marz , et al. August 23, 2
2022-08-23
Predetermining Separate Thermal Control Points For Chips Of A Multi-chip Module
App 20220214728 - MARZ; Eric ;   et al.
2022-07-07
Enhancement of iso-via reliability
Grant 11,227,796 - Clevenger , et al. January 18, 2
2022-01-18
Metalization repair in semiconductor wafers
Grant 11,171,063 - Clevenger , et al. November 9, 2
2021-11-09
Metalization repair in semiconductor wafers
Grant 11,171,064 - Clevenger , et al. November 9, 2
2021-11-09
Microchip Level Shared Array Repair
App 20210319845 - MEEHAN; Timothy ;   et al.
2021-10-14
Performance-screen ring oscillator with switchable features
Grant 11,146,251 - DeForge , et al. October 12, 2
2021-10-12
Semiconductor via structure with lower electrical resistance
Grant 11,145,543 - Clevenger , et al. October 12, 2
2021-10-12
Passive methods of loose die identification
Grant 11,122,680 - Pizzuti , et al. September 14, 2
2021-09-14
Performance-screen Ring Oscillator With Switchable Features
App 20210281248 - DeForge; John B. ;   et al.
2021-09-09
Contacts Having A Geometry To Reduce Resistance
App 20210272902 - Clevenger; Lawrence A. ;   et al.
2021-09-02
Method and structures for personalizing lithography
Grant 11,067,895 - Deforge , et al. July 20, 2
2021-07-20
Contacts having a geometry to reduce resistance
Grant 11,062,993 - Clevenger , et al. July 13, 2
2021-07-13
Managed integrated circuit power supply distribution
Grant 11,018,084 - Aipperspach , et al. May 25, 2
2021-05-25
Photodiode structures
Grant 10,964,840 - Ellis-Monaghan , et al. March 30, 2
2021-03-30
Low resistance contact for transistors
Grant 10,923,575 - Clevenger , et al. February 16, 2
2021-02-16
Photodiode structures
Grant 10,896,992 - Ellis-Monaghan , et al. January 19, 2
2021-01-19
Compressive zone to reduce dicing defects
Grant 10,833,025 - Peterson , et al. November 10, 2
2020-11-10
Compressive Zone To Reduce Dicing Defects
App 20200312788 - Peterson; Kirk D. ;   et al.
2020-10-01
Passive Methods Of Loose Die Identification
App 20200305274 - Pizzuti; Nicolas ;   et al.
2020-09-24
Testing mechanism for a proximity fail probability of defects across integrated chips
Grant 10,768,226 - Peterson , et al. Sep
2020-09-08
Optimizing error correcting code in three-dimensional stacked memory
Grant 10,740,177 - Sethuraman , et al. A
2020-08-11
Shielding structures between optical waveguides
Grant 10,712,498 - Ellis-Monaghan , et al.
2020-07-14
Method of optimizing wire RC for device performance and reliability
Grant 10,699,950 - Clevenger , et al.
2020-06-30
Contacts Having A Geometry To Reduce Resistance
App 20200194371 - Clevenger; Lawrence A. ;   et al.
2020-06-18
Contacts having a geometry to reduce resistance
Grant 10,636,738 - Clevenger , et al.
2020-04-28
Step pyramid shaped structure to reduce dicing defects
Grant 10,636,750 - Li , et al.
2020-04-28
Step Pyramid Shaped Structure To Reduce Dicing Defects
App 20200118942 - Li; Shidong ;   et al.
2020-04-16
Photodiode structures
Grant 10,622,506 - Ellis-Monaghan , et al.
2020-04-14
Photodiode structures
Grant 10,615,302 - Ellis-Monaghan , et al.
2020-04-07
Managed integrated circuit power supply distribution
Grant 10,580,730 - Aipperspach , et al.
2020-03-03
Three-dimensional stacked memory optimizations for latency and power
Grant 10,534,545 - Chinnakkonda Vidyapoornachary , et al. Ja
2020-01-14
Enhancement Of Iso-via Reliability
App 20200013671 - Clevenger; Lawrence A. ;   et al.
2020-01-09
Low Resistance Contact For Transistors
App 20200013868 - CLEVENGER; LAWRENCE A. ;   et al.
2020-01-09
Three-dimensional stacked memory access optimization
Grant 10,528,288 - Chinnakkonda Vidyapoornachary , et al. J
2020-01-07
Photodiode Structures
App 20190386168 - ELLIS-MONAGHAN; John J. ;   et al.
2019-12-19
Semiconductor Via Structure With Lower Electrical Resistance
App 20190371663 - Clevenger; Lawrence A. ;   et al.
2019-12-05
Photodiode Structures
App 20190355865 - ELLIS-MONAGHAN; John J. ;   et al.
2019-11-21
Managed Integrated Circuit Power Supply Distribution
App 20190348361 - Aipperspach; Anthony G. ;   et al.
2019-11-14
Low resistance contact for transistors
Grant 10,468,491 - Clevenger , et al. No
2019-11-05
Enhancement of iso-via reliability
Grant 10,460,985 - Clevenger , et al. Oc
2019-10-29
Semiconductor via structure with lower electrical resistance
Grant 10,460,990 - Clevenger , et al. Oc
2019-10-29
Photodiode structures
Grant 10,453,987 - Ellis-Monaghan , et al. Oc
2019-10-22
Photodiode structures
Grant 10,424,686 - Ellis-Monaghan , et al. Sept
2019-09-24
Optimizing Error Correcting Code In Three-dimensional Stacked Memory
App 20190220351 - SETHURAMAN; SARAVANAN ;   et al.
2019-07-18
Three-dimensional Stacked Memory Access Optimization
App 20190187930 - Chinnakkonda Vidyapoornachary; Diyanesh B. ;   et al.
2019-06-20
Three-dimensional Stacked Memory Optimizations For Latency And Power
App 20190187915 - Chinnakkonda Vidyapoornachary; Diyanesh B. ;   et al.
2019-06-20
Managed Integrated Circuit Power Supply Distribution
App 20190148284 - Aipperspach; Anthony G. ;   et al.
2019-05-16
Shielding Structures Between Optical Waveguides
App 20190121022 - ELLIS-MONAGHAN; John J. ;   et al.
2019-04-25
Independently driving built-in self test circuitry over a range of operating conditions
Grant 10,254,340 - DeForge , et al.
2019-04-09
Semiconductor power and performance optimization
Grant 10,215,804 - Carey , et al. Feb
2019-02-26
Shielding structures between optical waveguides
Grant 10,191,213 - Ellis-Monaghan , et al. Ja
2019-01-29
Photodiode Structures
App 20190019914 - ELLIS-MONAGHAN; John J. ;   et al.
2019-01-17
Protective Liner Between A Gate Dielectric And A Gate Contact
App 20190013238 - Clevenger; Lawrence A. ;   et al.
2019-01-10
Metalization Repair In Semiconductor Wafers
App 20190006248 - Clevenger; Lawrence A. ;   et al.
2019-01-03
Testing Mechanism For A Proximity Fail Probability Of Defects Across Integrated Chips
App 20180372799 - Peterson; Kirk D. ;   et al.
2018-12-27
Lateral Non-volatile Storage Cell
App 20180358366 - DeForge; John B. ;   et al.
2018-12-13
Lateral non-volatile storage cell
Grant 10,153,291 - DeForge , et al. Dec
2018-12-11
Photodiode structures
Grant 10,141,472 - Ellis-Monaghan , et al. Nov
2018-11-27
High density capacitor integrated into focal plane array processing flow
Grant 10,121,912 - Peterson , et al. November 6, 2
2018-11-06
Testing mechanism for a proximity fail probability of defects across integrated chips
Grant 10,114,071 - Peterson , et al. October 30, 2
2018-10-30
Lateral non-volatile storage cell
Grant 10,109,639 - DeForge , et al. October 23, 2
2018-10-23
Structure and method for fully depleted silicon on insulator structure for threshold voltage modification
Grant 10,090,330 - Ellis-Monaghan , et al. October 2, 2
2018-10-02
Protective liner between a gate dielectric and a gate contact
Grant 10,083,862 - Clevenger , et al. September 25, 2
2018-09-25
Photodiode Structures
App 20180269348 - ELLIS-MONAGHAN; John J. ;   et al.
2018-09-20
Contacts Having A Geometry To Reduce Resistance
App 20180261543 - Clevenger; Lawrence A. ;   et al.
2018-09-13
Photodiode Structures
App 20180254374 - ELLIS-MONAGHAN; John J. ;   et al.
2018-09-06
Photodiode structures
Grant 10,050,171 - Ellis-Monaghan , et al. August 14, 2
2018-08-14
Method And Structures For Personalizing Lithography
App 20180203341 - Deforge; John B. ;   et al.
2018-07-19
Contacts having a geometry to reduce resistance
Grant 10,014,255 - Clevenger , et al. July 3, 2
2018-07-03
Structure And Method For Fully Depleted Silicon On Insulator Structure For Threshold Voltage Modification
App 20180182778 - Ellis-Monaghan; John J. ;   et al.
2018-06-28
Method of optimizing wire RC for device performance and reliability
Grant 9,997,408 - Clevenger , et al. June 12, 2
2018-06-12
Method Of Optimizing Wire Rc For Device Performance And Reliability
App 20180158731 - Clevenger; Lawrence A. ;   et al.
2018-06-07
Deterministic current based frequency optimization of processor chip
Grant 9,952,651 - Allen-Ware , et al. April 24, 2
2018-04-24
Metalization Repair In Semiconductor Wafers
App 20180096858 - Clevenger; Lawrence A. ;   et al.
2018-04-05
Metalization Repair In Semiconductor Wafers
App 20180096902 - Clevenger; Lawrence A. ;   et al.
2018-04-05
Robust Built-in Self Test Circuitry
App 20180080986 - DeForge; John B. ;   et al.
2018-03-22
Protective Liner Between A Gate Dielectric And A Gate Contact
App 20180076086 - Clevenger; Lawrence A. ;   et al.
2018-03-15
Photodiode Structures
App 20180076351 - ELLIS-MONAGHAN; John J. ;   et al.
2018-03-15
Semiconductor Via Structure With Lower Electrical Resistance
App 20180061707 - Clevenger; Lawrence A. ;   et al.
2018-03-01
Semiconductor Power And Performance Optimization
App 20180031630 - Carey; Sean M. ;   et al.
2018-02-01
Semiconductor via structure with lower electrical resistance
Grant 9,837,309 - Clevenger , et al. December 5, 2
2017-12-05
Enhancement Of Iso-via Reliability
App 20170316970 - Clevenger; Lawrence A. ;   et al.
2017-11-02
Testing Mechanism For A Proximity Fail Probability Of Defects Across Integrated Chips
App 20170307685 - PETERSON; KIRK D. ;   et al.
2017-10-26
Deterministic current based frequency optimization of processor chip
Grant 9,778,726 - Allen-Ware , et al. October 3, 2
2017-10-03
Optimized wires for resistance or electromigration
Grant 9,768,116 - Clevenger , et al. September 19, 2
2017-09-19
Contacts Having A Geometry To Reduce Resistance
App 20170263557 - Clevenger; Lawrence A. ;   et al.
2017-09-14
Enhancement of iso-via reliability
Grant 9,761,482 - Clevenger , et al. September 12, 2
2017-09-12
Waveguide switch with tuned photonic microring
Grant 9,740,080 - Ellis-Monaghan , et al. August 22, 2
2017-08-22
Immunity to inline charging damage in circuit designs
Grant 9,741,706 - Henderson , et al. August 22, 2
2017-08-22
Immunity to inline charging damage in circuit designs
Grant 9,741,707 - Henderson , et al. August 22, 2
2017-08-22
Optimized wires for resistance or electromigration
Grant 9,711,452 - Clevenger , et al. July 18, 2
2017-07-18
Dynamic noise mitigation in integrated circuit devices using local clock buffers
Grant 9,712,112 - Pedrone , et al. July 18, 2
2017-07-18
Optimized wires for resistance or electromigration
Grant 9,685,407 - Clevenger , et al. June 20, 2
2017-06-20
On chip electrostatic discharge (ESD) event monitoring
Grant 9,673,116 - DeForge , et al. June 6, 2
2017-06-06
Semiconductor Via Structure With Lower Electrical Resistance
App 20170148673 - Clevenger; Lawrence A. ;   et al.
2017-05-25
Signal monitoring of through-wafer vias using a multi-layer inductor
Grant 9,658,255 - DiRocco , et al. May 23, 2
2017-05-23
Waveguide Switch With Tuned Photonic Microring
App 20170123290 - Ellis-Monaghan; John J. ;   et al.
2017-05-04
Photodiode Structures
App 20170125627 - ELLIS-MONAGHAN; John J. ;   et al.
2017-05-04
Photodiode Structures
App 20170125626 - ELLIS-MONAGHAN; John J. ;   et al.
2017-05-04
Photodiode structures
Grant 9,627,575 - Ellis-Monaghan , et al. April 18, 2
2017-04-18
Method Of Optimizing Wire Rc For Device Performance And Reliability
App 20170098577 - Clevenger; Lawrence A. ;   et al.
2017-04-06
Methodology of grading reliability and performance of chips across wafer
Grant 9,575,115 - Chadwick , et al. February 21, 2
2017-02-21
Deterministic Current Based Frequency Optimization Of Processor Chip
App 20170031417 - ALLEN-WARE; Malcolm S. ;   et al.
2017-02-02
Deterministic Current Based Frequency Optimization Of Processor Chip
App 20170031415 - ALLEN-WARE; Malcolm S. ;   et al.
2017-02-02
Optimized Wires For Resistance Or Electromigration
App 20160379877 - CLEVENGER; Lawrence A. ;   et al.
2016-12-29
Optimized Wires For Resistance Or Electromigration
App 20160379927 - CLEVENGER; Lawrence A. ;   et al.
2016-12-29
Power gating and clock gating in wiring levels
Grant 9,520,876 - Chadwick , et al. December 13, 2
2016-12-13
Immunity To Inline Charging Damage In Circuit Designs
App 20160329317 - Henderson; Zachary ;   et al.
2016-11-10
Immunity To Inline Charging Damage In Circuit Designs
App 20160328513 - Henderson; Zachary ;   et al.
2016-11-10
Stress balancing of circuits
Grant 9,472,269 - Arsovski , et al. October 18, 2
2016-10-18
Light activated test connections
Grant 9,437,670 - Chadwick , et al. September 6, 2
2016-09-06
Bias-temperature induced damage mitigation circuit
Grant 9,405,311 - Onsongo , et al. August 2, 2
2016-08-02
Bias-temperature induced damage mitigation circuit
Grant 9,401,643 - Onsongo , et al. July 26, 2
2016-07-26
Circuit design for balanced logic stress
Grant 9,383,767 - Chadwick , et al. July 5, 2
2016-07-05
Immunity to inline charging damage in circuit designs
Grant 9,378,329 - Henderson , et al. June 28, 2
2016-06-28
Signal monitoring of through-wafer vias using a multi-layer inductor
Grant 9,372,208 - DiRocco , et al. June 21, 2
2016-06-21
Optimized Wires For Resistance Or Electromigration
App 20160163651 - CLEVENGER; Lawrence A. ;   et al.
2016-06-09
Reducing the impact of charged particle beams in critical dimension analysis
Grant 9,316,492 - Peterson , et al. April 19, 2
2016-04-19
Semiconductor-on-oxide structure and method of forming
Grant 9,299,769 - Barth, Jr. , et al. March 29, 2
2016-03-29
Photodiode Structures
App 20160079451 - ELLIS-MONAGHAN; John J. ;   et al.
2016-03-17
Methods for testing integrated circuits of wafer and testing structures for integrated circuits
Grant 9,269,642 - Coster , et al. February 23, 2
2016-02-23
Reducing The Impact Of Charged Particle Beams In Critical Dimension Analysis
App 20160040986 - Peterson; Kirk D. ;   et al.
2016-02-11
Circuit design for balanced logic stress
Grant 9,250,645 - Chadwick , et al. February 2, 2
2016-02-02
Metal-insulator-metal (MIM) capacitor with deep trench (DT) structure and method in a silicon-on-insulator (SOI)
Grant 9,224,797 - Barth, Jr. , et al. December 29, 2
2015-12-29
Signal Monitoring Of Through-wafer Vias Using A Multi-layer Inductor
App 20150362534 - DiRocco; Mark A. ;   et al.
2015-12-17
Enhancement Of Iso-via Reliability
App 20150364365 - Clevenger; Lawrence A. ;   et al.
2015-12-17
Method of self-correcting power grid for semiconductor structures
Grant 9,214,427 - Christiansen , et al. December 15, 2
2015-12-15
Use of contacts to create differential stresses on devices
Grant 9,196,528 - Ellis-Monaghan , et al. November 24, 2
2015-11-24
Semiconductor device burn-in stress method and system
Grant 9,176,184 - Knox , et al. November 3, 2
2015-11-03
Encapsulated sensors
Grant 9,171,971 - Ellis-Monaghan , et al. October 27, 2
2015-10-27
Circuit Design For Balanced Logic Stress
App 20150253807 - Chadwick; Nathaniel R. ;   et al.
2015-09-10
Enhancement Of Iso-via Reliability
App 20150255388 - Clevenger; Lawrence A. ;   et al.
2015-09-10
Circuit Design For Balanced Logic Stress
App 20150253808 - Chadwick; Nathaniel R. ;   et al.
2015-09-10
Method Ofself-correcting A Power Grid For Semiconductor Structures
App 20150243601 - Christiansen; Cathryn J. ;   et al.
2015-08-27
Stress Balancing Of Circuits
App 20150228357 - ARSOVSKI; Igor ;   et al.
2015-08-13
Thermal energy dissipation using backside thermoelectric devices
Grant 9,099,427 - Chadwick , et al. August 4, 2
2015-08-04
Self-correcting power grid for semiconductor structures method
Grant 9,087,841 - Christiansen , et al. July 21, 2
2015-07-21
Shielding Structures Between Optical Waveguides
App 20150192735 - ELLIS-MONAGHAN; John J. ;   et al.
2015-07-09
Signal Monitoring Of Through-wafer Vias Using A Multi-layer Inductor
App 20150185273 - DiRocco; Mark A. ;   et al.
2015-07-02
Semiconductor-on-insulator (SOI) deep trench capacitor
Grant 9,059,322 - Barth, Jr. , et al. June 16, 2
2015-06-16
Encapsulated Sensors
App 20150115270 - ELLIS-MONAGHAN; John J. ;   et al.
2015-04-30
Thermal Energy Dissipation Using Backside Thermoelectric Devices
App 20150115431 - Chadwick; Nathaniel R. ;   et al.
2015-04-30
Self-correcting Power Grid For Semiconductor Structures Method
App 20150115400 - Christiansen; Cathryn J. ;   et al.
2015-04-30
Semiconductor Device Burn-in Stress Method And System
App 20150100939 - Knox; Mark D. ;   et al.
2015-04-09
Vertically curved waveguide
Grant 9,002,156 - Ellis-Monaghan , et al. April 7, 2
2015-04-07
Structure and method to create a damascene local interconnect during metal gate deposition
Grant 8,993,428 - Ellis-Monaghan , et al. March 31, 2
2015-03-31
High Density Capacitor Integrated Into Focal Plane Array Processing Flow
App 20150035108 - Peterson; Kirk D. ;   et al.
2015-02-05
Metal-insulator-metal (MIM) capacitor with deep trench (DT) structure and method in a silicon-on-insulator (SOI)
Grant 8,946,045 - Barth, Jr. , et al. February 3, 2
2015-02-03
Nanoparticles For Making Supercapacitor And Diode Structures
App 20150028449 - Adkisson; James W. ;   et al.
2015-01-29
Determining chip burn-in workload using emulated application condition
Grant 8,943,458 - Chadwick , et al. January 27, 2
2015-01-27
Metal-insulator-metal (mim) Capacitor With Deep Trench (dt) Structure And Method In A Silicon-on-insulator (soi)
App 20150021737 - BARTH, JR.; JOHN E. ;   et al.
2015-01-22
Methods For Testing Integrated Circuits Of Wafer And Testing Structures For Integrated Circuits
App 20140367684 - Coster; Michael T. ;   et al.
2014-12-18
Vertical bend waveguide coupler for photonics applications
Grant 8,903,210 - Ellis-Monaghan , et al. December 2, 2
2014-12-02
High density capacitor integrated into focal plane array processing flow
Grant 8,895,343 - Peterson , et al. November 25, 2
2014-11-25
Semiconductor-on-oxide structure and method of forming
Grant 8,877,603 - Barth, Jr. , et al. November 4, 2
2014-11-04
Vertical Bend Waveguide Coupler For Photonics Applications
App 20140321801 - Ellis-Monaghan; John J. ;   et al.
2014-10-30
Vertically Curved Waveguide
App 20140321802 - Ellis-Monaghan; John J. ;   et al.
2014-10-30
Creating deep trenches on underlying substrate
Grant 8,860,113 - Appleyard , et al. October 14, 2
2014-10-14
Fuse for three dimensional solid-state battery
Grant 8,835,029 - Ellis-Monaghan , et al. September 16, 2
2014-09-16
Use of contacts to create differential stresses on devices
Grant 8,815,671 - Ellis-Monaghan , et al. August 26, 2
2014-08-26
3-dimensional integrated circuit testing using MEMS switches with tungsten cone contacts
Grant 8,791,712 - Ellis-Monaghan , et al. July 29, 2
2014-07-29
Micromirrors for color electronic paper and design structures for same
Grant 8,780,436 - Ellis-Monaghan , et al. July 15, 2
2014-07-15
On Chip Electrostatic Discharge (esd) Event Monitoring
App 20140191778 - DeForge; John B. ;   et al.
2014-07-10
Semiconductor-on-oxide Structure And Method Of Forming
App 20140191359 - Barth, JR.; John E. ;   et al.
2014-07-10
Light Activated Test Connections
App 20140145747 - CHADWICK; Nathaniel R. ;   et al.
2014-05-29
High Density Capacitor Integrated Into Focal Plane Array Processing Flow
App 20140138786 - Peterson; Kirk D. ;   et al.
2014-05-22
Methodology Of Grading Reliability And Performance Of Chips Across Wafer
App 20140107822 - Chadwick; Nathaniel R. ;   et al.
2014-04-17
Passive resonator, a system incorporating the passive resonator for real-time intra-process monitoring and control and an associated method
Grant 8,700,199 - Erturk , et al. April 15, 2
2014-04-15
Semiconductor-on-insulator (soi) Deep Trench Capacitor
App 20140084411 - Barth, JR.; John E. ;   et al.
2014-03-27
Micro-electro-mechanical system tiltable lens
Grant 8,658,456 - Ellis-Monaghan , et al. February 25, 2
2014-02-25
Creating Deep Trenches On Underlying Substrate
App 20140021585 - Appleyard; Jennifer E. ;   et al.
2014-01-23
Dual power supply memory array having a control circuit that dynamically selects a lower of two supply voltages for bitline pre-charge operations and an associated method
Grant 8,630,139 - Braceras , et al. January 14, 2
2014-01-14
Optimizing voltage on a power plane using a host control unit to control a networked voltage regulation module array
Grant 8,607,080 - Gervais , et al. December 10, 2
2013-12-10
Semiconductor structures using replacement gate and methods of manufacture
Grant 8,592,268 - Ellis-Monaghan , et al. November 26, 2
2013-11-26
Creating deep trenches on underlying substrate
Grant 8,586,444 - Appleyard , et al. November 19, 2
2013-11-19
Metal-insulator-metal (mim) Capacitor With Deep Trench (dt) Structure And Method In A Silicon-on-insulator (soi)
App 20130285193 - Barth, JR.; John E. ;   et al.
2013-10-31
Semiconductor-on-oxide Structure And Method Of Forming
App 20130256830 - Barth, JR.; John E. ;   et al.
2013-10-03
Three Dimensional Solid-state Battery Integrated With Cmos Devices
App 20130260183 - Ellis-Monaghan; John ;   et al.
2013-10-03
Creating Deep Trenches On Underlying Substrate
App 20130249052 - Appleyard; Jennifer E. ;   et al.
2013-09-26
Semiconductor Structures Using Replacement Gate And Methods Of Manufacture
App 20130228835 - ELLIS-MONAGHAN; John J. ;   et al.
2013-09-05
Micro-electro-mechanical System Tiltable Lens
App 20130224896 - Ellis-Monaghan; John J. ;   et al.
2013-08-29
Use Of Contacts To Create Differential Stresses On Devices
App 20130210227 - Ellis-Monaghan; John J. ;   et al.
2013-08-15
3-dimensional Integrated Circuit Testing Using Mems Switches With Tungsten Cone Contacts
App 20130200910 - Ellis-Monaghan; John J. ;   et al.
2013-08-08
Use Of Contacts To Create Differential Stresses On Devices
App 20130200434 - Ellis-Monaghan; John J. ;   et al.
2013-08-08
Micro-electro-mechanical system tiltable lens
Grant 8,492,807 - Ellis-Monaghan , et al. July 23, 2
2013-07-23
Micromirrors For Color Electronic Paper And Design Structures For Same
App 20130170012 - Ellis-Monaghan; John J. ;   et al.
2013-07-04
Nitride etch for improved spacer uniformity
Grant 8,470,713 - Culp , et al. June 25, 2
2013-06-25
Use of contacts to create differential stresses on devices
Grant 8,460,981 - Ellis-Monaghan , et al. June 11, 2
2013-06-11
Dual Power Supply Memory Array Having A Control Circuit That Dyanmically Selects A Lower Of Two Supply Voltages For Bitline Pre-charge Operations And An Associated Method
App 20130135944 - Braceras; George M. ;   et al.
2013-05-30
Semiconductor structures using replacement gate and methods of manufacture
Grant 8,440,519 - Ellis-Monaghan , et al. May 14, 2
2013-05-14
Fuse For Three Dimensional Solid-state Battery
App 20130084476 - Ellis-Monaghan; John J. ;   et al.
2013-04-04
Method of designing an integrated circuit based on a combination of manufacturability, test coverage and, optionally, diagnostic coverage
Grant 8,347,260 - Bernstein , et al. January 1, 2
2013-01-01
Optimizing voltage on a power plane using a networked voltage regulation module array
Grant 8,341,434 - Gervais , et al. December 25, 2
2012-12-25
System and method for correcting systematic parametric variations on integrated circuit chips in order to minimize circuit limited yield loss
Grant 8,301,290 - Culp , et al. October 30, 2
2012-10-30
Passive Resonator, A System Incorporating The Passive Resonator For Real-time Intra-process Monitoring And Control And An Associated Method
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2012-09-27
Spacer linewidth control
Grant 8,232,215 - Culp , et al. July 31, 2
2012-07-31
Utilizing Networked 3d Voltage Regulation Modules (vrm) To Optimize Power And Performance Of A Device
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2012-06-21
Nitride Etch For Improved Spacer Uniformity
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2012-06-14
Use Of Contacts To Create Differential Stresses On Devices
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2012-03-29
Use Of Contacts To Create Differential Stresses On Devices
App 20120074502 - Ellis-Monaghan; John J. ;   et al.
2012-03-29
Method Of Designing An Integrated Circuit Based On A Combination Of Manufacturability, Test Coverage And, Optionally, Diagnostic Coverage
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2012-03-15
Method and structure to prevent circuit network charging during fabrication of integrated circuits
Grant 8,120,141 - Gambino , et al. February 21, 2
2012-02-21
Semiconductor Structures Using Replacement Gate and Methods of Manufacture
App 20110281409 - ELLIS-MONAGHAN; John J. ;   et al.
2011-11-17
Variable Focus Point Lens
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2011-08-25
Micro-Electro-Mechanical System Tiltable Lens
App 20110134504 - Ellis-Monaghan; John J. ;   et al.
2011-06-09
High dynamic range imaging cell with electronic shutter extensions
Grant 7,948,535 - Ellis-Monaghan , et al. May 24, 2
2011-05-24
Methods and structures for enhancing perimeter-to-surface area homogeneity
Grant 7,935,638 - Culp , et al. May 3, 2
2011-05-03
System And Method For Correcting Systematic Parametric Variations On Integrated Circuit Chips In Order To Minimize Circuit Limited Yield Loss
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2011-04-28
Structure And Method To Create A Damascene Local Interconnect During Metal Gate Deposition
App 20110079827 - ELLIS-MONAGHAN; John J. ;   et al.
2011-04-07
Methods And Structures For Enhancing Perimeter-to-surface Area Homogeneity
App 20110068436 - Culp; James A. ;   et al.
2011-03-24
Structure for a phase locked loop with adjustable voltage based on temperature
Grant 7,877,222 - Boerstler , et al. January 25, 2
2011-01-25
Method of manufacturing dual orientation wafers
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2010-09-21
Voltage identifier sorting
Grant 7,739,573 - DeMent , et al. June 15, 2
2010-06-15
High dynamic range imaging cell with electronic shutter extensions
Grant 7,719,590 - Ellis-Monaghan , et al. May 18, 2
2010-05-18
Utilizing Networked Three Dimensional Voltage Regulation Modules (VRM) to Optimize Power and Performance of a Device
App 20090217059 - Gervais; Gilles ;   et al.
2009-08-27
High Dynamic Range Imaging Cell With Electronic Shutter Extensions
App 20090141155 - Ellis-Monaghan; John J. ;   et al.
2009-06-04
Adjusting voltage for a phase locked loop based on temperature
Grant 7,493,229 - Boerstler , et al. February 17, 2
2009-02-17
Structure for a Phase Locked Loop with Adjustable Voltage Based on Temperature
App 20090021314 - Boerstler; David W. ;   et al.
2009-01-22
Adjusting Voltage For A Phase Locked Loop Based On Temperature
App 20090024349 - Boerstler; David W. ;   et al.
2009-01-22
High Dynamic Range Imaging Cell With Electronic Shutter Extensions
App 20080224186 - Ellis-Monaghan; John J ;   et al.
2008-09-18
Voltage Identifier Sorting
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2008-07-10
Clustered Surface Preparation For Silicide And Metal Contacts
App 20080156257 - Deshpande; Sadanand V. ;   et al.
2008-07-03
Method of adjusting buried resistor resistance
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2008-07-01
Method Of Adjusting Buried Resistor Resistance
App 20080131980 - Hershberger; Douglas B. ;   et al.
2008-06-05
Method Of Manufacturing Dual Orientation Wafers
App 20080096370 - Anderson; Brent A. ;   et al.
2008-04-24
Method of manufacturing dual orientation wafers
Grant 7,344,962 - Anderson , et al. March 18, 2
2008-03-18
Clustered surface preparation for silicide and metal contacts
Grant 7,344,983 - Deshpande , et al. March 18, 2
2008-03-18
Anti-fuse Structure Optionally Integrated With Guard Ring Structure
App 20080029844 - Adkisson; James W. ;   et al.
2008-02-07
Protect diodes for hybrid-orientation substrate structures
Grant 7,315,066 - Atkisson , et al. January 1, 2
2008-01-01
Method For Fabricating Doped Polysilicon Lines
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2007-12-13
Method for fabricating doped polysilicon lines
Grant 7,303,952 - Adkisson , et al. December 4, 2
2007-12-04
Sidewall image transfer (SIT) technologies
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2007-09-04
Method And Structure To Prevent Circuit Network Charging During Fabrication Of Integrated Circuits
App 20070166848 - Gambino; Jeffrey P. ;   et al.
2007-07-19
Method and structure to prevent circuit network charging during fabrication of integrated circuits
Grant 7,232,711 - Gambino , et al. June 19, 2
2007-06-19
Method Of Manufacturing Dual Orientation Wafers
App 20060286778 - Anderson; Brent A. ;   et al.
2006-12-21
Method And Structure To Prevent Circuit Network Charging During Fabrication Of Integrated Circuits
App 20060267137 - Gambino; Jeffrey P. ;   et al.
2006-11-30
Clustered Surface Preparation For Silicide And Metal Contacts
App 20060211244 - Deshpande; Sadanand V. ;   et al.
2006-09-21
Dual Silicide Process To Improve Device Performance
App 20060163670 - Ellis-Monaghan; John J. ;   et al.
2006-07-27
Method For Fabricating Doped Polysilicon Lines
App 20060073689 - Adkisson; James W. ;   et al.
2006-04-06
Halo implant in semiconductor structures
Grant 6,949,796 - Ellis-Monaghan , et al. September 27, 2
2005-09-27
Integrated cobalt silicide process for semiconductor devices
Grant 6,793,735 - Cantell , et al. September 21, 2
2004-09-21
Double planar gated SOI MOSFET structure
Grant 6,660,596 - Adkisson , et al. December 9, 2
2003-12-09
Structure and method for formation of a blocked silicide resistor
Grant 6,660,664 - Adkisson , et al. December 9, 2
2003-12-09
Double planar gated SOI MOSFET structure
Grant 6,483,156 - Adkisson , et al. November 19, 2
2002-11-19
Double planar gated SOI MOSFET structure
App 20020153587 - Adkisson, James W. ;   et al.
2002-10-24
Charge pump with switched capacitor feedbaack
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2002-08-08
Scalable high-voltage devices
Grant 6,333,230 - Bryant , et al. December 25, 2
2001-12-25
Plasma etch pre-silicide clean
Grant 6,255,179 - Cantell , et al. July 3, 2
2001-07-03
Integrated cobalt silicide process for semiconductor devices
App 20010001298 - Cantell, Marc W. ;   et al.
2001-05-17
Combined chemical mechanical polishing and reactive ion etching process
Grant 6,221,775 - Ference , et al. April 24, 2
2001-04-24
Resistor string DAC with improved speed
Grant 6,130,634 - Wadsworth , et al. October 10, 2
2000-10-10
Analog to digital video converter
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1999-02-23

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