loadpatents
name:-0.077023983001709
name:-0.097975015640259
name:-0.0004279613494873
Perng; Baw-Ching Patent Filings

Perng; Baw-Ching

Patent Applications and Registrations

Patent applications and USPTO patent grants for Perng; Baw-Ching.The latest application filed is for "semiconductor device and method of making wafer level chip scale package".

Company Profile
0.34.33
  • Perng; Baw-Ching - Baoshan Township TW
  • Perng; Baw-Ching - Baoshan Township, Hsinchu County N/A TW
  • Perng; Baw-Ching - Hsin-Chu TW
  • PERNG; Baw-Ching - Hsinchu TW
  • Perng; Baw-Ching - Hsin-Chu County TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Semiconductor Device and Method of Making Wafer Level Chip Scale Package
App 20170236802 - Hsieh; Ming-Che ;   et al.
2017-08-17
Semiconductor device and method of making wafer level chip scale package
Grant 9,673,093 - Hsieh , et al. June 6, 2
2017-06-06
Chip package and manufacturing method thereof
Grant 9,093,450 - Perng , et al. July 28, 2
2015-07-28
Semiconductor Device and Method of Making Wafer Level Chip Scale Package
App 20150041985 - Hsieh; Ming-Che ;   et al.
2015-02-12
Chip package and manufacturing method thereof
Grant 8,916,420 - Perng , et al. December 23, 2
2014-12-23
Power MOSFET package
Grant 8,766,431 - Perng , et al. July 1, 2
2014-07-01
Chip Package And Manufacturing Method Thereof
App 20140073089 - PERNG; Baw-Ching ;   et al.
2014-03-13
Chip package and manufacturing method thereof
Grant 8,610,271 - Perng , et al. December 17, 2
2013-12-17
Chip package and method for forming the same
Grant 8,564,133 - Wen , et al. October 22, 2
2013-10-22
Chip Package And Manufacturing Method Thereof
App 20130256869 - PERNG; Baw-Ching ;   et al.
2013-10-03
Power Mosfet Package
App 20130193520 - PERNG; Baw-Ching ;   et al.
2013-08-01
Power MOSFET package
Grant 8,410,599 - Perng , et al. April 2, 2
2013-04-02
Surface treatment of metal interconnect lines
Grant 8,053,894 - Wan , et al. November 8, 2
2011-11-08
Chip Package And Manufacturing Method Thereof
App 20110127670 - PERNG; Baw-Ching ;   et al.
2011-06-02
Chip Package And Method For Forming The Same
App 20110042819 - WEN; Ying-Nan ;   et al.
2011-02-24
Chip Package And Manufacturing Method Thereof
App 20110024894 - PERNG; Baw-Ching ;   et al.
2011-02-03
Power Mosfet Package
App 20100289092 - PERNG; Baw-Ching ;   et al.
2010-11-18
Measuring low dielectric constant film properties during processing
Grant 7,400,401 - Tsai , et al. July 15, 2
2008-07-15
CMOS devices with improved gap-filling
Grant 7,378,308 - Hsu , et al. May 27, 2
2008-05-27
Method of trimming technology
Grant 7,354,847 - Chan , et al. April 8, 2
2008-04-08
CMOS devices with improved gap-filling
App 20070235823 - Hsu; Ju-Wang ;   et al.
2007-10-11
Surface treated low-k dielectric as diffusion barrier for copper metallization
Grant 7,271,103 - Huang , et al. September 18, 2
2007-09-18
Self-aligned double gate device and method for forming same
Grant 7,230,270 - Chen , et al. June 12, 2
2007-06-12
Methods and structures for critical dimension and profile measurement
Grant 7,208,331 - Shieh , et al. April 24, 2
2007-04-24
Method for multiple spacer width control
Grant 7,176,137 - Perng , et al. February 13, 2
2007-02-13
Recessed polysilicon gate structure for a strained silicon MOSFET device
Grant 7,172,933 - Huang , et al. February 6, 2
2007-02-06
Process for patterning high-k dielectric material
Grant 7,148,114 - Chiu , et al. December 12, 2
2006-12-12
Process for removing organic materials during formation of a metal interconnect
Grant 7,122,484 - Perng , et al. October 17, 2
2006-10-17
Measuring low dielectric constant film properties during processing
App 20060220653 - Tsai; Jang-Shiang ;   et al.
2006-10-05
Method for wet etching of high k thin film at low temperature
Grant 7,115,526 - Ho , et al. October 3, 2
2006-10-03
Method and structure for ultra narrow gate
Grant 7,081,413 - Chan , et al. July 25, 2
2006-07-25
Selective spacer layer deposition method for forming spacers with different widths
App 20060113616 - Liu; Ai-Sen ;   et al.
2006-06-01
Self-aligned double gate device and method for forming same
App 20060108644 - Chen; Hao-Yu ;   et al.
2006-05-25
Process for patterning high-k dielectric material
Grant 7,037,849 - Chiu , et al. May 2, 2
2006-05-02
Methods and structures for critical dimension and profile measurement
App 20060073620 - Shieh; Jyu-Horng ;   et al.
2006-04-06
Wet etchant composition and method for etching HfO2 and ZrO2
App 20060054597 - Perng; Baw-Ching ;   et al.
2006-03-16
Method for forming multiple spacer widths
Grant 7,011,929 - Lei , et al. March 14, 2
2006-03-14
Zirconium oxide and hafnium oxide etching using halogen containing chemicals
Grant 7,012,027 - Perng , et al. March 14, 2
2006-03-14
A Recessed Polysilicon Gate Structure for a Strained Silicon MOSFET Device
App 20060009001 - Huang; Yi-Chun ;   et al.
2006-01-12
Surface treatment of metal interconnect lines
App 20060001160 - Wan; Wen-Kai ;   et al.
2006-01-05
Wafer clean process
App 20050274393 - Perng, Baw-Ching ;   et al.
2005-12-15
Wet etchant composition and method for etching HfO2 and ZrO2
Grant 6,969,688 - Perng , et al. November 29, 2
2005-11-29
Process for removing organic materials during formation of a metal interconnect
App 20050245082 - Perng, Baw-Ching ;   et al.
2005-11-03
Surface treatment of metal interconnect lines
Grant 6,955,984 - Wan , et al. October 18, 2
2005-10-18
Selective spacer layer deposition method for forming spacers with different widths
Grant 6,943,077 - Liu , et al. September 13, 2
2005-09-13
Process for patterning high-k dielectric material
App 20050181590 - Chiu, Hsien-Kuang ;   et al.
2005-08-18
Method and structure for ultra narrow gate
App 20050164503 - Chan, Bor-Wen ;   et al.
2005-07-28
Novel method of trimming technology
App 20050164478 - Chan, Bor-Wen ;   et al.
2005-07-28
Zirconium oxide and hafnium oxide etching using halogen containing chemicals
App 20050164479 - Perng, Baw-Ching ;   et al.
2005-07-28
Surface treated low-k dielectric as diffusion barrier for copper metallization
App 20050085083 - Huang, Kuei-Wu ;   et al.
2005-04-21
Methods for improving sheet resistance of silicide layer after removal of etch stop layer
Grant 6,838,381 - Hsu , et al. January 4, 2
2005-01-04
Process for patterning high-k dielectric material
App 20040262262 - Chiu, Hsien-Kuang ;   et al.
2004-12-30
Surface treatment of metal interconnect lines
App 20040229460 - Wan, Wen-Kai ;   et al.
2004-11-18
Method for multiple spacer width control
App 20040222182 - Perng, Baw-Ching ;   et al.
2004-11-11
Advanced control for plasma process
Grant 6,812,044 - Chiu , et al. November 2, 2
2004-11-02
Selective spacer layer deposition method for forming spacers with different widths
App 20040198060 - Liu, Ai-Sen ;   et al.
2004-10-07
Method for forming multiple spacer widths
App 20040137373 - Lei, Ming-Ta ;   et al.
2004-07-15
Methods for improving sheet resistance of silicide layer after removal of etch stop layer
App 20040127026 - Hsu, Peng-Fu ;   et al.
2004-07-01
Advanced control for plasma process
App 20040121603 - Chiu, Hsien-Kuang ;   et al.
2004-06-24
Method for forming a semiconductor device having high-K gate dielectric material
Grant 6,746,900 - Liu , et al. June 8, 2
2004-06-08
Wet etchant composition and method for etching HfO2 and ZrO2
App 20040067657 - Perng, Baw-Ching ;   et al.
2004-04-08
Method for wet etching of high k thin film at low temperature
App 20030148625 - Ho, Hsieh Yue ;   et al.
2003-08-07
Integrated approach for controlling top dielectric loss during spacer etching
Grant 6,498,067 - Perng , et al. December 24, 2
2002-12-24
Method to pattern polysilicon gates with high-k material gate dielectric
Grant 6,479,403 - Tsei , et al. November 12, 2
2002-11-12

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