Pekin; Senol
Patent Applications and Registrations
Patent applications and USPTO patent grants for Pekin; Senol.The latest application filed is for "optimized bond out method for flip chip wafers".
- Pekin; Senol - San Jose CA
| Patent | Date |
|---|---|
| Optimized bond out method for flip chip wafers Grant 7,065,721 - Pekin , et al. June 20, 2 | 2006-06-20 |
| Optimized bond out method for flip chip wafers App 20050028123 - Pekin, Senol ; et al. | 2005-02-03 |
| Multi-level redistribution layer traces for reducing current crowding in flipchip solder bumps App 20050017368 - Mertol, Atila ; et al. | 2005-01-27 |
| Multi-level redistribution layer traces for reducing current crowding in flipchip solder bumps Grant 6,818,996 - Mertol , et al. November 16, 2 | 2004-11-16 |
| Multi-level redistribution layer traces for reducing current crowding in flipchip solder bumps App 20040121522 - Mertol, Atila ; et al. | 2004-06-24 |
| Flip-chip ball grid array package for electromigration testing Grant 6,700,207 - Pekin , et al. March 2, 2 | 2004-03-02 |
| Flip-chip Ball Grid Array Package For Electromigration Testing App 20040021232 - Pekin, Senol ; et al. | 2004-02-05 |
| NCAGE Code | 74H72 | PEKIN, SENOL |
| CAGE Code | 74H72 | PEKIN, SENOL |
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