| Patent | Date |
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Plasma treatment method to improve photo resist roughness and remove photo resist scum
Grant 11,372,332 - Park , et al. June 28, 2 | 2022-06-28 |
Substrate Treating Apparatus And Substrate Treating System Comprising The Same
App 20220090861 - Um; Young Je ; et al. | 2022-03-24 |
Method For Fabricating Semiconductor Device And Apparatus For Processing Substrate Using Plasma
App 20220084829 - Koo; Joun Taek ; et al. | 2022-03-17 |
Apparatus And Method For Processing Substrate Using Plasma
App 20220076925 - Koo; Joun Yaek ; et al. | 2022-03-10 |
Apparatus For Treating Substrate And Method For Treating Substrate
App 20210287877 - KIM; DONG-HUN ; et al. | 2021-09-16 |
Method For Treating Substrate And Apparatus For Treating Substrate
App 20210151333 - LEE; JI-HWAN ; et al. | 2021-05-20 |
Substrate Processing Apparatus
App 20210125854 - HAN; MIN SUNG ; et al. | 2021-04-29 |
Apparatus And Method For Processing Substrate
App 20210013049 - Lee; Seong Gil ; et al. | 2021-01-14 |
Selective atomic layer deposition (ALD) of protective caps to enhance extreme ultra-violet (EUV) etch resistance
Grant 10,770,294 - O'Meara , et al. Sep | 2020-09-08 |
Plasma Treatment Method to Improve Photo Resist Roughness and Remove Photo Resist Scum
App 20200133133 - Park; Wan Jae ; et al. | 2020-04-30 |
Selective Atomic Layer Deposition (ald) Of Protective Caps To Enhance Extreme Ultra-violet (euv) Etch Resistance
App 20190393035 - O'Meara; David ; et al. | 2019-12-26 |
Apparatus and method of treating a substrate
Grant 9,978,567 - Ham , et al. May 22, 2 | 2018-05-22 |
Apparatus And Method Of Treating A Substrate
App 20150214016 - HAM; Yong-Hyun ; et al. | 2015-07-30 |
Methods of patterning insulating layers using etching techniques that compensate for etch rate variations
Grant 8,058,176 - Park , et al. November 15, 2 | 2011-11-15 |
Integrated circuit capacitor structure
Grant 7,560,332 - Lee , et al. July 14, 2 | 2009-07-14 |
Method of fabricating interconnections of microelectronic device using dual damascene process
Grant 7,553,758 - Park , et al. June 30, 2 | 2009-06-30 |
Methods of forming mask patterns on semiconductor wafers that compensate for nonuniform center-to-edge etch rates during photolithographic processing
Grant 7,541,290 - Chang , et al. June 2, 2 | 2009-06-02 |
Methods of Patterning Insulating Layers Using Etching Techniques that Compensate for Etch Rate Variations
App 20090081873 - Park; Wan-jae ; et al. | 2009-03-26 |
Methods of forming electrical interconnect structures using polymer residues to increase etching selectivity through dielectric layers
Grant 7,488,687 - Park , et al. February 10, 2 | 2009-02-10 |
Methods of forming integrated circuit devices having metal interconnect structures therein
Grant 7,435,673 - Lee , et al. October 14, 2 | 2008-10-14 |
Methods of Forming Mask Patterns on Semiconductor Wafers that Compensate for Nonuniform Center-to-Edge Etch Rates During Photolithographic Processing
App 20080220609 - Chang; Chong Kwang ; et al. | 2008-09-11 |
Method of Fabricating Interconnections of Microelectronic Device Using Dual Damascene Process
App 20080070409 - Park; Wan-jae ; et al. | 2008-03-20 |
Methods of Forming Electrical Interconnect Structures Using Polymer Residues to Increase Etching Selectivity Through Dielectric Layers
App 20080064199 - Park; Wan Jae ; et al. | 2008-03-13 |
Integrated Circuit Capacitor Structure
App 20070184610 - Lee; Kyoung-woo ; et al. | 2007-08-09 |
Integrated circuit capacitor structure
Grant 7,229,875 - Lee , et al. June 12, 2 | 2007-06-12 |
Methods of forming contact structures in low-k materials using dual damascene processes
App 20070105362 - Kim; Jae Hak ; et al. | 2007-05-10 |
Methods of forming integrated circuit devices having metal interconnect structures therein
App 20070072406 - Lee; Kyoung Woo ; et al. | 2007-03-29 |
Method of fabricating dual damascene interconnections of microelectronic device using hybrid low k-dielectric and carbon-free inorganic filler
Grant 7,183,195 - Lee , et al. February 27, 2 | 2007-02-27 |
Method of determining whether a conductive layer of a semiconductor device is exposed through a contact hold
Grant 7,145,140 - Kim , et al. December 5, 2 | 2006-12-05 |
Dual damascene process
Grant 7,033,944 - Park , et al. April 25, 2 | 2006-04-25 |
Dry etching method using polymer mask selectively formed by CO gas
App 20060024971 - Park; Wan-Jae ; et al. | 2006-02-02 |
Method for forming a dual damascene wiring pattern in a semiconductor device
Grant 6,855,629 - Kim , et al. February 15, 2 | 2005-02-15 |
Inter-metal dielectric patterns and method of forming the same
Grant 6,849,536 - Lee , et al. February 1, 2 | 2005-02-01 |
Method of and apparatus for manufacturing a semiconductor device using a polysilicon hard mask
App 20040185664 - Kim, Ji-Soo ; et al. | 2004-09-23 |
Integrated circuit capacitor structure
App 20040137694 - Lee, Kyoung-Woo ; et al. | 2004-07-15 |
Method of fabricating dual damascene interconnections of microelectronic device using hybrid low k-dielectric and carbon-free inorganic filler
App 20040132291 - Lee, Kyoung-woo ; et al. | 2004-07-08 |
Method of and apparatus for manufacturing a semiconductor device using a polysilicon hard mask
Grant 6,719,808 - Kim , et al. April 13, 2 | 2004-04-13 |
Method of determining degree of charge-up induced by plasma used for manufacturing semiconductor device and apparatus therefor
App 20040061052 - Kim, Ji-Soo ; et al. | 2004-04-01 |
Dual damamscene process
App 20040058538 - Park, Wan-Jae ; et al. | 2004-03-25 |
Method for forming a dual damascene wiring pattern in a semiconductor device
App 20040018721 - Kim, Jae-Hak ; et al. | 2004-01-29 |
Method of determining degree of charge-up induced by plasma used for manufacturing semiconductor device and apparatus therefor
Grant 6,657,192 - Kim , et al. December 2, 2 | 2003-12-02 |
Inter-metal dielectric patterns and method of forming the same
App 20030186538 - Lee, Soo-Geun ; et al. | 2003-10-02 |
Conducting Line Of Semiconductor Device And Manufacturing Method Thereof Using Aluminum Oxide Layer As Hard Mask
App 20020113310 - Kim, Ji-Soo ; et al. | 2002-08-22 |
Method of manufacturing a self-aligned contact from a conductive layer that is free of voids
App 20020090808 - Jeon, Jeong-sic ; et al. | 2002-07-11 |
Method of forming interlevel dielectric layer of semiconductor device
App 20020064936 - Park, Wan-Jae ; et al. | 2002-05-30 |
Method for forming a polysilicon node in a semiconductor device
Grant 6,333,219 - Park , et al. December 25, 2 | 2001-12-25 |
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