name:-0.24034786224365
name:-0.12685894966125
name:-0.01370906829834
Pak; James Patent Filings

Pak; James

Patent Applications and Registrations

Patent applications and USPTO patent grants for Pak; James.The latest application filed is for "method of forming high-voltage transistor with thin gate poly".

Company Profile
8.17.17
  • Pak; James - Sunnyvale CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Trademarks
Patent Activity
PatentDate
Memory first process flow and device
Grant 11,342,429 - Fang , et al. May 24, 2
2022-05-24
Method of Forming High-Voltage Transistor with Thin Gate Poly
App 20210296343 - Chen; Chun ;   et al.
2021-09-23
Embedded Non-volatile Memory Device And Fabrication Method Of The Same
App 20210134811 - Chen; Chun ;   et al.
2021-05-06
Memory First Process Flow and Device
App 20210091198 - Fang; Shenqing ;   et al.
2021-03-25
Method of reducing charge loss in non-volatile memories
Grant 10,957,703 - Singh , et al. March 23, 2
2021-03-23
Embedded non-volatile memory device and fabrication method of the same
Grant 10,872,898 - Chen , et al. December 22, 2
2020-12-22
Memory first process flow and device
Grant 10,818,761 - Fang , et al. October 27, 2
2020-10-27
Non-volatile memory device and method of blank check
Grant 10,679,712 - Pak , et al.
2020-06-09
Memory First Process Flow and Device
App 20190386109 - Fang; Shenqing ;   et al.
2019-12-19
Split-gate flash cell formed on recessed substrate
Grant 10,497,710 - Kang , et al. De
2019-12-03
Method of Forming High-Voltage Transistor with Thin Gate Poly
App 20190304990 - Chen; Chun ;   et al.
2019-10-03
Memory first process flow and device
Grant 10,403,731 - Fang , et al. Sep
2019-09-03
Non-volatile Memory Device And Method Of Blank Check
App 20190198125 - Pak; James ;   et al.
2019-06-27
Method of forming high-voltage transistor with thin gate poly
Grant 10,242,996 - Chen , et al.
2019-03-26
Method Of Reducing Charge Loss In Non-volatile Memories
App 20190074286 - Singh; Pawan Kishore ;   et al.
2019-03-07
Method of Forming High-Voltage Transistor with Thin Gate Poly
App 20190027487 - Chen; Chun ;   et al.
2019-01-24
Embedded Non-volatile Memory Device And Fabrication Method Of The Same
App 20190027484 - Chen; Chun ;   et al.
2019-01-24
Memory First Process Flow and Device
App 20180366551 - Fang; Shenqing ;   et al.
2018-12-20
Method of reducing charge loss in non-volatile memories
Grant 10,068,912 - Singh , et al. September 4, 2
2018-09-04
Memory first process flow and device
Grant 10,014,380 - Fang , et al. July 3, 2
2018-07-03
Split-Gate Flash Cell formed on Recessed Substrate
App 20180166458 - Kang; Sung-Taeg ;   et al.
2018-06-14
Memory first process flow and device
Grant 9,917,166 - Fang , et al. March 13, 2
2018-03-13
Split-gate flash cell formed on recessed substrate
Grant 9,853,039 - Kang , et al. December 26, 2
2017-12-26
Memory First Process Flow and Device
App 20170141201 - Fang; Shenqing ;   et al.
2017-05-18
Memory First Process Flow and Device
App 20160293720 - Fang; Shenqing ;   et al.
2016-10-06
Memory first process flow and device
Grant 9,368,606 - Fang , et al. June 14, 2
2016-06-14
Memory First Process Flow and Device
App 20140167140 - FANG; Shenqing ;   et al.
2014-06-19
Charge Trapping Device with Improved Select Gate to Memory Gate Isoloation
App 20140167136 - RAMSBEY; Mark ;   et al.
2014-06-19
Adaptively programming or erasing flash memory blocks
Grant 8,724,388 - Neo , et al. May 13, 2
2014-05-13
Adaptively Programming or Erasing Flash Memory Blocks
App 20130258775 - NEO; Tio Wei ;   et al.
2013-10-03
Arrangement and method for detecting sequential processing effects in manufacturing using predetermined sequences within runs
Grant 5,930,138 - Lin , et al. July 27, 1
1999-07-27
Arrangement and method for detecting sequential processing effects in manufacturing using predetermined sequences within runs
Grant 5,716,856 - Lin , et al. February 10, 1
1998-02-10
Company Registrations
SEC0001418716PAK JAMES

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