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name:-0.083241939544678
name:-0.11061191558838
name:-0.019134044647217
Pachamuthu; Jayavel Patent Filings

Pachamuthu; Jayavel

Patent Applications and Registrations

Patent applications and USPTO patent grants for Pachamuthu; Jayavel.The latest application filed is for "prevention of latent block fails in three-dimensional nand".

Company Profile
16.104.83
  • Pachamuthu; Jayavel - San Jose CA
  • Pachamuthu; Jayavel - Milpitas CA
  • Pachamuthu; Jayavel - Yokkaichi CA
  • Pachamuthu; Jayavel - Mie JP
  • Pachamuthu; Jayavel - Mie Pref JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Prevention Of Latent Block Fails In Three-dimensional Nand
App 20220310161 - Pachamuthu; Jayavel ;   et al.
2022-09-29
Straight wirebonding of silicon dies
Grant 11,456,272 - Periyannan , et al. September 27, 2
2022-09-27
System and method for die crack detection in a CMOS bonded array
Grant 11,450,575 - Pachamuthu , et al. September 20, 2
2022-09-20
Memory controller for resolving string to string shorts
Grant 11,422,736 - Pachamuthu , et al. August 23, 2
2022-08-23
Semiconductor Device Including Coupled Bond Pads Having Differing Numbers Of Pad Legs
App 20220115343 - Periyannan; Kirubakaran ;   et al.
2022-04-14
System and Method for Die Crack Detection in a CMOS Bonded Array
App 20220108926 - Pachamuthu; Jayavel ;   et al.
2022-04-07
System and Method for Warpage Detection in a CMOS Bonded Array
App 20220093476 - Periyannan; Kirubakaran ;   et al.
2022-03-24
Straight Wirebonding Of Silicon Dies
App 20220084979 - Periyannan; Kirubakaran ;   et al.
2022-03-17
Semiconductor device including vertical bond pads
Grant 11,222,865 - Periyannan , et al. January 11, 2
2022-01-11
Memory Controller For Resolving String To String Shorts
App 20210389901 - Pachamuthu; Jayavel ;   et al.
2021-12-16
Semiconductor device including fractured semiconductor dies
Grant 11,195,820 - Linnen , et al. December 7, 2
2021-12-07
Semiconductor Device Including Vertical Bond Pads
App 20210358886 - Periyannan; Kirubakaran ;   et al.
2021-11-18
Three-dimensional memory device containing aluminum-silicon word lines and methods of manufacturing the same
Grant 11,164,883 - Rabkin , et al. November 2, 2
2021-11-02
Semiconductor device including fractured semiconductor dies
Grant 11,139,276 - Linnen , et al. October 5, 2
2021-10-05
Semiconductor Device Including Fractured Semiconductor Dies
App 20210280559 - Linnen; Daniel ;   et al.
2021-09-09
Program disturb improvements in multi-tier memory devices including improved non-data conductive gate implementation
Grant 11,107,540 - Pachamuthu , et al. August 31, 2
2021-08-31
Three-dimensional memory device containing etch stop structures and methods of making the same
Grant 11,101,284 - Pachamuthu , et al. August 24, 2
2021-08-24
Program Disturb Improvements in Multi-Tier Memory Devices Including Improved Non-Data Conductive Gate Implementation
App 20210257035 - Pachamuthu; Jayavel ;   et al.
2021-08-19
Column erasing in non-volatile memory strings
Grant 11,037,631 - Pachamuthu , et al. June 15, 2
2021-06-15
Three-dimensional memory device containing a silicon nitride ring in an opening in a memory film and method of making the same
Grant 11,024,645 - Moriyama , et al. June 1, 2
2021-06-01
Three-dimensional memory device having enhanced contact between polycrystalline channel and epitaxial pedestal structure and method of making the same
Grant 10,991,705 - Nishikawa , et al. April 27, 2
2021-04-27
Three-dimensional memory device containing a vertical semiconductor channel containing a connection strap and method of making the same
Grant 10,991,718 - Pachamuthu , et al. April 27, 2
2021-04-27
Three-dimensional memory device having enhanced contact between polycrystalline channel and epitaxial pedestal structure and method of making the same
Grant 10,991,706 - Nishikawa , et al. April 27, 2
2021-04-27
Different word line programming orders in non-volatile memory for error recovery
Grant 10,943,662 - Linnen , et al. March 9, 2
2021-03-09
Three-dimensional Memory Device Having Enhanced Contact Between Polycrystalline Channel And Epitaxial Pedestal Structure And Method Of Making The Same
App 20210035998 - NISHIKAWA; Masatoshi ;   et al.
2021-02-04
Three-dimensional Memory Device Having Enhanced Contact Between Polycrystalline Channel And Epitaxial Pedestal Structure And Method Of Making The Same
App 20210035999 - NISHIKAWA; Masatoshi ;   et al.
2021-02-04
Three-dimensional Memory Device Containing A Silicon Nitride Ring In An Opening In A Memory Film And Method Of Making The Same
App 20210036004 - MORIYAMA; Takumi ;   et al.
2021-02-04
Three-dimensional Memory Device Containing A Vertical Semiconductor Channel Containing A Connection Strap And Method Of Making The Same
App 20210036003 - PACHAMUTHU; Jayavel ;   et al.
2021-02-04
Controlled string erase for nonvolatile memory
Grant 10,861,559 - Desai , et al. December 8, 2
2020-12-08
Three-dimensional Memory Device Containing Etch Stop Structures And Methods Of Making The Same
App 20200194450 - Pachamuthu; Jayavel ;   et al.
2020-06-18
Column Erasing In Non-volatile Memory Strings
App 20200013469 - Pachamuthu; Jayavel ;   et al.
2020-01-09
Three-dimensional Memory Device Containing Aluminum-silicon Word Lines And Methods Of Manufacturing The Same
App 20200006364 - RABKIN; Peter ;   et al.
2020-01-02
Three-dimensional Memory Device Containing Aluminum-silicon Word Lines And Methods Of Manufacturing The Same
App 20200006374 - RABKIN; Peter ;   et al.
2020-01-02
Support pillar structures for leakage reduction in a three-dimensional memory device and methods of making the same
Grant 10,475,879 - Pachamuthu , et al. Nov
2019-11-12
Support pillar structures for leakage reduction in a three-dimensional memory device
Grant 10,381,434 - Pachamuthu , et al. A
2019-08-13
Select transistors with tight threshold voltage in 3D memory
Grant 10,128,257 - Pang , et al. November 13, 2
2018-11-13
Three-dimensional memory device having epitaxial germanium-containing vertical channel and method of making thereof
Grant 10,121,794 - Gunji-Yoneoka , et al. November 6, 2
2018-11-06
Multiple liner interconnects for three dimensional memory devices and method of making thereof
Grant 10,115,459 - Yamada , et al. October 30, 2
2018-10-30
Offset backside contact via structures for a three-dimensional memory device
Grant 10,103,161 - Ito , et al. October 16, 2
2018-10-16
Techniques for determining local interconnect defects
Grant 10,032,524 - Sabde , et al. July 24, 2
2018-07-24
Select Transistors With Tight Threshold Voltage In 3d Memory
App 20180190667 - Pang; Liang ;   et al.
2018-07-05
Three-dimensional memory device with leakage reducing support pillar structures and method of making thereof
Grant 10,014,316 - Yu , et al. July 3, 2
2018-07-03
NAND structure with tier select gate transistors
Grant 9,953,717 - Sabde , et al. April 24, 2
2018-04-24
Three-dimensional Memory Device With Leakage Reducing Support Pillar Structures And Method Of Making Thereof
App 20180108671 - YU; Fabo ;   et al.
2018-04-19
Select Transistors With Tight Threshold Voltage In 3d Memory
App 20180102375 - Pang; Liang ;   et al.
2018-04-12
Method of making a three-dimensional memory device having a heterostructure quantum well channel
Grant 9,941,295 - Rabkin , et al. April 10, 2
2018-04-10
Select transistors with tight threshold voltage in 3D memory
Grant 9,941,293 - Pang , et al. April 10, 2
2018-04-10
Erase stress and delta erase loop count methods for various fail modes in non-volatile memory
Grant 9,934,872 - Magia , et al. April 3, 2
2018-04-03
Inter-plane offset in backside contact via structures for a three-dimensional memory device
Grant 9,917,093 - Chu , et al. March 13, 2
2018-03-13
Multi-tier memory stack structure containing non-overlapping support pillar structures and method of making thereof
Grant 9,881,929 - Ravikirthi , et al. January 30, 2
2018-01-30
Methods for manufacturing ultrathin semiconductor channel three-dimensional memory devices
Grant 9,876,025 - Rabkin , et al. January 23, 2
2018-01-23
Crystalline layer stack for forming conductive layers in a three-dimensional memory structure
Grant 9,870,945 - Pachamuthu , et al. January 16, 2
2018-01-16
Amorphous silicon layer in memory device which reduces neighboring word line interference
Grant 9,859,298 - Pang , et al. January 2, 2
2018-01-02
Amorphous Silicon Layer In Memory Device Which Reduces Neighboring Word Line Interference
App 20170373086 - Pang; Liang ;   et al.
2017-12-28
Offset Backside Contact Via Structures For A Three-dimensional Memory Device
App 20170373087 - ITO; Fumitoshi ;   et al.
2017-12-28
Inter-plane Offset In Backside Contact Via Structures For A Three-dimensional Memory Device
App 20170373078 - CHU; Cheng-Chung ;   et al.
2017-12-28
Three-dimensional Memory Device Having Epitaxial Germanium-containing Vertical Channel And Method Of Making Thereof
App 20170365613 - GUNJI-YONEOKA; Marika ;   et al.
2017-12-21
Three-dimensional memory devices having a shaped epitaxial channel portion
Grant 9,842,851 - Pachamuthu , et al. December 12, 2
2017-12-12
Reducing Neighboring Word Line In Interference Using Low-K Oxide
App 20170345705 - Pang; Liang ;   et al.
2017-11-30
Reducing neighboring word line in interference using low-k oxide
Grant 9,831,118 - Pang , et al. November 28, 2
2017-11-28
Stress patterns to detect shorts in three dimensional non-volatile memory
Grant 9,830,998 - Pachamuthu , et al. November 28, 2
2017-11-28
Three dimensional NAND device containing fluorine doped layer and method of making thereof
Grant 9,825,051 - Rabkin , et al. November 21, 2
2017-11-21
Single-semiconductor-layer channel in a memory opening for a three-dimensional non-volatile memory device
Grant 9,799,669 - Rabkin , et al. October 24, 2
2017-10-24
Three-dimensional integration schemes for reducing fluorine-induced electrical shorts
Grant 9,799,671 - Pachamuthu , et al. October 24, 2
2017-10-24
High conductivity channel for 3D memory
Grant 9,793,283 - Pang , et al. October 17, 2
2017-10-17
Nand Structure With Tier Select Gate Transistors
App 20170287566 - Sabde; Jagdish ;   et al.
2017-10-05
Ultrathin semiconductor channel three-dimensional memory devices
Grant 9,780,108 - Rabkin , et al. October 3, 2
2017-10-03
3D vertical NAND with III-V channel
Grant 9,761,604 - Rabkin , et al. September 12, 2
2017-09-12
Three-dimensional memory devices having a shaped epitaxial channel portion and method of making thereof
Grant 9,754,958 - Pachamuthu , et al. September 5, 2
2017-09-05
Three dimensional NAND device with channel contacting conductive source line and method of making thereof
Grant 9,748,267 - Zhang , et al. August 29, 2
2017-08-29
Three-dimensional memory structure with multi-component contact via structure and method of making thereof
Grant 9,698,152 - Peri , et al. July 4, 2
2017-07-04
Method of forming 3D vertical NAND with III-V channel
Grant 9,685,454 - Rabkin , et al. June 20, 2
2017-06-20
Alternating refractive index in charge-trapping film in three-dimensional memory
Grant 9,666,593 - Pang , et al. May 30, 2
2017-05-30
Multi-charge region memory cells for a vertical NAND device
Grant 9,666,594 - Mizuno , et al. May 30, 2
2017-05-30
High stack 3D memory and method of making
Grant 9,666,590 - Chien , et al. May 30, 2
2017-05-30
Three-dimensional memory device containing source select gate electrodes with enhanced electrical isolation
Grant 9,659,956 - Pachamuthu , et al. May 23, 2
2017-05-23
Three-dimensional Memory Devices Having A Shaped Epitaxial Channel Portion And Method Of Making Thereof
App 20170125437 - Pachamuthu; Jayavel ;   et al.
2017-05-04
Three-dimensional Memory Devices Having A Shaped Epitaxial Channel Portion
App 20170125438 - Pachamuthu; Jayavel ;   et al.
2017-05-04
Ultrathin Semiconductor Channel Three-dimensional Memory Devices
App 20170110464 - RABKIN; Peter ;   et al.
2017-04-20
Methods For Manufacturing Ultrathin Semiconductor Channel Three-dimensional Memory Devices
App 20170110470 - RABKIN; Peter ;   et al.
2017-04-20
Multilevel memory stack structure employing support pillar structures
Grant 9,627,403 - Liu , et al. April 18, 2
2017-04-18
Multilevel memory stack structure and methods of manufacturing the same
Grant 9,583,500 - Pachamuthu , et al. February 28, 2
2017-02-28
Current based detection and recording of memory hole-interconnect spacing defects
Grant 9,564,219 - Magia , et al. February 7, 2
2017-02-07
Three-dimensional non-volatile memory device having a silicide source line and method of making thereof
Grant 9,559,117 - Pachamuthu , et al. January 31, 2
2017-01-31
Three-dimensional memory structure having self-aligned drain regions and methods of making thereof
Grant 9,543,320 - Pang , et al. January 10, 2
2017-01-10
Select gate defect detection
Grant 9,530,514 - Sabde , et al. December 27, 2
2016-12-27
Three Dimensional Nand Device With Channel Contacting Conductive Source Line And Method Of Making Thereof
App 20160372482 - Zhang; Yanli ;   et al.
2016-12-22
Three dimensional memory device with hybrid source electrode for wafer warpage reduction
Grant 9,524,981 - Pachamuthu , et al. December 20, 2
2016-12-20
Method of integrating select gate source and memory hole for three-dimensional non-volatile memory device
Grant 9,524,976 - Pachamuthu , et al. December 20, 2
2016-12-20
Method of making a vertical NAND device using sequential etching of multilayer stacks
Grant 9,520,406 - Makala , et al. December 13, 2
2016-12-13
Method Of Making A Three-dimensional Memory Device Having A Heterostructure Quantum Well Channel
App 20160358933 - Rabkin; Peter ;   et al.
2016-12-08
Vertical memory device with bit line air gap
Grant 9,515,085 - Rabkin , et al. December 6, 2
2016-12-06
Stress Patterns To Detect Shorts In Three Dimensional Non-volatile Memory
App 20160343454 - Pachamuthu; Jayavel ;   et al.
2016-11-24
Three-dimensional non-volatile memory device
Grant 9,496,274 - Pachamuthu , et al. November 15, 2
2016-11-15
Three Dimensional Memory Device With Hybrid Source Electrode For Wafer Warpage Reduction
App 20160329343 - PACHAMUTHU; Jayavel ;   et al.
2016-11-10
Multilevel Memory Stack Structure Employing Support Pillar Structures
App 20160322381 - Liu; Jin ;   et al.
2016-11-03
Three dimensional memory device containing aluminum source contact via structure and method of making thereof
Grant 9,478,495 - Pachamuthu , et al. October 25, 2
2016-10-25
CURRENT BASED Detection and Recording of Memory Hole-Interconnect Spacing Defects
App 20160300607 - Magia; Sagar ;   et al.
2016-10-13
Three-dimensional Integration Schemes For Reducing Fluorine-induced Electrical Shorts
App 20160300848 - PACHAMUTHU; Jayavel ;   et al.
2016-10-13
High aspect ratio memory hole channel contact formation
Grant 9,460,931 - Pachamuthu , et al. October 4, 2
2016-10-04
3D Vertical NAND With III-V Channel
App 20160284723 - Rabkin; Peter ;   et al.
2016-09-29
Method Of Forming 3D Vertical NAND With III-V Channel
App 20160284724 - Rabkin; Peter ;   et al.
2016-09-29
Three dimensional NAND device with channel contacting conductive source line and method of making thereof
Grant 9,455,263 - Zhang , et al. September 27, 2
2016-09-27
Method of making a vertical NAND device using a sacrificial layer with air gap and sequential etching of multilayer stacks
Grant 9,449,982 - Lu , et al. September 20, 2
2016-09-20
Three dimensional NAND string memory devices and methods of fabrication thereof
Grant 9,449,981 - Pachamuthu , et al. September 20, 2
2016-09-20
Memory cell with high-k charge trapping layer
Grant 9,449,985 - Rabkin , et al. September 20, 2
2016-09-20
Crystalline Layer Stack For Forming Conductive Layers In A Three-dimensional Memory Structure
App 20160268209 - PACHAMUTHU; Jayavel ;   et al.
2016-09-15
Fabricating 3D NAND memory having monolithic crystalline silicon vertical NAND channel
Grant 9,443,865 - Rabkin , et al. September 13, 2
2016-09-13
Fluorine-blocking insulating spacer for backside contact structure of three-dimensional memory structures
Grant 9,443,861 - Pachamuthu , et al. September 13, 2
2016-09-13
Method of making a three-dimensional memory array with etch stop
Grant 9,437,606 - Makala , et al. September 6, 2
2016-09-06
Three-dimensional memory device having a heterostructure quantum well channel
Grant 9,425,299 - Rabkin , et al. August 23, 2
2016-08-23
Three dimensional NAND device having reduced wafer bowing and method of making thereof
Grant 9,419,135 - Baenninger , et al. August 16, 2
2016-08-16
Techniques for Determining Local Interconnect Defects
App 20160232985 - Sabde; Jagdish ;   et al.
2016-08-11
Contact for vertical memory with dopant diffusion stopper and associated fabrication method
Grant 9,406,690 - Pang , et al. August 2, 2
2016-08-02
Fabricating 3D NAND Memory Having Monolithic Crystalline Silicon Vertical NAND Channel
App 20160181272 - Rabkin; Peter ;   et al.
2016-06-23
Contact For Vertical Memory With Dopant Diffusion Stopper And Associated Fabrication Method
App 20160172368 - Pang; Liang ;   et al.
2016-06-16
Three-dimensional memory structure having self-aligned drain regions and methods of making thereof
Grant 9,368,509 - Pang , et al. June 14, 2
2016-06-14
Method of forming memory cell with high-k charge trapping layer
Grant 9,368,510 - Rabkin , et al. June 14, 2
2016-06-14
Three dimensional NAND string memory devices with voids enclosed between control gate electrodes
Grant 9,356,031 - Lee , et al. May 31, 2
2016-05-31
Three-dimensional Memory Structure With Multi-component Contact Via Structure And Method Of Making Thereof
App 20160141294 - Peri; Somesh ;   et al.
2016-05-19
Three Dimensional Nand Device Having Reduced Wafer Bowing And Method Of Making Thereof
App 20160141419 - BAENNINGER; Matthias ;   et al.
2016-05-19
Erase Stress and Delta Erase Loop Count Methods for Various Fail Modes in Non-Volatile Memory
App 20160125956 - Magia; Sagar ;   et al.
2016-05-05
Three dimensional NAND device with silicon germanium heterostructure channel
Grant 9,331,093 - Rabkin , et al. May 3, 2
2016-05-03
Three Dimensional Nand Device Containing Fluorine Doped Layer And Method Of Making Thereof
App 20160118396 - RABKIN; Peter ;   et al.
2016-04-28
Deuterium Anneal Of Semiconductor Channels In A Three-dimensional Memory Structure
App 20160118391 - ZHAO; Wei ;   et al.
2016-04-28
Single-semiconductor-layer Channel In A Memory Opening For A Three-dimensional Non-volatile Memory Device
App 20160111432 - Rabkin; Peter ;   et al.
2016-04-21
Three Dimensional Nand String Memory Devices And Methods Of Fabrication Thereof
App 20160111434 - PACHAMUTHU; Jayavel ;   et al.
2016-04-21
Three-dimensional Memory Structure Having Self-aligned Drain Regions And Methods Of Making Thereof
App 20160111437 - PANG; Liang ;   et al.
2016-04-21
Three-dimensional Memory Structure Having Self-aligned Drain Regions And Methods Of Making Thereof
App 20160111435 - Pang; Liang ;   et al.
2016-04-21
Multilevel Memory Stack Structure And Methods Of Manufacturing The Same
App 20160104715 - Pachamuthu; Jayavel ;   et al.
2016-04-14
Three Dimensional Nand Device With Silicon Germanium Heterostructure Channel
App 20160099250 - Rabkin; Peter ;   et al.
2016-04-07
Alternating Refractive Index In Charge-Trapping Film In Three-Dimensional Memory
App 20160093636 - Pang; Liang ;   et al.
2016-03-31
Vertical Memory Device With Bit Line Air Gap
App 20160093635 - RABKIN; Peter ;   et al.
2016-03-31
High Stack 3d Memory And Method Of Making
App 20160086964 - CHIEN; Henry ;   et al.
2016-03-24
3D memory having crystalline silicon NAND string channel
Grant 9,287,290 - Rabkin , et al. March 15, 2
2016-03-15
Multi-charge Region Memory Cells For A Vertical Nand Device
App 20160071876 - MIZUNO; Genta ;   et al.
2016-03-10
Methods to improve programming of slow cells
Grant 9,269,446 - Magia , et al. February 23, 2
2016-02-23
Three Dimensional Nand String Memory Devices And Methods Of Fabrication Thereof
App 20160043093 - Lee; Yao-Sheng ;   et al.
2016-02-11
Bias To Detect And Prevent Short Circuits In Three-Dimensional Memory Device
App 20160035426 - Yuan; Jiahui ;   et al.
2016-02-04
AC stress methods to screen out bit line defects
Grant 9,240,249 - Sabde , et al. January 19, 2
2016-01-19
Bias to detect and prevent short circuits in three-dimensional memory device
Grant 9,236,131 - Yuan , et al. January 12, 2
2016-01-12
Multilevel memory stack structure and methods of manufacturing the same
Grant 9,230,987 - Pachamuthu , et al. January 5, 2
2016-01-05
Methods of fabricating a three-dimensional non-volatile memory device
Grant 9,230,973 - Pachamuthu , et al. January 5, 2
2016-01-05
Single-semiconductor-layer channel in a memory opening for a three-dimensional non-volatile memory device
Grant 9,230,980 - Rabkin , et al. January 5, 2
2016-01-05
Protective structure to prevent short circuits in a three-dimensional memory device
Grant 9,230,982 - Yuan , et al. January 5, 2
2016-01-05
High dielectric constant etch stop layer for a memory structure
Grant 9,230,979 - Pachamuthu , et al. January 5, 2
2016-01-05
Methods of selective removal of blocking dielectric in NAND memory strings
Grant 9,230,974 - Pachamuthu , et al. January 5, 2
2016-01-05
Three Dimensional Nand Device With Channel Contacting Conductive Source Line And Method Of Making Thereof
App 20150380418 - Zhang; Yanli ;   et al.
2015-12-31
Techniques for detection and treating memory hole to local interconnect marginality defects
Grant 9,224,502 - Sabde , et al. December 29, 2
2015-12-29
Three-dimensional Non-volatile Memory Device Having A Silicide Source Line And Method Of Making Thereof
App 20150364488 - PACHAMUTHU; Jayavel ;   et al.
2015-12-17
Metal replacement process for low resistance source contacts in 3D NAND
Grant 9,209,031 - Baenninger , et al. December 8, 2
2015-12-08
Techniques for detecting broken word lines in non-volatile memories
Grant 9,202,593 - Magia , et al. December 1, 2
2015-12-01
Three dimensional NAND devices with air gap or low-k core
Grant 9,177,966 - Rabkin , et al. November 3, 2
2015-11-03
Method Of Making A Vertical Nand Device Using A Sacrificial Layer With Air Gap And Sequential Etching Of Multilayer Stacks
App 20150294978 - LU; Zhenyu ;   et al.
2015-10-15
Metal Replacement Process For Low Resistance Source Contacts In 3D NAND
App 20150255481 - Baenninger; Matthias ;   et al.
2015-09-10
Metal layer air gap formation
Grant 9,123,714 - Pachamuthu , et al. September 1, 2
2015-09-01
Multilevel Memory Stack Structure And Methods Of Manufacturing The Same
App 20150236038 - PACHAMUTHU; Jayavel ;   et al.
2015-08-20
Method of forming an active area with floating gate negative offset profile in FG NAND memory
Grant 9,099,496 - Tian , et al. August 4, 2
2015-08-04
Semiconductor device with copper interconnects separated by air gaps
Grant 9,030,016 - Purayath , et al. May 12, 2
2015-05-12
High aspect ratio memory hole channel contact formation
Grant 9,023,719 - Pachamuthu , et al. May 5, 2
2015-05-05
Method Of Making A Vertical Nand Device Using Sequential Etching Of Multilayer Stacks
App 20150118811 - Makala; Raghuveer S. ;   et al.
2015-04-30
Methods of fabricating a three-dimensional non-volatile memory device
Grant 8,987,089 - Pachamuthu , et al. March 24, 2
2015-03-24
Methods Of Fabricating A Three-dimensional Non-volatile Memory Device
App 20150079742 - Pachamuthu; Jayavel ;   et al.
2015-03-19
High Aspect Ratio Memory Hole Channel Contact Formation
App 20150079765 - Pachamuthu; Jayavel ;   et al.
2015-03-19
Methods Of Fabricating A Three-dimensional Non-volatile Memory Device
App 20150079743 - Pachamuthu; Jayavel ;   et al.
2015-03-19
High Aspect Ratio Memory Hole Channel Contact Formation
App 20150076584 - Pachamuthu; Jayavel ;   et al.
2015-03-19
Method Of Integrating Select Gate Source And Memory Hole For Three-dimensional Non-volatile Memory Device
App 20150076580 - PACHAMUTHU; Jayavel ;   et al.
2015-03-19
Single-semiconductor-layer Channel In A Memory Opening For A Three-dimensional Non-volatile Memory Device
App 20150076586 - RABKIN; Peter ;   et al.
2015-03-19
Three-dimensional Non-volatile Memory Device
App 20150076585 - Pachamuthu; Jayavel ;   et al.
2015-03-19
Method of making a vertical NAND device using sequential etching of multilayer stacks
Grant 8,946,023 - Makala , et al. February 3, 2
2015-02-03
Method Of Making A Three-Dimensional Memory Array With Etch Stop
App 20150008503 - MAKALA; Raghuveer S. ;   et al.
2015-01-08
Method Of Forming An Active Area With Floating Gate Negative Offset Profile In Fg Nand Memory
App 20140367762 - Tian; Ming ;   et al.
2014-12-18
Method Of Making A Vertical Nand Device Using Sequential Etching Of Multilayer Stacks
App 20140273373 - MAKALA; Raghuveer S. ;   et al.
2014-09-18
Air isolation in high density non-volatile memory
Grant 8,778,749 - Pachamuthu , et al. July 15, 2
2014-07-15
Copper Interconnects Separated By Air Gaps And Method Of Making Thereof
App 20140008804 - Purayath; Vinod R. ;   et al.
2014-01-09
Copper interconnects separated by air gaps and method of making thereof
Grant 8,575,000 - Purayath , et al. November 5, 2
2013-11-05
Process for fabricating non-volatile storage
Grant 8,530,297 - Pachamuthu , et al. September 10, 2
2013-09-10
Metal Layer Air Gap Formation
App 20130214415 - Pachamuthu; Jayavel ;   et al.
2013-08-22
Copper Interconnects Separated by Air Gaps and Method of Making Thereof
App 20130020708 - Purayath; Vinod R. ;   et al.
2013-01-24
Air Isolation In High Density Non-Volatile Memory
App 20120178235 - Pachamuthu; Jayavel ;   et al.
2012-07-12
Process For Fabricating Non-volatile Storage
App 20110256707 - Pachamuthu; Jayavel ;   et al.
2011-10-20

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