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name:-0.036295890808105
name:-0.059533834457397
name:-0.0006110668182373
Oowaki; Yukihito Patent Filings

Oowaki; Yukihito

Patent Applications and Registrations

Patent applications and USPTO patent grants for Oowaki; Yukihito.The latest application filed is for "semiconductor device and method of designing a wiring of a semiconductor device".

Company Profile
0.44.22
  • Oowaki; Yukihito - Kanagawa-Ken JP
  • Oowaki; Yukihito - Yokohama JP
  • Oowaki; Yukihito - Yokohama-shi JP
  • Oowaki; Yukihito - Tokyo JP
  • Oowaki; Yukihito - Kanagawa JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Semiconductor device and method of designing a wiring of a semiconductor device
Grant 8,269,346 - Seta , et al. September 18, 2
2012-09-18
Semiconductor Device And Method Of Designing A Wiring Of A Semiconductor Device
App 20120025377 - Seta; Shoji ;   et al.
2012-02-02
Semiconductor device and system
Grant 7,487,370 - Shiratake , et al. February 3, 2
2009-02-03
Ferroelectric Memory and Semiconductor Memory
App 20080285327 - Ogiwara; Ryu ;   et al.
2008-11-20
MIS transistor and method for producing same
Grant 7,303,965 - Oowaki , et al. December 4, 2
2007-12-04
Chain ferroelectric random access memory (CFRAM) having an intrinsic transistor connected in parallel with a ferroelectric capacitor
Grant 7,295,456 - Ogiwara , et al. November 13, 2
2007-11-13
Semiconductor device adapted to minimize clock skew
Grant 7,236,035 - Shiratake , et al. June 26, 2
2007-06-26
Semiconductor device and system
App 20060271799 - Shiratake; Shinichiro ;   et al.
2006-11-30
Ferroelectric Memory and Semiconductor Memory
App 20060193162 - Ogiwara; Ryu ;   et al.
2006-08-31
Ferroelectric memory with an intrinsic access transistor coupled to a capacitor
Grant 7,057,917 - Ogiwara , et al. June 6, 2
2006-06-06
Semiconductor device adapted to minimize clock skew
App 20060061401 - Shiratake; Shinichiro ;   et al.
2006-03-23
Series connected TC unit type ferroelectric RAM and test method thereof
Grant 6,993,691 - Ogiwara , et al. January 31, 2
2006-01-31
Ferroelectric memory
Grant 6,906,944 - Takeuchi , et al. June 14, 2
2005-06-14
Ferroelectric memory and semiconductor memory
App 20040136225 - Ogiwara, Ryu ;   et al.
2004-07-15
Ferroelectric memory
App 20040062115 - Takeuchi, Yoshiaki ;   et al.
2004-04-01
MIS transistor having a large driving current and method for producing the same
Grant 6,690,047 - Oowaki , et al. February 10, 2
2004-02-10
Ferroelectric random access memory with isolation transistors coupled between a sense amplifier and an equalization circuit
Grant 6,671,200 - Ogiwara , et al. December 30, 2
2003-12-30
Ferroelectric memory having a device responsive to current lowering
Grant 6,643,162 - Takeuchi , et al. November 4, 2
2003-11-04
Ferroelectric random access memory
Grant 6,611,450 - Oowaki , et al. August 26, 2
2003-08-26
Ferroelectric memory and semiconductor memory
App 20030128572 - Ogiwara, Ryu ;   et al.
2003-07-10
Chain-type ferroelectric random access memory (FRAM) with rewrite transistors coupled between a sense amplifier and a bit line pair
Grant 6,552,922 - Ogiwara , et al. April 22, 2
2003-04-22
Ferroelectric memory having memory cell array accessibility safeguards
Grant 6,510,071 - Oowaki January 21, 2
2003-01-21
Ferroelectric memory and semiconductor memory
App 20020196656 - Ogiwara, Ryu ;   et al.
2002-12-26
Series connected TC unit type ferroelectric RAM and test method thereof
App 20020188893 - Ogiwara, Ryu ;   et al.
2002-12-12
Chain type ferroelectric memory with isolation transistors coupled between a sense amplifier and an equalization circuit
Grant 6,473,330 - Ogiwara , et al. October 29, 2
2002-10-29
Ferroelectric random access memory
App 20020122328 - Oowaki, Yukihito ;   et al.
2002-09-05
MIS transistor having a large driving current and method for producing the same
App 20020117725 - Oowaki, Yukihito ;   et al.
2002-08-29
Random access memory with divided memory banks and data read/write architecture therefor
App 20020089891 - Oowaki, Yukihito
2002-07-11
Semiconductor integrated circuit
Grant 6,392,467 - Oowaki , et al. May 21, 2
2002-05-21
Apparatus comprising clock control circuit and device using internal clock signal synchronized to external clock signal
Grant 6,393,080 - Kamoshida , et al. May 21, 2
2002-05-21
Semiconductor memory device
App 20020056878 - Oowaki, Yukihito ;   et al.
2002-05-16
Clock control circuit
Grant 6,388,484 - Kamoshida , et al. May 14, 2
2002-05-14
Ferroelectric memory device
App 20020044477 - Takeuchi, Yoshiaki ;   et al.
2002-04-18
Semiconductor memory device
App 20020034091 - Miyakawa, Tadashi ;   et al.
2002-03-21
Random Access Memory With Divided Memory Banks And Data Read/write Architecture Therefor
App 20020031037 - Oowaki, Yukihito
2002-03-14
Semiconductor Memory Device Using Ferroelectric Film
App 20020024838 - Takeuchi, Yoshiaki ;   et al.
2002-02-28
Configurable integrated circuit and method of testing the same
Grant 6,349,395 - Ohuchi , et al. February 19, 2
2002-02-19
Configurable Integrated Circuit And Method Of Testing The Same
App 20020010885 - OHUCHI, KAZUNORI ;   et al.
2002-01-24
MISFET semiconductor device having relative impurity concentration levels between layers
Grant 6,323,525 - Noguchi , et al. November 27, 2
2001-11-27
MIS transistor and method for producing same
App 20010030350 - Oowaki, Yukihito ;   et al.
2001-10-18
Ferroelectric memory
App 20010022741 - Takeuchi, Yoshiaki ;   et al.
2001-09-20
Ferroelectric memory
App 20010021120 - Oowaki, Yukihito
2001-09-13
MIS transistor having a large driving current and method for producing the same
Grant 6,278,165 - Oowaki , et al. August 21, 2
2001-08-21
Semiconductor integrated circuit device
Grant 6,177,811 - Fuse , et al. January 23, 2
2001-01-23
Processor and information processing apparatus with a reconfigurable circuit
Grant 6,157,997 - Oowaki , et al. December 5, 2
2000-12-05
Semiconductor memory device
Grant 6,130,461 - Oowaki , et al. October 10, 2
2000-10-10
Electronic circuit apparatus having circuits for effectively compensating for clock skew
Grant 6,124,744 - Oowaki September 26, 2
2000-09-26
Semiconductor integrated circuit having suppressed leakage currents
Grant 6,087,893 - Oowaki , et al. July 11, 2
2000-07-11
Semiconductor device
Grant 6,040,610 - Noguchi , et al. March 21, 2
2000-03-21
Semiconductor memory device such as a DRAM capable of holding data without refresh
Grant 5,953,246 - Takashima , et al. September 14, 1
1999-09-14
Semiconductor memory device having a multilayered bitline structure with respective wiring layers for reading and writing data
Grant 5,933,380 - Tsuchida , et al. August 3, 1
1999-08-03
NAND-type dynamic RAM having temporary storage register and sense amplifier coupled to multi-open bit lines
Grant 5,892,724 - Hasegawa , et al. April 6, 1
1999-04-06
Integrated circuit with stacked sub-circuits between Vcc and ground so as to conserve power and reduce the voltage across any one transistor
Grant 5,867,040 - Fuse , et al. February 2, 1
1999-02-02
Dynamic random-access memory with high-speed word-line driver circuit
Grant 5,864,508 - Takashima , et al. January 26, 1
1999-01-26
Dynamic semiconductor memory device having an improved sense amplifier layout arrangement
Grant 5,859,805 - Takashima , et al. January 12, 1
1999-01-12
Semiconductor memory device including a plurality of dynamic memory cells connected in series
Grant 5,831,928 - Nakano , et al. November 3, 1
1998-11-03
Semiconductor memory device having folded bit line array and an open bit line array with imbalance correction
Grant 5,761,109 - Takashima , et al. June 2, 1
1998-06-02
Semiconductor memory device using dynamic type memory cells
Grant 5,661,678 - Yoshida , et al. August 26, 1
1997-08-26
Semiconductor memory device with reduced read time and power consumption
Grant 5,654,912 - Hasegawa , et al. August 5, 1
1997-08-05
Dynamic random access memory with variable sense-amplifier drive capacity
Grant 5,590,080 - Hasagawa , et al. December 31, 1
1996-12-31
Integrated semiconductor memory with internal voltage booster of lesser dependency on power supply voltage
Grant 5,499,209 - Oowaki , et al. March 12, 1
1996-03-12
Random access memory with divided memory banks and data read/write architecture therefor
Grant 5,497,351 - Oowaki March 5, 1
1996-03-05
Semiconductor memory
Grant 5,463,577 - Oowaki , et al. October 31, 1
1995-10-31
Integrated semiconductor memory with internal voltage booster of lesser dependency on power supply voltage
Grant 5,307,315 - Oowaki , et al. April 26, 1
1994-04-26
Dynamic semiconductor memory device with twisted bit-line structure
Grant 5,144,583 - Oowaki , et al. September 1, 1
1992-09-01
MOS type random access memory with interference noise eliminator
Grant 5,062,079 - Tsuchida , et al. October 29, 1
1991-10-29

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