loadpatents
name:-0.15838289260864
name:-0.81942296028137
name:-0.001068115234375
Nowka; Kevin John Patent Filings

Nowka; Kevin John

Patent Applications and Registrations

Patent applications and USPTO patent grants for Nowka; Kevin John.The latest application filed is for "methods and apparatus for varying a supply voltage or reference voltage using independent control of diode voltage in asymmetrical double-gate devices".

Company Profile
0.30.26
  • Nowka; Kevin John - Georgetown TX
  • Nowka; Kevin John - Round Rock TX
  • Nowka; Kevin John - Georgetwon TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Methods and apparatus for varying a supply voltage or reference voltage using independent control of diode voltage in asymmetrical double-gate devices
Grant 9,076,509 - Chuang , et al. July 7, 2
2015-07-07
Digital transmission circuit and interface providing selectable power consumption via multiple weighted driver slices
Grant 8,010,066 - Carballo , et al. August 30, 2
2011-08-30
Methods and apparatus for varying a supply voltage or reference voltage using independent control of diode voltage in asymmetrical double-gate devices
Grant 7,952,422 - Chuang , et al. May 31, 2
2011-05-31
Dual gate transistor keeper dynamic logic
Grant 7,876,131 - Chuang , et al. January 25, 2
2011-01-25
Digital transmission circuit and method providing selectable power consumption via multiple weighted driver slices
Grant 7,636,556 - Carballo , et al. December 22, 2
2009-12-22
Dual Gate Transistor Keeper Dynamic Logic
App 20090302894 - Chuang; Ching-Te ;   et al.
2009-12-10
Methods and Apparatus for Varying a Supply Voltage or Reference Voltage Using Independent Control of Diode Voltage in Asymmetrical Double-Gate Devices
App 20090303778 - Chuang; Ching-Te Kent ;   et al.
2009-12-10
Methods and Apparatus for Varying a Supply Voltage or Reference Voltage Using Independent Control of Diode Voltage in Asymmetrical Double-Gate Devices
App 20090302929 - Chuang; Ching-Te Kent ;   et al.
2009-12-10
Digital transmission circuit and method providing selectable power consumption via single-ended or differential operation
Grant 7,522,670 - Carballo , et al. April 21, 2
2009-04-21
Method of transparently reducing power consumption of a high-speed communication link
Grant 7,443,195 - Carballo , et al. October 28, 2
2008-10-28
Digital Transmission Circuit And Interface Providing Selectable Power Consumption Via Multiple Weighted Driver Slices
App 20080125063 - Carballo; Juan-Antonio ;   et al.
2008-05-29
Digital Transmission Circuit And Method Providing Selectable Power Consumption Via Multiple Weighted Driver Slices
App 20080125062 - Carballo; Juan-Antonio ;   et al.
2008-05-29
Digital transmission circuit and method providing selectable power consumption via multiple weighted drive slices
Grant 7,353,007 - Carballo , et al. April 1, 2
2008-04-01
Dual gate transistor keeper dynamic logic
Grant 7,336,105 - Chuang , et al. February 26, 2
2008-02-26
Independent gate control logic circuitry
Grant 7,265,589 - Chuang , et al. September 4, 2
2007-09-04
Control circuitry for power gating virtual power supply rails at differing voltage potentials
Grant 7,219,244 - Kuang , et al. May 15, 2
2007-05-15
Methods and apparatus for varying a supply voltage or reference voltage using independent control of diode voltage in asymmetrical double-gate devices
App 20070047364 - Chuang; Ching-Te Kent ;   et al.
2007-03-01
Control circuitry for power gating virtual power supply rails at differing voltage potentials
App 20070046323 - Kuang; Jente Benedict ;   et al.
2007-03-01
Dual gate dynamic logic
App 20060290383 - Chuang; Ching-Te ;   et al.
2006-12-28
Independent gate control logic circuitry
App 20060290384 - Chuang; Ching-Te ;   et al.
2006-12-28
Fast turn-off circuit for controlling leakage
Grant 7,142,015 - Kuang , et al. November 28, 2
2006-11-28
Multi-threshold complementary metal-oxide semiconductor (MTCMOS) bus circuit and method for reducing bus power consumption via pulsed standby switching
Grant 7,088,141 - Deogun , et al. August 8, 2
2006-08-08
Digital transmission circuit and method providing selectable power consumption via multiple weighted driver slices
App 20060172715 - Carballo; Juan-Antonio ;   et al.
2006-08-03
Digital transmission circuit and method providing selectable power consumption via single-ended or differential operation
App 20060171477 - Carballo; Juan-Antonio ;   et al.
2006-08-03
Multi-threshold complementary metal-oxide semiconductor (MTCMOS) bus circuit and method for reducing bus power consumption via pulsed standby switching
App 20060082384 - Deogun; Harmander Singh ;   et al.
2006-04-20
Fast turn-off circuit for controlling leakage
App 20060061388 - Kuang; Jente Benedict ;   et al.
2006-03-23
Method and system for interactive modeling of high-level network performance with low-level link design
App 20050240386 - Carballo, Juan-Antonio ;   et al.
2005-10-27
Method and apparatus for controlling power and performance in a multiprocessing system according to customer level operational requirements
Grant 6,836,849 - Brock , et al. December 28, 2
2004-12-28
Method of transparently reducing power consumption of a high-speed communication link
Grant 6,812,739 - Carballo , et al. November 2, 2
2004-11-02
Method and apparatus for control of voltage regulation
Grant 6,801,025 - Carballo , et al. October 5, 2
2004-10-05
Method of transparently reducing power consumption of a high-speed communication link
App 20040157569 - Carballo, Juan-Antonio ;   et al.
2004-08-12
Method and apparatus for control of voltage regulation
App 20040090216 - Carballo, Juan-Antonio ;   et al.
2004-05-13
Circuitry having exclusive-OR and latch function, and method therefor
Grant 6,724,221 - Carballo , et al. April 20, 2
2004-04-20
Level shifter
Grant 6,717,452 - Carpenter , et al. April 6, 2
2004-04-06
Method of transparently reducing power consumption of a high-speed communication link
App 20040061523 - Carballo, Juan-Antonio ;   et al.
2004-04-01
Level shifter
App 20030222700 - Carpenter, Gary Dale ;   et al.
2003-12-04
Level shifter
App 20030222699 - Carpenter, Gary Dale ;   et al.
2003-12-04
Clock generator for integrated circuit
Grant 6,650,163 - Burns , et al. November 18, 2
2003-11-18
Circuitry Having Exclusive-or And Latch Function, And Method Therefor
App 20030184340 - Carballo, Juan-Antonio ;   et al.
2003-10-02
Condition code register architecture for supporting multiple execution units
Grant 6,629,235 - Flachs , et al. September 30, 2
2003-09-30
Processor and method that accelerate evaluation of pairs of condition-setting and branch instructions
Grant 6,598,153 - Flachs , et al. July 22, 2
2003-07-22
Charge recovery for dynamic circuits
Grant 6,570,408 - Nowka May 27, 2
2003-05-27
Interleaved feedforward VCO and PLL
Grant 6,529,084 - Boerstler , et al. March 4, 2
2003-03-04
Low Leakage Sleep Mode For Dynamic Circuits
App 20030034830 - Nowka, Kevin John
2003-02-20
Charge recovery for dynamic circuits
App 20030034801 - Nowka, Kevin John
2003-02-20
Method and system for managing innovation by encouraging reusability and subsequent reuse of design components
App 20020198773 - Belluomini, Wendy Ann ;   et al.
2002-12-26
Controlling power and performance in a multiprocessing system
App 20020147932 - Brock, Bishop Chapman ;   et al.
2002-10-10
Multiphase Clock Generator
App 20020140486 - Boerstler, David William ;   et al.
2002-10-03
Edge-triggered Latch With Balanced Pass-transistor Logic Trigger
App 20020130693 - Kojima, Nobuo ;   et al.
2002-09-19
Multiphase clock generator
Grant 6,441,667 - Boerstler , et al. August 27, 2
2002-08-27
Method and apparatus for selectable wordline boosting in a memory device
Grant 6,335,900 - Kwon , et al. January 1, 2
2002-01-01
Processor and method for generating less than (LT), Greater than (GT), and equal to (EQ) condition code bits concurrent with a logical or complex operation
Grant 6,237,085 - Burns , et al. May 22, 2
2001-05-22
Method for integrated circuit power and electrical connections via through-wafer interconnects
Grant 6,221,769 - Dhong , et al. April 24, 2
2001-04-24
High-speed binary adder
Grant 6,175,852 - Dhong , et al. January 16, 2
2001-01-16
Method and apparatus for generating and logically combining less than (LT), greater than (GT), and equal to (EQ) condition code bits concurrently with the execution of an arithmetic or logical operation
Grant 6,035,390 - Burns , et al. March 7, 2
2000-03-07

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