loadpatents
name:-0.024355173110962
name:-0.054363012313843
name:-0.014012098312378
Nguyen; Thai M. Patent Filings

Nguyen; Thai M.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Nguyen; Thai M..The latest application filed is for "closed-loop adaptive voltage scaling for integrated circuits".

Company Profile
0.13.9
  • Nguyen; Thai M. - San Jose CA
  • Nguyen; Thai M. - Santa Clara CA US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Closed-loop Adaptive Voltage Scaling For Integrated Circuits
App 20150109052 - Gowda; Manjunatha ;   et al.
2015-04-23
Adhesion promoting temporary mask for coated surfaces
Grant 8,927,049 - Dave , et al. January 6, 2
2015-01-06
E beam sterilization of medical devices comprising bioactive coating
Grant 8,887,477 - Falotico , et al. November 18, 2
2014-11-18
E Beam Sterilization Of Medical Devices Comprising Bioactive Coating
App 20110113728 - Falotico; Robert ;   et al.
2011-05-19
Adhesion Promoting Primer For Coated Surfaces
App 20110029070 - Dave; Vipul ;   et al.
2011-02-03
Adhesion Promoting Temporary Mask For Coated Surfaces
App 20100304007 - Dave; Vipul ;   et al.
2010-12-02
Adhesion promoting primer for coated surfaces
Grant 7,819,914 - Dave , et al. October 26, 2
2010-10-26
Adhesion Promoting Temporary Mask For Coated Surfaces
App 20100161039 - Dave; Vipul ;   et al.
2010-06-24
Adhesion Promoting Primer For Coated Surfaces
App 20100152841 - Dave; Vipul ;   et al.
2010-06-17
Test clocking scheme
Grant 7,444,560 - Nguyen , et al. October 28, 2
2008-10-28
Method of generating an efficient stuck-at fault and transition delay fault truncated scan test pattern for an integrated circuit design
Grant 7,058,909 - Lu , et al. June 6, 2
2006-06-06
Test clocking scheme
App 20060095816 - Nguyen; Thai M. ;   et al.
2006-05-04
Method of generating an efficient stuck-at fault and transition delay fault truncated scan test pattern for an integrated circuit design
App 20050125755 - Lu, Cam L. ;   et al.
2005-06-09
Method and apparatus for testing integrated circuit core modules
Grant 6,888,367 - Nguyen , et al. May 3, 2
2005-05-03
Multi-phase mixer
Grant 6,801,585 - Nguyen , et al. October 5, 2
2004-10-05
Adaptive equalization and baseline wander correction circuit
Grant 6,385,238 - Nguyen May 7, 2
2002-05-07
Tightly controlled output level CMOS-PECL driver
App 20010009380 - Nguyen, Thai M.
2001-07-26
Current sourcing and sinking circuit for driving a VCO charge pump
Grant 5,357,216 - Nguyen October 18, 1
1994-10-18
Low noise logic amplifier with nondifferential to differential conversion
Grant 5,343,094 - Nguyen August 30, 1
1994-08-30
CMOS to ECL translator with incorporated latch
Grant 5,214,317 - Nguyen May 25, 1
1993-05-25

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