Newbury; Joseph S.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Newbury; Joseph S..The latest application filed is for "high-rate chemical vapor etch of silicon substrates".

Company Profile

0.9.9

Newbury; Joseph S. - Irvington NY
Newbury; Joseph S. - Tarrytown NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
High-rate chemical vapor etch of silicon substrates Grant 8,927,431 - Bedell , et al. January 6, 2	2015-01-06
High-Rate Chemical Vapor Etch of Silicon Substrates App 20140357082 - Bedell; Stephen W. ; et al.	2014-12-04
Using fast anneal to form uniform Ni(Pt)Si(Ge) contacts on SiGe layer Grant 8,865,556 - Newbury , et al. October 21, 2	2014-10-21
Using Fast Anneal to Form Uniform Ni(Pt)Si(Ge) Contacts on SiGe Layer App 20140054700 - Newbury; Joseph S. ; et al.	2014-02-27
Using Fast Anneal to Form Uniform Ni(Pt)Si(Ge) Contacts on SiGe Layer App 20140057399 - Newbury; Joseph S. ; et al.	2014-02-27
Monolayer dopant embedded stressor for advanced CMOS Grant 8,421,191 - Chan , et al. April 16, 2	2013-04-16
High performance CMOS circuits, and methods for fabricating same Grant 8,383,483 - Arnold , et al. February 26, 2	2013-02-26
Monolayer Dopant Embedded Stressor For Advanced Cmos App 20120261717 - Chan; Kevin K. ; et al.	2012-10-18
Monolayer dopant embedded stressor for advanced CMOS Grant 8,236,660 - Chan , et al. August 7, 2	2012-08-07
Monolayer Dopant Embedded Stressor For Advanced Cmos App 20110260213 - Chan; Kevin K. ; et al.	2011-10-27
High Performance Cmos Circuits, And Methods For Fabricating Same App 20100041221 - Arnold; John C. ; et al.	2010-02-18
High performance CMOS circuits, and methods for fabricating the same App 20070152276 - Arnold; John C. ; et al.	2007-07-05
Interfacial oxidation process for high-k gate dielectric process integration Grant 6,444,592 - Ballantine , et al. September 3, 2	2002-09-03

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