Nevill; Leland R.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Nevill; Leland R..The latest application filed is for "error detection/correction based memory management".

Company Profile

0.42.22

Nevill; Leland R. - Boise ID

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Error detection/correction based memory management Grant 9,483,370 - Reche , et al. November 1, 2	2016-11-01
Error Detection/correction Based Memory Management App 20140164824 - Reche; Cory J. ; et al.	2014-06-12
Error Detection/correction Based Memory Management App 20130073898 - Reche; Cory J. ; et al.	2013-03-21
SYSTEM FOR ISOLATING A SHORT-CIRCUITED INTEGRATED CIRCUIT (IC) FROM OTHER ICs ON A SEMICONDUCTOR WAFER App 20090273360 - Farnworth; Warren M. ; et al.	2009-11-05
Method for isolating a short-circuited integrated circuit (IC) from other ICs on a semiconductor wafer Grant 7,567,091 - Farnworth , et al. July 28, 2	2009-07-28
Method and apparatus for identifying integrated circuits Grant RE40,623 - Nevill January 20, 2	2009-01-20
Method for Isolating a Short-Circuited Integrated Circuit (IC) From Other ICs on a Semiconductor Wafer App 20080111574 - Farnworth; Warren M. ; et al.	2008-05-15
Device and method for isolating a short-circuited integrated circuit (IC) from other ICs on a semiconductor wafer Grant 7,323,896 - Farnworth , et al. January 29, 2	2008-01-29
System for isolating a short-circuited integrated circuit (IC) from other ICs on a semiconductor wafer Grant 7,315,179 - Farnworth , et al. January 1, 2	2008-01-01
Device and method for isolating a short-circuited integrated circuit (IC) from other ICs on a semiconductor wafer Grant 7,276,927 - Farnworth , et al. October 2, 2	2007-10-02
Method for isolating a short-circuited integrated circuit (IC) from other ICs on a semiconductor wafer Grant 7,276,926 - Farnworth , et al. October 2, 2	2007-10-02
Device and method for isolating a short-circuited integrated circuit (IC) from other ICs on a semiconductor wafer App 20070103167 - Farnworth; Warren M. ; et al.	2007-05-10
Device and method for isolating a short-circuited integrated circuit (IC) from other ICs on a semiconductor wafer Grant 7,212,020 - Farnworth , et al. May 1, 2	2007-05-01
Device and method for isolating a short-circuited integrated circuit (IC) from other ICs on a semiconductor wafer App 20070075725 - Farnworth; Warren M. ; et al.	2007-04-05
Device and method for isolating a short-circuited integrated circuit (IC) from other ICs on a semiconductor wafer App 20070075723 - Farnworth; Warren M. ; et al.	2007-04-05
Device and method for isolating a short-circuited integrated circuit (IC) from other ICs on a semiconductor wafer App 20070075722 - Farnworth; Warren M. ; et al.	2007-04-05
Device and method for isolating a short-circuited integrated circuit (IC) from other ICs on a semiconductor wafer App 20060192582 - Farnworth; Warren M. ; et al.	2006-08-31
Device and method for isolating a short-circuited integrated circuit (IC) from other ICs on a semiconductor wafer Grant 7,034,561 - Farnworth , et al. April 25, 2	2006-04-25
Data compression circuit and method for testing memory devices Grant RE38,956 - Beffa , et al. January 31, 2	2006-01-31
Device and method for isolating a short-circuited integrated circuit (IC) from other ICs on a semiconductor wafer App 20050093566 - Farnworth, Warren M. ; et al.	2005-05-05
Integrated circuit package alignment feature Grant 6,858,453 - Corisis , et al. February 22, 2	2005-02-22
Reduced terminal testing system Grant 6,852,999 - Farnworth , et al. February 8, 2	2005-02-08
Integrated circuit package alignment feature Grant 6,836,003 - Corisis , et al. December 28, 2	2004-12-28
Device and method for isolating a short-circuited integrated circuit (IC) from other ICs on a semiconductor wafer Grant 6,831,475 - Farnworth , et al. December 14, 2	2004-12-14
Reduced terminal testing system Grant 6,815,968 - Farnworth , et al. November 9, 2	2004-11-09
Device and method for isolating a short-circuited integrated circuit (IC) from other ICs on a semiconductor wafer App 20040130345 - Farnworth, Warren M. ; et al.	2004-07-08
Integrated circuit module having on-chip surge capacitors App 20040061198 - Protigal, Stanley N. ; et al.	2004-04-01
Method of using a semiconductor chip package Grant 6,682,946 - King , et al. January 27, 2	2004-01-27
Semiconductor chip package with alignment structure Grant 6,670,720 - King , et al. December 30, 2	2003-12-30
Semiconductor device system with impedance matching of control signals App 20030205779 - Protigal, Stanley N. ; et al.	2003-11-06
Device and method for isolating a short-circuited integrated circuit (IC) from other ICs on a semiconductor wafer Grant 6,636,068 - Farnworth , et al. October 21, 2	2003-10-21
Reduced terminal testing system App 20030178692 - Farnworth, Warren M. ; et al.	2003-09-25
Reduced terminal testing system App 20030003606 - Farnworth, Warren M. ; et al.	2003-01-02
Device and method for isolating a short-circuited integrated circuit (IC) from other ICs on a semiconductor wafer App 20020190707 - Farnworth, Warren M. ; et al.	2002-12-19
Device and method for isolating a short-circuited integrated circuit (IC) from other ICs on a semiconductor wafer Grant 6,452,415 - Farnworth , et al. September 17, 2	2002-09-17
Method of using a semiconductor chip package App 20020110957 - King, Jerrold L. ; et al.	2002-08-15
Method of aligning and testing a semiconductor chip package Grant 6,420,195 - King , et al. July 16, 2	2002-07-16
Reduced terminal testing system App 20020050836 - Farnworth, Warren M. ; et al.	2002-05-02
Device and method for isolating a short-circuited integrated circuit (IC) from other ICs on a semiconductor wafer App 20020030507 - Farnworth, Warren M. ; et al.	2002-03-14
Integrated circuit module having on-chip surge capacitors App 20010042899 - Protigal, Stanley N. ; et al.	2001-11-22
Reduced terminal testing system Grant 6,292,009 - Farnworth , et al. September 18, 2	2001-09-18
Integrated circuit package alignment feature App 20010011762 - Corisis, David J. ; et al.	2001-08-09
Semiconductor chip package App 20010008283 - King, Jerrold L. ; et al.	2001-07-19
Integrated circuit package including lead frame with electrically isolated alignment feature Grant 6,246,108 - Corisis , et al. June 12, 2	2001-06-12
Wafer level burn-in of memory integrated circuits Grant 6,233,185 - Beffa , et al. May 15, 2	2001-05-15
Semiconductor chip package Grant 6,198,172 - King , et al. March 6, 2	2001-03-06
Integrated circuit module having on-chip surge capacitors Grant 6,184,568 - Protigal , et al. February 6, 2	2001-02-06
Uniform temperature environmental testing apparatus for semiconductor devices Grant 6,154,042 - Nevill November 28, 2	2000-11-28
Uniform temperature environmental testing method for semiconductor devices Grant 6,114,868 - Nevill September 5, 2	2000-09-05
Data compression circuit and method for testing memory devices Grant 6,058,056 - Beffa , et al. May 2, 2	2000-05-02
Integrated circuit package alignment feature Grant 6,048,744 - Corisis , et al. April 11, 2	2000-04-11
Reduced terminal testing system Grant 5,994,915 - Farnworth , et al. November 30, 1	1999-11-30
Self-test circuit for memory integrated circuits Grant 5,982,682 - Nevill , et al. November 9, 1	1999-11-09
Method and apparatus for determining a set of tests for integrated circuit testing Grant 5,935,264 - Nevill , et al. August 10, 1	1999-08-10
Circuit and method for enabling a function in a multiple memory device module Grant 5,920,516 - Gilliam , et al. July 6, 1	1999-07-06
Reduced terminal testing system Grant 5,898,186 - Farnworth , et al. April 27, 1	1999-04-27
Method of stress testing memory integrated circuits Grant 5,852,581 - Beffa , et al. December 22, 1	1998-12-22
Circuit and method for enabling a function in a multiple memory device module Grant 5,825,697 - Gilliam , et al. October 20, 1	1998-10-20
Self-test circuit for memory integrated circuits Grant 5,754,486 - Nevill , et al. May 19, 1	1998-05-19
Method and apparatus for testing integrated circuits Grant 5,754,559 - Nevill May 19, 1	1998-05-19
Integrated circuit module having on-chip surge capacitors Grant 5,687,109 - Protigal , et al. November 11, 1	1997-11-11
Memory module having on-chip surge capacitors Grant 5,307,309 - Protigal , et al. April 26, 1	1994-04-26
Burn-in board having discrete test capability Grant 4,926,117 - Nevill May 15, 1	1990-05-15
Short-resistant decoupling capacitor system for semiconductor circuits Grant 4,879,631 - Johnson , et al. November 7, 1	1989-11-07

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