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Patent applications and USPTO patent grants for Natsume; Hidetaka.The latest application filed is for "semiconductor integrated circuit with thick gate oxide word line driving circuit".
Patent | Date |
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Semiconductor integrated circuit with thick gate oxide word line driving circuit Grant 9,099,197 - Takahashi , et al. August 4, 2 | 2015-08-04 |
Semiconductor Integrated Circuit With Thick Gate Oxide Word Line Driving Circuit App 20140321221 - TAKAHASHI; Hiroyuki ;   et al. | 2014-10-30 |
Semiconductor integrated circuit with thick gate oxide word line driving circuit Grant 8,797,810 - Takahashi , et al. August 5, 2 | 2014-08-05 |
Semiconductor Integrated Circuit With Thick Gate Oxide Word Line Driving Circuit App 20140169073 - TAKAHASHI; Hiroyuki ;   et al. | 2014-06-19 |
Semiconductor integrated circuit with thick gate oxide word line driving circuit Grant 8,699,284 - Takahashi , et al. April 15, 2 | 2014-04-15 |
Semiconductor Integrated Circuit App 20130141999 - TAKAHASHI; Hiroyuki ;   et al. | 2013-06-06 |
Semiconductor integrated circuit Grant 8,391,084 - Takahashi , et al. March 5, 2 | 2013-03-05 |
Method for manufacturing semiconductor device and semiconductor device Grant 8,357,612 - Hoshizaki , et al. January 22, 2 | 2013-01-22 |
Semiconductor Integrated Circuit App 20110298012 - TAKAHASHI; Hiroyuki ;   et al. | 2011-12-08 |
Semiconductor integrated circuit having DRAM word line drivers Grant 8,036,048 - Takahashi , et al. October 11, 2 | 2011-10-11 |
Semiconductor device Grant 7,660,085 - Furuta , et al. February 9, 2 | 2010-02-09 |
Method for manufacturing semiconductor device and semiconductor device App 20090273089 - Hoshizaki; Hiroyuki ;   et al. | 2009-11-05 |
Semiconductor Integrated Circuit App 20090122595 - TAKAHASHI; Hiroyuki ;   et al. | 2009-05-14 |
Semiconductor memory device with plural source/drain regions Grant 7,250,661 - Takahashi , et al. July 31, 2 | 2007-07-31 |
Semiconductor memory device and manufacturing method thereof Grant 7,214,572 - Natsume May 8, 2 | 2007-05-08 |
Semiconductor device App 20060187733 - Furuta; Hiroshi ;   et al. | 2006-08-24 |
Semiconductor memory device and manufacturing method thereof App 20050224895 - Natsume, Hidetaka | 2005-10-13 |
Semiconductor memory device App 20050116303 - Takahashi, Toshifumi ;   et al. | 2005-06-02 |
Semiconductor memory device and manufacturing method thereof Grant 6,900,513 - Natsume May 31, 2 | 2005-05-31 |
Semiconductor device Grant 6,765,272 - Natsume July 20, 2 | 2004-07-20 |
Semiconductor device App 20020158272 - Natsume, Hidetaka | 2002-10-31 |
Semiconductor memory device and manufacturing method thereof App 20020096734 - Natsume, Hidetaka | 2002-07-25 |
Semiconductor Device And Method Of Manufacturing The Same App 20010045557 - NATSUME, HIDETAKA | 2001-11-29 |
High-resistance Load Sram App 20010040260 - NATSUME, HIDETAKA | 2001-11-15 |
Semiconductor device capable of surely fixing voltage at well App 20010028091 - Natsume, Hidetaka | 2001-10-11 |
Common contact hole structure in semiconductor device Grant 6,031,291 - Sato , et al. February 29, 2 | 2000-02-29 |
SRAM cell having thin film transistors as loads Grant 5,686,736 - Natsume November 11, 1 | 1997-11-11 |
Method of checking alignment accuracy in photolithography Grant 5,672,520 - Natsume September 30, 1 | 1997-09-30 |
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