MURAMOTO; Hidetoshi
Patent Applications and Registrations
Patent applications and USPTO patent grants for MURAMOTO; Hidetoshi.The latest application filed is for "press working method".
- MURAMOTO; Hidetoshi - Kariya-city JP
- Muramoto; Hidetoshi - Okazaki JP
- Muramoto; Hidetoshi - Okazaki-city JP
- Muramoto; Hidetoshi - Nagoya JP
| Patent | Date |
|---|---|
| Press Working Method App 20160296990 - MURAMOTO; Hidetoshi | 2016-10-13 |
| Semiconductor device having first and second separation trenches Grant 7,462,913 - Muramoto , et al. December 9, 2 | 2008-12-09 |
| Semiconductor device having first and second separation trenches App 20070090458 - Muramoto; Hidetoshi ; et al. | 2007-04-26 |
| EEPROM and EEPROM manufacturing method Grant 6,914,288 - Itou , et al. July 5, 2 | 2005-07-05 |
| EEPROM and EEPROM manufacturing method App 20040070022 - Itou, Hiroyasu ; et al. | 2004-04-15 |
| Semiconductor device including several transistors and method of manufacturing the same Grant 6,198,140 - Muramoto , et al. March 6, 2 | 2001-03-06 |
| Method of fabricating a MIS transistor Grant 5,753,556 - Katada , et al. May 19, 1 | 1998-05-19 |
| Process for fabricating a complementary MIS transistor Grant 5,532,176 - Katada , et al. July 2, 1 | 1996-07-02 |
| Complementary MIS transistor and a fabrication process thereof Grant 5,334,870 - Katada , et al. August 2, 1 | 1994-08-02 |
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