| Patent | Date |
|---|
Engineering tensile strain buffer in art for high quality Ge channel
Grant 11,450,527 - Le , et al. September 20, 2 | 2022-09-20 |
Field effect transistors with wide bandgap materials
Grant 11,444,159 - Ma , et al. September 13, 2 | 2022-09-13 |
High-mobility semiconductor source/drain spacer
Grant 11,417,655 - Dewey , et al. August 16, 2 | 2022-08-16 |
Vertical thin-film transistors between metal layers
Grant 11,417,770 - Sharma , et al. August 16, 2 | 2022-08-16 |
Tunneling field effect transistors
Grant 11,404,562 - Huang , et al. August 2, 2 | 2022-08-02 |
Carbon Electrodes For Ferroelectric Capacitors
App 20220199758 - Sen Gupta; Arnab ; et al. | 2022-06-23 |
Metal Insulator Metal (mim) Capacitor Or Backend Transistor Having Epitaxial Oxide
App 20220199756 - TUNG; I-Cheng ; et al. | 2022-06-23 |
Compositional Engineering Of Schottky Diode
App 20220199839 - SEN GUPTA; Arnab ; et al. | 2022-06-23 |
Thin Film Transistors Having A Backside Channel Contact For High Density Memory
App 20220199628 - SATO; Noriyuki ; et al. | 2022-06-23 |
Metal Insulator Metal (mim) Capacitor With Perovskite Dielectric
App 20220199519 - LIN; Chia-Ching ; et al. | 2022-06-23 |
Source/drain recess etch stop layers and bottom wide-gap cap for III-V MOSFETs
Grant 11,367,789 - Huang , et al. June 21, 2 | 2022-06-21 |
Transistor Channel Materials
App 20220190121 - Sharma; Abhishek A. ; et al. | 2022-06-16 |
Field Effect Transistors With Gate Electrode Self-aligned To Semiconductor Fin
App 20220181442 - Ma; Sean T. ; et al. | 2022-06-09 |
Capacitors With Built-in Electric Fields
App 20220181433 - Chang; Sou-Chi ; et al. | 2022-06-09 |
Non-planar semiconductor device including a replacement channel structure
Grant 11,355,621 - Dewey , et al. June 7, 2 | 2022-06-07 |
Source to channel junction for III-V metal-oxide-semiconductor field effect transistors (MOSFETs)
Grant 11,335,796 - Huang , et al. May 17, 2 | 2022-05-17 |
Vertical thin film transistors having self-aligned contacts
Grant 11,296,229 - Sharma , et al. April 5, 2 | 2022-04-05 |
Low Resistance And Reduced Reactivity Approaches For Fabricating Contacts And The Resulting Structures
App 20220102522 - DEWEY; Gilbert ; et al. | 2022-03-31 |
Low Resistance Approaches For Fabricating Contacts And The Resulting Structures
App 20220102521 - DEWEY; Gilbert ; et al. | 2022-03-31 |
Metallization Stacks With Self-aligned Staggered Metal Lines
App 20220084942 - Karpov; Elijah V. ; et al. | 2022-03-17 |
Field effect transistors with gate electrode self-aligned to semiconductor fin
Grant 11,276,755 - Ma , et al. March 15, 2 | 2022-03-15 |
Integrated Circuit Structures Including A Metal Layer Formed Using A Beam Of Low Energy Atoms
App 20220042162 - KARPOV; Elijah V. ; et al. | 2022-02-10 |
Transistor With Isolation Below Source And Drain
App 20220028972 - RACHMADY; Willy ; et al. | 2022-01-27 |
Plasma Nitridation For Gate Oxide Scaling Of Ge And Sige Transistors
App 20210408239 - CHOUKSEY; Siddharth ; et al. | 2021-12-30 |
Ferroelectric Capacitors And Methods Of Fabrication
App 20210408018 - Haratipour; Nazila ; et al. | 2021-12-30 |
Halogen Treatment For Nmos Contact Resistance Improvement
App 20210407902 - CHOUKSEY; Siddharth ; et al. | 2021-12-30 |
Gate-all-around Integrated Circuit Structures Having Strained Dual Nanoribbon Channel Structures
App 20210407996 - AGRAWAL; Ashish ; et al. | 2021-12-30 |
Memory Cells With Ferroelectric Capacitors Separate From Transistor Gate Stacks
App 20210398993 - Haratipour; Nazila ; et al. | 2021-12-23 |
Optimizing gate profile for performance and gate fill
Grant 11,205,707 - Rahhal-Orabi , et al. December 21, 2 | 2021-12-21 |
Broken bandgap contact
Grant 11,195,924 - Chu-Kung , et al. December 7, 2 | 2021-12-07 |
Transistor structures having multiple threshold voltage channel materials
Grant 11,177,255 - Ma , et al. November 16, 2 | 2021-11-16 |
Transistor with isolation below source and drain
Grant 11,171,207 - Rachmady , et al. November 9, 2 | 2021-11-09 |
Group III-V semiconductor devices having asymmetric source and drain structures
Grant 11,164,747 - Ma , et al. November 2, 2 | 2021-11-02 |
Channel layer formed in an art trench
Grant 11,164,974 - Rachmady , et al. November 2, 2 | 2021-11-02 |
Wide bandgap group IV subfin to reduce leakage
Grant 11,152,290 - Chu-Kung , et al. October 19, 2 | 2021-10-19 |
Finfet Transistor Having A Doped Subfin Structure To Reduce Channel To Substrate Leakage
App 20210296180 - DEWEY; Gilbert ; et al. | 2021-09-23 |
FINFET transistor having a doped subfin structure to reduce channel to substrate leakage
Grant 11,107,890 - Dewey , et al. August 31, 2 | 2021-08-31 |
Gate Electrode Having A Capping Layer
App 20210265482 - DEWEY; Gilbert ; et al. | 2021-08-26 |
Gate Electrode Having A Capping Layer
App 20210242325 - DEWEY; Gilbert ; et al. | 2021-08-05 |
Art trench spacers to enable fin release for non-lattice matched channels
Grant 11,049,773 - Dewey , et al. June 29, 2 | 2021-06-29 |
Germanium transistor structure with underlap tip to reduce gate induced barrier lowering/short channel effect while minimizing impact on drive current
Grant 11,031,499 - Rachmady , et al. June 8, 2 | 2021-06-08 |
Gate electrode having a capping layer
Grant 11,031,482 - Dewey , et al. June 8, 2 | 2021-06-08 |
Multilayer High-k Gate Dielectric For A High Performance Logic Transistor
App 20210167182 - SUNG; Seung Hoon ; et al. | 2021-06-03 |
Method For Fabricating Transistor With Thinned Channel
App 20210135007 - Brask; Justin K. ; et al. | 2021-05-06 |
Self-aligned Gate Endcap (sage) Architectures Without Fin End Gap
App 20210091075 - LIAO; Szuya S. ; et al. | 2021-03-25 |
High-mobility field effect transistors with wide bandgap fin cladding
Grant 10,957,769 - Ma , et al. March 23, 2 | 2021-03-23 |
Method for fabricating transistor with thinned channel
Grant 10,937,907 - Brask , et al. March 2, 2 | 2021-03-02 |
Iii-v Source/drain In Top Nmos Transistors For Low Temperature Stacked Transistor Contacts
App 20210057413 - DEWEY; Gilbert ; et al. | 2021-02-25 |
Ge NANO wire transistor with GAAS as the sacrificial layer
Grant 10,930,766 - Rachmady , et al. February 23, 2 | 2021-02-23 |
Semiconductor device with released source and drain
Grant 10,903,364 - Rachmady , et al. January 26, 2 | 2021-01-26 |
Device isolation by fixed charge
Grant 10,892,335 - Ma , et al. January 12, 2 | 2021-01-12 |
Group III-V material transistors employing nitride-based dopant diffusion barrier layer
Grant 10,886,408 - Mohapatra , et al. January 5, 2 | 2021-01-05 |
Vertical Transistors For Ultra-dense Logic And Memory Applications
App 20200411686 - Haratipour; Nazila ; et al. | 2020-12-31 |
Transistors with non-vertical gates
Grant 10,879,365 - Huang , et al. December 29, 2 | 2020-12-29 |
Supperlatice channel included in a trench
Grant 10,847,619 - Huang , et al. November 24, 2 | 2020-11-24 |
Indium-rich NMOS transistor channels
Grant 10,818,793 - Mohapatra , et al. October 27, 2 | 2020-10-27 |
Aluminum Indium Phosphide Subfin Germanium Channel Transistors
App 20200328278 - Metz; Matthew V. ; et al. | 2020-10-15 |
Field Effect Transistors With Gate Electrode Self-aligned To Semiconductor Fin
App 20200321435 - Ma; Sean T. ; et al. | 2020-10-08 |
High-mobility Field Effect Transistors With Wide Bandgap Fin Cladding
App 20200321439 - Ma; Sean T. ; et al. | 2020-10-08 |
Differential work function between gate stack metals to reduce parasitic capacitance
Grant 10,797,150 - Ma , et al. October 6, 2 | 2020-10-06 |
Method to achieve a uniform Group IV material layer in an aspect ratio trapping trench
Grant 10,784,352 - Gardner , et al. Sept | 2020-09-22 |
Gate Electrode Having A Capping Layer
App 20200295153 - DEWEY; Gilbert ; et al. | 2020-09-17 |
Stacked Transistors Having Device Strata With Different Channel Widths
App 20200295003 - Dewey; Gilbert W. ; et al. | 2020-09-17 |
Source To Channel Junction For Iii-v Metal-oxide-semiconductor Field Effect Transistors (mosfets)
App 20200287036 - HUANG; Cheng-Ying ; et al. | 2020-09-10 |
Transistors With High Density Channel Semiconductor Over Dielectric Material
App 20200287024 - Dewey; Gilbert ; et al. | 2020-09-10 |
Beaded fin transistor
Grant 10,770,593 - Dewey , et al. Sep | 2020-09-08 |
Transistor Structures Having Multiple Threshold Voltage Channel Materials
App 20200279845 - Ma; Sean T. ; et al. | 2020-09-03 |
Transistor With Isolation Below Source And Drain
App 20200279916 - Rachmady; Willy ; et al. | 2020-09-03 |
Fin-based III-V/SI or GE CMOS SAGE integration
Grant 10,748,900 - Rachmady , et al. A | 2020-08-18 |
High mobility asymmetric field effect transistors with a band-offset semiconductor drain spacer
Grant 10,734,511 - Huang , et al. | 2020-08-04 |
Aluminum indium phosphide subfin germanium channel transistors
Grant 10,734,488 - Metz , et al. | 2020-08-04 |
Non-planar Semiconductor Device Including A Replacement Channel Structure
App 20200227539 - Dewey; Gilbert ; et al. | 2020-07-16 |
Improved Channel Layer Formed In An Art Trench
App 20200220017 - Rachmady; Willy ; et al. | 2020-07-09 |
Gate electrode having a capping layer
Grant 10,707,319 - Dewey , et al. | 2020-07-07 |
Aluminum Indium Phosphide Subfin Germanium Channel Transistors
App 20200212186 - Metz; Matthew V. ; et al. | 2020-07-02 |
Group Iii-v Semiconductor Devices Having Asymmetric Source And Drain Structures
App 20200203169 - MA; Sean T. ; et al. | 2020-06-25 |
Device Isolation By Fixed Charge
App 20200185501 - Ma; Sean T. ; et al. | 2020-06-11 |
Tunneling Field Effect Transistors
App 20200168724 - Huang; Cheng-Ying ; et al. | 2020-05-28 |
Low Schottky barrier contact structure for Ge NMOS
Grant 10,665,688 - Rachmady , et al. | 2020-05-26 |
Reduced transistor resistance using doped layer
Grant 10,651,313 - Huang , et al. | 2020-05-12 |
Pseudomorphic InGaAs on GaAs for gate-all-around transistors
Grant 10,651,288 - Mohapatra , et al. | 2020-05-12 |
Transistor With Wide Bandgap Channel And Narrow Bandgap Source/drain
App 20200144374 - MA; Sean T. ; et al. | 2020-05-07 |
III-V finfet transistor with V-groove S/D profile for improved access resistance
Grant 10,644,137 - Rachmady , et al. | 2020-05-05 |
Strained silicon layer with relaxed underlayer
Grant 10,644,111 - Chu-Kung , et al. | 2020-05-05 |
FINFET transistor having a tapered subfin structure
Grant 10,636,912 - Dewey , et al. | 2020-04-28 |
High Performance Semiconductor Oxide Material Channel Regions For Nmos
App 20200098753 - Dewey; Gilbert ; et al. | 2020-03-26 |
Ferroelectric Gate Stack For Band-to-band Tunneling Reduction
App 20200098925 - Dewey; Gilbert ; et al. | 2020-03-26 |
Vertical Thin-film Transistors Between Metal Layers
App 20200098931 - SHARMA; Abhishek ; et al. | 2020-03-26 |
Contact Stacks To Reduce Hydrogen In Semiconductor Devices
App 20200098874 - WEBER; Justin ; et al. | 2020-03-26 |
Transistors having ultra thin fin profiles and their methods of fabrication
Grant 10,593,785 - Gardner , et al. | 2020-03-17 |
Apparatus and methods to create an active channel having indium rich side and bottom surfaces
Grant 10,586,848 - Mohapatra , et al. | 2020-03-10 |
Transistor with a sub-fin dielectric region under a gate
Grant 10,580,865 - Rachmady , et al. | 2020-03-03 |
Low band gap semiconductor devices having reduced gate induced drain leakage (GIDL)
Grant 10,580,882 - Dewey , et al. | 2020-03-03 |
Field Effect Transistors With Wide Bandgap Materials
App 20200066843 - MA; Sean T. ; et al. | 2020-02-27 |
An Indium-containing Fin Of A Transistor Device With An Indium-rich Core
App 20200066855 - MOHAPATRA; Chandra S. ; et al. | 2020-02-27 |
Engineering Tensile Strain Buffer In Art For High Quality Ge Channel
App 20200066515 - LE; Van H. ; et al. | 2020-02-27 |
Selective epitaxially grown III-V materials based devices
Grant 10,573,717 - Goel , et al. Feb | 2020-02-25 |
Apparatus and methods to create a buffer to reduce leakage in microelectronic transistors
Grant 10,559,683 - Mohapatra , et al. Feb | 2020-02-11 |
Subfin Leakage Suppression Using Fixed Charge
App 20200044059 - Ma; Sean T. ; et al. | 2020-02-06 |
Low damage self-aligned amphoteric FINFET tip doping
Grant 10,546,858 - Kavalieros , et al. Ja | 2020-01-28 |
Dopant diffusion barrier for source/drain to curb dopant atom diffusion
Grant 10,529,808 - Mohapatra , et al. J | 2020-01-07 |
Vertical Thin Film Transistors Having Self-aligned Contacts
App 20200006572 - SHARMA; Abhishek A. ; et al. | 2020-01-02 |
Transistors With Non-vertical Gates
App 20200006510 - Huang; Cheng-Ying ; et al. | 2020-01-02 |
Dielectric Lining Layers For Semiconductor Devices
App 20200006501 - Rachmady; Willy ; et al. | 2020-01-02 |
Multi-dielectric Gate Stack For Crystalline Thin Film Transistors
App 20190378932 - LE; Van H. ; et al. | 2019-12-12 |
Method For Fabricating Transistor With Thinned Channel
App 20190371940 - Brask; Justin K. ; et al. | 2019-12-05 |
III-V semiconductor alloys for use in the subfin of non-planar semiconductor devices and methods of forming the same
Grant 10,497,814 - Kennel , et al. De | 2019-12-03 |
Making a defect free fin based device in lateral epitaxy overgrowth region
Grant 10,475,706 - Goel , et al. Nov | 2019-11-12 |
A Finfet Transistor Having A Tapered Subfin Structure
App 20190341481 - DEWEY; Gilbert ; et al. | 2019-11-07 |
Apparatus and methods to create a buffer which extends into a gated region of a transistor
Grant 10,461,193 - Mohapatra , et al. Oc | 2019-10-29 |
Well-based integration of heteroepitaxial N-type transistors with P-type transistors
Grant 10,461,082 - Rachmady , et al. Oc | 2019-10-29 |
High-electron-mobility transistors with heterojunction dopant diffusion barrier
Grant 10,446,685 - Mohapatra , et al. Oc | 2019-10-15 |
High electron mobility transistors with localized sub-fin isolation
Grant 10,431,690 - Rachmady , et al. O | 2019-10-01 |
Source/drain Recess Etch Stop Layers And Bottom Wide-gap Cap For Iii-v Mosfets
App 20190296145 - HUANG; Cheng-Ying ; et al. | 2019-09-26 |
High mobility field effect transistors with a band-offset semiconductor source/drain spacer
Grant 10,411,007 - Dewey , et al. Sept | 2019-09-10 |
Semiconductor device having group III-V material active region and graded gate dielectric
Grant 10,411,122 - Dewey , et al. Sept | 2019-09-10 |
Transistor Source/drain Amorphous Interlayer Arrangements
App 20190273133 - Agrawal; Ashish ; et al. | 2019-09-05 |
Dielectric metal oxide cap for channel containing germanium
Grant 10,403,733 - Dewey , et al. Sep | 2019-09-03 |
Art Trench Spacers To Enable Fin Release For Non-lattice Matched Channels
App 20190267289 - DEWEY; Gilbert ; et al. | 2019-08-29 |
High-electron-mobility transistors with counter-doped dopant diffusion barrier
Grant 10,388,764 - Mohapatra , et al. A | 2019-08-20 |
Method for fabricating transistor with thinned channel
Grant 10,367,093 - Brask , et al. July 30, 2 | 2019-07-30 |
Reduced Transistor Resistance Using Doped Layer
App 20190214500 - Huang; Cheng-Ying ; et al. | 2019-07-11 |
Strained Silicon Layer With Relaxed Underlayer
App 20190214466 - Chu-Kung; Benjamin ; et al. | 2019-07-11 |
Transistor with a subfin layer
Grant 10,347,767 - Rachmady , et al. July 9, 2 | 2019-07-09 |
High mobility field effect transistors with a retrograded semiconductor source/drain
Grant 10,340,374 - Dewey , et al. | 2019-07-02 |
Group Iii-v Material Transistors Employing Nitride-based Dopant Diffusion Barrier Layer
App 20190198658 - Mohapatra; Chandra S. ; et al. | 2019-06-27 |
Indium-rich Nmos Transistor Channels
App 20190189794 - MOHAPATRA; CHANDRA S. ; et al. | 2019-06-20 |
Ge Nano Wire Transistor With Gaas As The Sacrificial Layer
App 20190189770 - RACHMADY; Willy ; et al. | 2019-06-20 |
Supperlatice Channel Included In A Trench
App 20190172911 - Huang; Cheng-Ying ; et al. | 2019-06-06 |
Semiconductor Device With Released Source And Drain
App 20190172941 - RACHMADY; Willy ; et al. | 2019-06-06 |
High-mobility Semiconductor Source/drain Spacer
App 20190148378 - DEWEY; Gilbert ; et al. | 2019-05-16 |
Iii-v Finfet Transistor With V-groove S/d Profile For Improved Access Resistance
App 20190148512 - RACHMADY; Willy ; et al. | 2019-05-16 |
Apparatus and methods to create an indium gallium arsenide active channel having indium rich surfaces
Grant 10,290,709 - Glass , et al. | 2019-05-14 |
A Finfet Transistor Having A Doped Subfin Structure To Reduce Channel To Substrate Leakage
App 20190140054 - DEWEY; Gilbert ; et al. | 2019-05-09 |
Broken Bandgap Contact
App 20190140061 - CHU-KUNG; Benjamin ; et al. | 2019-05-09 |
Wide Bandgap Group Iv Subfin To Reduce Leakage
App 20190122972 - CHU-KUNG; Benjamin ; et al. | 2019-04-25 |
Germanium Transistor Structure With Underlap Tip To Reduce Gate Induced Barrier Lowering/short Channel Effect While Minimizing Impact On Drive Current
App 20190103486 - RACHMADY; Willy ; et al. | 2019-04-04 |
Non-silicon device heterolayers on patterned silicon substrate for CMOS by combination of selective and conformal epitaxy
Grant 10,249,490 - Goel , et al. | 2019-04-02 |
Offstate parasitic leakage reduction for tunneling field effect transistors
Grant 10,249,742 - Le , et al. | 2019-04-02 |
Ge nano wire transistor with GaAs as the sacrificial layer
Grant 10,249,740 - Rachmady , et al. | 2019-04-02 |
Beaded Fin Transistor
App 20190097055 - DEWEY; GILBERT ; et al. | 2019-03-28 |
Carrier confinement for high mobility channel devices
Grant 10,243,078 - Dewey , et al. | 2019-03-26 |
Selective Epitaxially Grown Iii-v Materials Based Devices
App 20190088747 - GOEL; Niti ; et al. | 2019-03-21 |
Indium-rich NMOS transistor channels
Grant 10,229,997 - Mohapatra , et al. | 2019-03-12 |
Low Band Gap Semiconductor Devices Having Reduced Gate Induced Drain Leakage (gidl) And Their Methods Of Fabrication
App 20190058053 - DEWEY; Gilbert ; et al. | 2019-02-21 |
High-mobility semiconductor source/drain spacer
Grant 10,211,208 - Dewey , et al. Feb | 2019-02-19 |
Method of fabricating semiconductor structures on dissimilar substrates
Grant 10,204,989 - Chu-Kung , et al. Feb | 2019-02-12 |
Apparatus And Methods To Create An Active Channel Having Indium Rich Side And Bottom Surfaces
App 20190035889 - Mohapatra; Chandra S. ; et al. | 2019-01-31 |
High Mobility Asymmetric Field Effect Transistors With A Band-offset Semiconductor Drain Spacer
App 20190035921 - Huang; Cheng-Ying ; et al. | 2019-01-31 |
Dopant Diffusion Barrier For Source/drain To Curb Dopant Atom Diffusion
App 20190035897 - MOHAPATRA; Chandra S. ; et al. | 2019-01-31 |
Selective epitaxially grown III-V materials based devices
Grant 10,181,518 - Goel , et al. Ja | 2019-01-15 |
Dielectric Metal Oxide Cap For Channel Containing Germanium
App 20180374928 - DEWEY; GILBERT ; et al. | 2018-12-27 |
Semiconductor Device Having Group Iii-v Material Active Region And Graded Gate Dielectric
App 20180374940 - DEWEY; Gilbert ; et al. | 2018-12-27 |
High Mobility Field Effect Transistors With A Band-offset Semiconductor Source/drain Spacer
App 20180350798 - Dewey; Gilbert ; et al. | 2018-12-06 |
Extreme high mobility CMOS logic
Grant 10,141,437 - Datta , et al. Nov | 2018-11-27 |
Transistor With A Sub-fin Dielectric Region Under A Gate
App 20180337235 - RACHMADY; WILLY ; et al. | 2018-11-22 |
Low Schottky Barrier Contact Structure For Ge Nmos
App 20180331195 - RACHMADY; Willy ; et al. | 2018-11-15 |
Iii-v Semiconductor Alloys For Use In The Subfin Of Non-planar Semiconductor Devices And Methods Of Forming The Same
App 20180323310 - KENNEL; HAROLD W. ; et al. | 2018-11-08 |
Fin-based Iii-v/si Or Ge Cmos Sage Integration
App 20180315757 - RACHMADY; Willy ; et al. | 2018-11-01 |
Differential Work Function Between Gate Stack Metals To Reduce Parasitic Capacitance
App 20180315827 - MA; Sean T. ; et al. | 2018-11-01 |
Methods and structures to prevent sidewall defects during selective epitaxy
Grant 10,096,474 - Mukherjee , et al. October 9, 2 | 2018-10-09 |
Aspect ratio trapping (ART) for fabricating vertical semiconductor devices
Grant 10,096,709 - Le , et al. October 9, 2 | 2018-10-09 |
Semiconductor device having group III-V material active region and graded gate dielectric
Grant 10,090,405 - Dewey , et al. October 2, 2 | 2018-10-02 |
High mobility nanowire fin channel on silicon substrate formed using sacrificial sub-fin
Grant 10,084,043 - Dewey , et al. September 25, 2 | 2018-09-25 |
A Method To Achieve A Uniform Group Iv Material Layer In An Aspect Ratio Trapping Trench
App 20180261498 - GARDNER; Sanaz K. ; et al. | 2018-09-13 |
High Mobility Field Effect Transistors With A Retrograded Semiconductor Source/drain
App 20180261694 - Dewey; Gilbert ; et al. | 2018-09-13 |
High-electron-mobility Transistors With Counter-doped Dopant Diffusion Barrier
App 20180254332 - Mohapatra; Chandra S. ; et al. | 2018-09-06 |
High-electron-mobility Transistors With Heterojunction Dopant Diffusion Barrier
App 20180248028 - Mohapatra; Chandra S. ; et al. | 2018-08-30 |
Low Damage Self-aligned Amphoteric Finfet Tip Doping
App 20180226405 - Kavalieros; Jack T. ; et al. | 2018-08-09 |
Transistors Having Ultra Thin Fin Profiles And Their Methods Of Fabrication
App 20180226496 - GARDNER; Sanaz K. ; et al. | 2018-08-09 |
A Transistor With A Subfin Layer
App 20180204947 - RACHMADY; Willy ; et al. | 2018-07-19 |
Contact techniques and configurations for reducing parasitic resistance in nanowire transistors
Grant 10,020,371 - Pillarisetty , et al. July 10, 2 | 2018-07-10 |
High Electron Mobility Transistors With Localized Sub-fin Isolation
App 20180158957 - RACHMADY; Willy ; et al. | 2018-06-07 |
Apparatus And Methods To Create A Buffer Which Extends Into A Gated Region Of A Transistor
App 20180158958 - Mohapatra; Chandra S. ; et al. | 2018-06-07 |
Offstate Parasitic Leakage Reduction For Tunneling Field Effect Transistors
App 20180158933 - LE; Van H. ; et al. | 2018-06-07 |
Indium-rich Nmos Transistor Channels
App 20180158944 - MOHAPATRA; CHANDRA S. ; et al. | 2018-06-07 |
Pseudomorphic Ingaas On Gaas For Gate-all-around Transistors
App 20180158927 - MOHAPATRA; Chandra S. ; et al. | 2018-06-07 |
High-mobility Semiconductor Source/drain Spacer
App 20180145077 - DEWEY; Gilbert ; et al. | 2018-05-24 |
Ge Nano Wire Transistor With Gaas As The Sacrificial Layer
App 20180138289 - RACHMADY; Willy ; et al. | 2018-05-17 |
Well-based Integration Of Heteroepitaxial N-type Transistors With P-type Transistors
App 20180130801 - Rachmady; Willy ; et al. | 2018-05-10 |
Apparatus and methods of forming fin structures with asymmetric profile
Grant 9,929,273 - Rachmady , et al. March 27, 2 | 2018-03-27 |
GE and III-V channel semiconductor devices having maximized compliance and free surface relaxation
Grant 9,905,651 - Pillarisetty , et al. February 27, 2 | 2018-02-27 |
Method For Fabricating Transistor With Thinned Channel
App 20180047846 - Brask; Justin K. ; et al. | 2018-02-15 |
Germanium-based quantum well devices
Grant 9,876,014 - Pillarisetty , et al. January 23, 2 | 2018-01-23 |
Apparatus And Methods Of Forming Fin Structures With Asymmetric Profile
App 20180013000 - Rachmady; Willy ; et al. | 2018-01-11 |
Selective epitaxially grown III-V materials based devices
Grant 9,853,107 - Metz , et al. December 26, 2 | 2017-12-26 |
High Mobility Nanowire Fin Channel On Silicon Substrate Formed Using Sacrificial Sub-fin
App 20170358645 - DEWEY; GILBERT ; et al. | 2017-12-14 |
Diffusion Tolerant Iii-v Semiconductor Heterostructures And Devices Including The Same
App 20170345900 - KENNEL; HAROLD W. ; et al. | 2017-11-30 |
Optimizing Gate Profile For Performance And Gate Fill
App 20170330955 - RAHHAL-ORABI; NADIA M. ; et al. | 2017-11-16 |
Thin Channel Region On Wide Subfin
App 20170323963 - GARDNER; Sanaz K. ; et al. | 2017-11-09 |
Apparatus And Methods Of Forming Fin Structures With Sidewall Liner
App 20170323955 - Rachmady; Willy ; et al. | 2017-11-09 |
Carrier Confinement For High Mobility Channel Devices
App 20170323962 - DEWEY; GILBERT ; et al. | 2017-11-09 |
Uniform Layers Formed with Aspect Ratio Trench Based Processes
App 20170317187 - GARDNER; Sanaz K. ; et al. | 2017-11-02 |
Method for fabricating transistor with thinned channel
Grant 9,806,195 - Brask , et al. October 31, 2 | 2017-10-31 |
Extreme High Mobility Cmos Logic
App 20170309734 - DATTA; Suman ; et al. | 2017-10-26 |
Apparatus And Methods To Create A Buffer To Reduce Leakage In Microelectronic Transistors
App 20170278964 - Mohapatra; Chandra S. ; et al. | 2017-09-28 |
Apparatus And Methods To Create A Doped Sub-structure To Reduce Leakage In Microelectronic Transistors
App 20170278944 - Mohapatra; Chandra S. ; et al. | 2017-09-28 |
Method Of Fabricating Semiconductor Structures On Dissimilar Substrates
App 20170271448 - CHU-KUNG; Benjamin ; et al. | 2017-09-21 |
Ingaas Epi Structure And Wet Etch Process For Enabling Iii-v Gaa In Art Trench
App 20170263706 - GARDNER; Sanaz K. ; et al. | 2017-09-14 |
Methods And Structures To Prevent Sidewall Defects During Selective Epitaxy
App 20170256408 - MUKHERJEE; Niloy ; et al. | 2017-09-07 |
Integrating Vlsi-compatible Fin Structures With Selective Epitaxial Growth And Fabricating Devices Thereon
App 20170250182 - Goel; Niti ; et al. | 2017-08-31 |
Apparatus And Methods To Create An Indium Gallium Arsenide Active Channel Having Indium Rich Surfaces
App 20170229543 - Glass; Glenn A. ; et al. | 2017-08-10 |
Methods of forming hetero-layers with reduced surface roughness and bulk defect density of non-native surfaces and the structures formed thereby
Grant 9,711,591 - Mukherjee , et al. July 18, 2 | 2017-07-18 |
Semiconductor Device Having Group Iii-v Material Active Region And Graded Gate Dielectric
App 20170194469 - DEWEY; GILBERT ; et al. | 2017-07-06 |
Selective Epitaxially Grown Iii-v Materials Based Devices
App 20170194142 - Goel; Niti ; et al. | 2017-07-06 |
Methods and structures to prevent sidewall defects during selective epitaxy
Grant 9,698,013 - Mukherjee , et al. July 4, 2 | 2017-07-04 |
Method of fabricating semiconductor structures on dissimilar substrates
Grant 9,698,222 - Chu-Kung , et al. July 4, 2 | 2017-07-04 |
Non-silicon Device Heterolayers On Patterned Silicon Substrate For Cmos By Combination Of Selective And Conformal Epitaxy
App 20170186598 - Goel; Niti ; et al. | 2017-06-29 |
Extreme high mobility CMOS logic
Grant 9,691,856 - Datta , et al. June 27, 2 | 2017-06-27 |
Integrating VLSI-compatible fin structures with selective epitaxial growth and fabricating devices thereon
Grant 9,685,381 - Goel , et al. June 20, 2 | 2017-06-20 |
Trench Confined Epitaxially Grown Device Layer(s)
App 20170162453 - Pillarisetty; Ravi ; et al. | 2017-06-08 |
Making A Defect Free Fin Based Device In Lateral Epitaxy Overgrowth Region
App 20170154981 - Goel; Niti ; et al. | 2017-06-01 |
Methods of containing defects for non-silicon device engineering
Grant 9,666,583 - Goel , et al. May 30, 2 | 2017-05-30 |
Methods to enhance doping concentration in near-surface layers of semiconductors and methods of making same
Grant 9,653,559 - Mukherjee , et al. May 16, 2 | 2017-05-16 |
Ge And Iii-v Channel Semiconductor Devices Having Maximized Compliance And Free Surface Relaxation
App 20170125524 - PILLARISETTY; RAVI ; et al. | 2017-05-04 |
Semiconductor device having group III-V material active region and graded gate dielectric
Grant 9,640,646 - Dewey , et al. May 2, 2 | 2017-05-02 |
Trench confined epitaxially grown device layer(s)
Grant 9,634,007 - Pillarisetty , et al. April 25, 2 | 2017-04-25 |
Making a defect free fin based device in lateral epitaxy overgrowth region
Grant 9,583,396 - Goel , et al. February 28, 2 | 2017-02-28 |
Ge and III-V channel semiconductor devices having maximized compliance and free surface relaxation
Grant 9,570,614 - Pillarisetty , et al. February 14, 2 | 2017-02-14 |
Extreme high mobility CMOS logic
Grant 9,548,363 - Datta , et al. January 17, 2 | 2017-01-17 |
Aspect Ratio Trapping (art) For Fabricating Vertical Semiconductor Devices
App 20170012125 - LE; Van H. ; et al. | 2017-01-12 |
Germanium-based Quantum Well Devices
App 20170012116 - Pillarisetty; Ravi ; et al. | 2017-01-12 |
Contact Techniques And Configurations For Reducing Parasitic Resistance In Nanowire Transistors
App 20160372560 - Pillarisetty; Ravi ; et al. | 2016-12-22 |
Selective Epitaxially Grown Iii-v Materials Based Devices
App 20160365416 - METZ; MATTHEW V. ; et al. | 2016-12-15 |
Germanium-based quantum well devices
Grant 9,478,635 - Pillarisetty , et al. October 25, 2 | 2016-10-25 |
Contact techniques and configurations for reducing parasitic resistance in nanowire transistors
Grant 9,461,141 - Pillarisetty , et al. October 4, 2 | 2016-10-04 |
Method Of Fabricating Semiconductor Structures On Dissimilar Substrates
App 20160276438 - CHU-KUNG; Benjamin ; et al. | 2016-09-22 |
Method of fabricating metal-insulator-semiconductor tunneling contacts using conformal deposition and thermal growth processes
Grant 9,437,706 - Mukherjee , et al. September 6, 2 | 2016-09-06 |
Non-silicon Device Heterolayers On Patterned Silicon Substrate For Cmos By Combination Of Selective And Conformal Epitaxy
App 20160211263 - GOEL; Niti ; et al. | 2016-07-21 |
Selective Epitaxially Grown Iii-v Materials Based Devices
App 20160204208 - GOEL; Niti ; et al. | 2016-07-14 |
Making A Defect Free Fin Based Device In Lateral Epitaxy Overgrowth Region
App 20160204036 - Goel; Niti ; et al. | 2016-07-14 |
Ge and III-V Channel Semiconductor Devices having Maximized Compliance and Free Surface Relaxation
App 20160204246 - PILLARISETTY; RAVI ; et al. | 2016-07-14 |
Integrating Vlsi-compatible Fin Structures With Selective Epitaxial Growth And Fabricating Devices Thereon
App 20160204037 - Goel; Niti ; et al. | 2016-07-14 |
Lattice mismatched hetero-epitaxial film
Grant 9,391,181 - Chu-Kung , et al. July 12, 2 | 2016-07-12 |
Gate Electrode Having A Capping Layer
App 20160197159 - Dewey; Gilbert ; et al. | 2016-07-07 |
Method For Fabricating Transistor With Thinned Channel
App 20160197185 - Brask; Justin K. ; et al. | 2016-07-07 |
Semiconductor Device having Group III-V Material Active Region and Graded Gate Dielectric
App 20160197173 - DEWEY; GILBERT ; et al. | 2016-07-07 |
Non-Planar Semiconductor Devices having Multi-Layered Compliant Substrates
App 20160190319 - KAVALIEROS; JACK T. ; et al. | 2016-06-30 |
Methods And Structures To Prevent Sidewall Defects During Selective Epitaxy
App 20160181099 - MUKHERJEE; Niloy ; et al. | 2016-06-23 |
Methods To Achieve High Mobility In Cladded Iii-v Channel Materials
App 20160172477 - DEWEY; Gilbert ; et al. | 2016-06-16 |
Method for fabricating transistor with thinned channel
Grant 9,337,307 - Brask , et al. May 10, 2 | 2016-05-10 |
Extreme High Mobility Cmos Logic
App 20160111423 - Datta; Suman ; et al. | 2016-04-21 |
Gate electrode having a capping layer
Grant 9,287,380 - Dewey , et al. March 15, 2 | 2016-03-15 |
Germanium-based Quantum Well Devices
App 20160064520 - Pillarisetty; Ravi ; et al. | 2016-03-03 |
Contact Techniques And Configurations For Reducing Parasitic Resistance In Nanowire Transistors
App 20160035860 - Pillarisetty; Ravi ; et al. | 2016-02-04 |
Germanium-based quantum well devices
Grant 9,219,135 - Pillarisetty , et al. December 22, 2 | 2015-12-22 |
Methods Of Containing Defects For Non-silicon Device Engineering
App 20150270265 - Goel; Niti ; et al. | 2015-09-24 |
Contact techniques and configurations for reducing parasitic resistance in nanowire transistors
Grant 9,123,790 - Pillarisetty , et al. September 1, 2 | 2015-09-01 |
Methods of containing defects for non-silicon device engineering
Grant 9,112,028 - Goel , et al. August 18, 2 | 2015-08-18 |
Method Of Fabricating Metal-insulator-semiconductor Tunneling Contacts Using Conformal Deposition And Thermal Growth Processes
App 20150076571 - MUKHERJEE; NILOY ; et al. | 2015-03-19 |
Method of fabricating metal-insulator-semiconductor tunneling contacts using conformal deposition and thermal growth processes
Grant 8,952,541 - Mukherjee , et al. February 10, 2 | 2015-02-10 |
Trench Confined Epitaxially Grown Device Layer(s)
App 20140291726 - Pillarisetty; Ravi ; et al. | 2014-10-02 |
Extreme High Mobility Cmos Logic
App 20140291615 - Datta; Suman ; et al. | 2014-10-02 |
Methods Of Containing Defects For Non-silicon Device Engineering
App 20140231871 - Goel; Niti ; et al. | 2014-08-21 |
Gate electrode having a capping layer
Grant 8,803,255 - Dewey , et al. August 12, 2 | 2014-08-12 |
Extreme high mobility CMOS logic
Grant 8,802,517 - Datta , et al. August 12, 2 | 2014-08-12 |
Contact Techniques And Configurations For Reducing Parasitic Resistance In Nanowire Transistors
App 20140209865 - Pillarisetty; Ravi ; et al. | 2014-07-31 |
Methods Of Forming Hetero-layers With Reduced Surface Roughness And Bulk Defect Density On Non-native Surfaces And The Structures Formed Thereby
App 20140203326 - Mukherjee; Niloy ; et al. | 2014-07-24 |
Epitaxial film growth on patterned substrate
Grant 8,785,907 - Goel , et al. July 22, 2 | 2014-07-22 |
Trench confined epitaxially grown device layer(s)
Grant 8,765,563 - Pillarisetty , et al. July 1, 2 | 2014-07-01 |
Quantum-well-based semiconductor devices
Grant 8,748,269 - Dewey , et al. June 10, 2 | 2014-06-10 |
Methods of containing defects for non-silicon device engineering
Grant 8,716,751 - Goel , et al. May 6, 2 | 2014-05-06 |
Gate Electrode Having A Capping Layer
App 20140103458 - Dewey; Gilbert ; et al. | 2014-04-17 |
Methods Of Containing Defects For Non-silicon Device Engineering
App 20140091361 - Goel; Niti ; et al. | 2014-04-03 |
Trench Confined Epitaxially Grown Device Layer(s)
App 20140091360 - PILLARISETTY; Ravi ; et al. | 2014-04-03 |
Germanium-based Quantum Well Devices
App 20140061589 - Pillarisetty; Ravi ; et al. | 2014-03-06 |
Quantum-well-based Semiconductor Devices
App 20130337623 - Dewey; Gilbert ; et al. | 2013-12-19 |
Extreme High Mobility Cmos Logic
App 20130328015 - Datta; Suman ; et al. | 2013-12-12 |
Methods To Enhance Doping Concentration In Near-surface Layers Of Semiconductors And Methods Of Making Same
App 20130320417 - Mukherjee; Niloy ; et al. | 2013-12-05 |
Germanium-based quantum well devices
Grant 8,592,803 - Pillarisetty , et al. November 26, 2 | 2013-11-26 |
Quantum-well-based semiconductor devices
Grant 8,536,621 - Dewey , et al. September 17, 2 | 2013-09-17 |
Extreme high mobility CMOS logic
Grant 8,518,768 - Datta , et al. August 27, 2 | 2013-08-27 |
Gate Electrode Having A Capping Layer
App 20130161766 - Dewey; Gilbert ; et al. | 2013-06-27 |
Method to reduce contact resistance of N-channel transistors by using a III-V semiconductor interlayer in source and drain
Grant 8,415,751 - Mukherjee , et al. April 9, 2 | 2013-04-09 |
Gate electrode having a capping layer
Grant 8,390,082 - Dewey , et al. March 5, 2 | 2013-03-05 |
Multi-gate III-V quantum well structures
Grant 8,344,425 - Radosavljevic , et al. January 1, 2 | 2013-01-01 |
Quantum-well-based Semiconductor Devices
App 20120298958 - Dewey; Gilbert ; et al. | 2012-11-29 |
Quantum-well-based semiconductor devices
Grant 8,258,543 - Dewey , et al. September 4, 2 | 2012-09-04 |
Extreme High Mobility Cmos Logic
App 20120199813 - Datta; Suman ; et al. | 2012-08-09 |
Germanium-based Quantum Well Devices
App 20120193609 - Pillarisetty; Ravi ; et al. | 2012-08-02 |
Method To Reduce Contact Resistance Of N-channel Transistors By Using A Iii-v Semiconductor Interlayer In Source And Drain
App 20120168877 - Mukherjee; Niloy ; et al. | 2012-07-05 |
Germanium-based quantum well devices
Grant 8,193,523 - Pillarisetty , et al. June 5, 2 | 2012-06-05 |
Process for integrating planar and non-planar CMOS transistors on a bulk substrate and article made thereby
Grant 8,193,567 - Kavalieros , et al. June 5, 2 | 2012-06-05 |
Extreme high mobility CMOS logic
Grant 8,183,556 - May 22, 2 | 2012-05-22 |
Metal-insulator-semiconductor Tunneling Contacts
App 20120115330 - Mukherjee; Niloy ; et al. | 2012-05-10 |
Methods For The Deposition Of Ternary Oxide Gate Dielectrics And Structures Formed Thereby
App 20120091542 - Brazier; Mark R. ; et al. | 2012-04-19 |
Complementary metal oxide semiconductor integrated circuit using raised source drain and replacement metal gate
Grant 8,148,786 - Kavalieros , et al. April 3, 2 | 2012-04-03 |
Inducing strain in the channels of metal gate transistors
Grant 8,129,795 - Datta , et al. March 6, 2 | 2012-03-06 |
Forming integrated circuits with replacement metal gate electrodes
Grant 8,119,508 - Kavalieros , et al. February 21, 2 | 2012-02-21 |
Metal-insulator-semiconductor tunneling contacts having an insulative layer disposed between source/drain contacts and source/drain regions
Grant 8,110,877 - Mukherjee , et al. February 7, 2 | 2012-02-07 |
Fabrication of germanium nanowire transistors
Grant 8,110,458 - Jin , et al. February 7, 2 | 2012-02-07 |
Selective high-k dielectric film deposition for semiconductor device
Grant 8,106,440 - Rachmady , et al. January 31, 2 | 2012-01-31 |
Methods for fabricating PMOS metal gate structures
Grant 8,021,940 - Metz , et al. September 20, 2 | 2011-09-20 |
Dielectric interface for group III-V semiconductor device
Grant 7,989,280 - Brask , et al. August 2, 2 | 2011-08-02 |
Germanium-based quantum well devices
App 20110156005 - Pillarisetty; Ravi ; et al. | 2011-06-30 |
Multi-gate III-V quantum well structures
App 20110156004 - Radosavljevic; Marko ; et al. | 2011-06-30 |
Gate Electrode Having A Capping Layer
App 20110156174 - Dewey; Gilbert ; et al. | 2011-06-30 |
Sandwiched metal structure silicidation for enhanced contact
Grant 7,968,457 - Mukherjee , et al. June 28, 2 | 2011-06-28 |
Quantum-well-based Semiconductor Devices
App 20110133168 - Dewey; Gilbert ; et al. | 2011-06-09 |
Forming abrupt source drain metal gate transistors
Grant 7,951,673 - Lindert , et al. May 31, 2 | 2011-05-31 |
Inducing Strain in the Channels of Metal Gate Transistors
App 20110115028 - Datta; Suman ; et al. | 2011-05-19 |
Gate electrode having a capping layer
Grant 7,915,694 - Dewey , et al. March 29, 2 | 2011-03-29 |
Method For Fabricating Transistor With Thinned Channel
App 20110062520 - Brask; Justin K. ; et al. | 2011-03-17 |
Inducing strain in the channels of metal gate transistors
Grant 7,902,058 - Datta , et al. March 8, 2 | 2011-03-08 |
Tunneling field effect transistor using angled implants for forming asymmetric source/drain regions
Grant 7,888,221 - Kavalieros , et al. February 15, 2 | 2011-02-15 |
CMOS device with metal and silicide gate electrodes and a method for making it
Grant 7,883,951 - Brask , et al. February 8, 2 | 2011-02-08 |
Semiconductor device with a high-k gate dielectric and a metal gate electrode
Grant 7,875,937 - Metz , et al. January 25, 2 | 2011-01-25 |
Method for fabricating transistor with thinned channel
Grant 7,858,481 - Brask , et al. December 28, 2 | 2010-12-28 |
Forming Integrated Circuits With Replacement Metal Gate Electrodes
App 20100219456 - Kavalieros; Jack ; et al. | 2010-09-02 |
Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode
Grant 7,785,958 - Doczy , et al. August 31, 2 | 2010-08-31 |
Fabrication Of Germanium Nanowire Transistors
App 20100200835 - Jin; Been-Yih ; et al. | 2010-08-12 |
Metal-insulator-semiconductor tunneling contacts
App 20100155846 - Mukherjee; Niloy ; et al. | 2010-06-24 |
Forming Abrupt Source Drain Metal Gate Transistors
App 20100151669 - Lindert; Nick ; et al. | 2010-06-17 |
Fabrication of germanium nanowire transistors
Grant 7,727,830 - Jin , et al. June 1, 2 | 2010-06-01 |
Forming integrated circuits with replacement metal gate electrodes
Grant 7,718,479 - Kavalieros , et al. May 18, 2 | 2010-05-18 |
Method for making a semiconductor device having a high-k gate dielectric
Grant 7,709,909 - Doczy , et al. May 4, 2 | 2010-05-04 |
Methods of forming nickel silicide layers with low carbon content
Grant 7,704,858 - McSwiney , et al. April 27, 2 | 2010-04-27 |
Method of forming abrupt source drain metal gate transistors
Grant 7,704,833 - Lindert , et al. April 27, 2 | 2010-04-27 |
Selective High-k Dielectric Film Deposition For Semiconductor Device
App 20100078684 - Rachmady; Willy ; et al. | 2010-04-01 |
Sandwiched metal structure silicidation for enhanced contact
App 20100052166 - Mukherjee; Niloy ; et al. | 2010-03-04 |
Selective high-k dielectric film deposition for semiconductor device
Grant 7,670,894 - Rachmady , et al. March 2, 2 | 2010-03-02 |
Method for making a semiconductor device having a high-k dielectric layer and a metal gate electrode
Grant 7,671,471 - Brask , et al. March 2, 2 | 2010-03-02 |
Cmos Device With Metal And Silicide Gate Electrodes And A Method For Making It
App 20090280608 - Brask; Justin K. ; et al. | 2009-11-12 |
Forming high-k dielectric layers on smooth substrates
Grant 7,615,441 - Brask , et al. November 10, 2 | 2009-11-10 |
Selective High-K dielectric film deposition for semiconductor device
App 20090272965 - Rachmady; Willy ; et al. | 2009-11-05 |
Complementary Metal Oxide Semiconductor Integrated Circuit Using Raised Source Drain and Replacement Metal Gate
App 20090261391 - KAVALIEROS; Jack ; et al. | 2009-10-22 |
Angled implantation for removal of thin film layers
Grant 7,595,248 - Hattendorf , et al. September 29, 2 | 2009-09-29 |
Complementary metal oxide semiconductor integrated circuit using raised source drain and replacement metal gate
Grant 7,569,443 - Kavalieros , et al. August 4, 2 | 2009-08-04 |
Methods For Fabricating Pmos Metal Gate Structures
App 20090166769 - Metz; Matthew V. ; et al. | 2009-07-02 |
Fabrication of germanium nanowire transistors
App 20090170251 - Jin; Been-Yih ; et al. | 2009-07-02 |
Reducing Ambipolar Conduction in Carbon Nanotube Transistors
App 20090159872 - Datta; Suman ; et al. | 2009-06-25 |
Gate electrode having a capping layer
Grant 7,524,727 - Dewey , et al. April 28, 2 | 2009-04-28 |
Dielectric interface for group III-V semiconductor device
Grant 7,485,503 - Brask , et al. February 3, 2 | 2009-02-03 |
Process for integrating planar and non-planar CMOS transistors on a bulk substrate and article made thereby
Grant 7,479,421 - Kavalieros , et al. January 20, 2 | 2009-01-20 |
Complementary metal oxide semiconductor integrated circuit using uniaxial compressive stress and biaxial compressive stress
Grant 7,470,972 - Kavalieros , et al. December 30, 2 | 2008-12-30 |
Tunneling field effect transistor using angled implants for forming asymmetric source/drain regions
Grant 7,465,976 - Kavalieros , et al. December 16, 2 | 2008-12-16 |
Semiconductor device with a high-k gate dielectric and a metal gate electrode
Grant 7,449,756 - Metz , et al. November 11, 2 | 2008-11-11 |
Method for making a semiconductor device having a high-k gate dielectric
Grant 7,442,983 - Doczy , et al. October 28, 2 | 2008-10-28 |
Forming dual metal complementary metal oxide semiconductor integrated circuits
Grant 7,439,113 - Doczy , et al. October 21, 2 | 2008-10-21 |
Method for fabricating metal gate structures
Grant 7,439,571 - Doczy , et al. October 21, 2 | 2008-10-21 |
Uniform silicide metal on epitaxially grown source and drain regions of three-dimensional transistors
Grant 7,425,500 - Metz , et al. September 16, 2 | 2008-09-16 |
Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode
Grant 7,390,709 - Doczy , et al. June 24, 2 | 2008-06-24 |
Forming field effect transistors from conductors
Grant 7,390,947 - Majumdar , et al. June 24, 2 | 2008-06-24 |
Reducing oxidation under a high K gate dielectric
Grant 7,387,927 - Turkot, Jr. , et al. June 17, 2 | 2008-06-17 |
Method for making a semiconductor device having a high-k gate dielectric
Grant 7,384,880 - Brask , et al. June 10, 2 | 2008-06-10 |
Method for making a semiconductor device with a high-k gate dielectric and a metal gate electrode
Grant 7,381,608 - Brask , et al. June 3, 2 | 2008-06-03 |
Method for making semiconductor device having a high-k gate dielectric layer and a metal gate electrode
Grant 7,355,281 - Brask , et al. April 8, 2 | 2008-04-08 |
Atomic layer deposition using photo-enhanced bond reconfiguration
Grant 7,326,652 - Chau , et al. February 5, 2 | 2008-02-05 |
Forming high-k dielectric layers on smooth substrates
Grant 7,323,423 - Brask , et al. January 29, 2 | 2008-01-29 |
Method for making a semiconductor device having a high-K gate dielectric and a titanium carbide gate electrode
Grant 7,317,231 - Metz , et al. January 8, 2 | 2008-01-08 |
Semiconductor channel on insulator structure
Grant 7,235,809 - Jin , et al. June 26, 2 | 2007-06-26 |
Device with scavenging spacer layer
Grant 7,226,831 - Metz , et al. June 5, 2 | 2007-06-05 |
Method for making a semiconductor device with a metal gate electrode that is formed on an annealed high-k gate dielectric layer
Grant 7,220,635 - Brask , et al. May 22, 2 | 2007-05-22 |
Methods for integrating replacement metal gate structures
Grant 7,217,611 - Kavalieros , et al. May 15, 2 | 2007-05-15 |
Replacement gate process for making a semiconductor device that includes a metal gate electrode
Grant 7,208,361 - Shah , et al. April 24, 2 | 2007-04-24 |
Depositing an oxide
Grant 7,192,890 - Zhou , et al. March 20, 2 | 2007-03-20 |
Forming dual metal complementary metal oxide semiconductor integrated circuits
Grant 7,192,856 - Doczy , et al. March 20, 2 | 2007-03-20 |
Method for making a semiconductor device that includes a metal gate electrode
Grant 7,176,090 - Brask , et al. February 13, 2 | 2007-02-13 |
Method for making a semiconductor device that includes a metal gate electrode
Grant 7,160,767 - Brask , et al. January 9, 2 | 2007-01-09 |
Method for making a semiconductor device having a high-k gate dielectric
Grant 7,160,779 - Doczy , et al. January 9, 2 | 2007-01-09 |
Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode
Grant 7,157,378 - Brask , et al. January 2, 2 | 2007-01-02 |
CMOS device with metal and silicide gate electrodes and a method for making it
Grant 7,153,734 - Brask , et al. December 26, 2 | 2006-12-26 |
Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode
Grant 7,153,784 - Brask , et al. December 26, 2 | 2006-12-26 |
Reducing the dielectric constant of a portion of a gate dielectric
Grant 7,148,099 - Datta , et al. December 12, 2 | 2006-12-12 |
Semiconductor device with a high-k gate dielectric and a metal gate electrode
Grant 7,148,548 - Doczy , et al. December 12, 2 | 2006-12-12 |
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