loadpatents
name:-0.022077798843384
name:-0.0097420215606689
name:-0.0015430450439453
Mehta; Narendra Singh Patent Filings

Mehta; Narendra Singh

Patent Applications and Registrations

Patent applications and USPTO patent grants for Mehta; Narendra Singh.The latest application filed is for "damage implantation of cap layer".

Company Profile
1.10.17
  • Mehta; Narendra Singh - Dallas TX
  • Mehta; Narendra Singh - Santa Clara CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Damage Implantation Of Cap Layer
App 20220102553 - Nandakumar; Mahalingam ;   et al.
2022-03-31
Damage Implantation of a Cap Layer
App 20170365715 - Nandakumar; Mahalingam ;   et al.
2017-12-21
Multiphase charger
Grant 9,219,369 - Mehta , et al. December 22, 2
2015-12-22
Parallel arrangement of asynchronous buck converters for advanced power capability
Grant 9,119,162 - Stenzel , et al. August 25, 2
2015-08-25
Adaptive gate drive circuit with temperature compensation
Grant 8,901,989 - Mehta , et al. December 2, 2
2014-12-02
Damage implantation of a cap layer
Grant 8,859,377 - Nandakumar , et al. October 14, 2
2014-10-14
Multiphase Charger
App 20140266011 - Mehta; Narendra Singh ;   et al.
2014-09-18
Parallel Arrangement Of Asynchronous Buck Converters For Advanced Power Capability
App 20140235299 - Stenzel; Adrian M. ;   et al.
2014-08-21
Adaptive Gate Drive Circuit With Temperatuare Compensation
App 20140028357 - Mehta; Narendra Singh ;   et al.
2014-01-30
Highly selective liners for semiconductor fabrication
Grant 7,838,370 - Mehta , et al. November 23, 2
2010-11-23
Semiconductor Device Having a Strain Inducing Sidewall Spacer and a Method of Manufacture Therefor
App 20100270622 - NANDAKUMAR; Mahalingam ;   et al.
2010-10-28
Damage Implantation of a Cap Layer
App 20100252887 - Nandakumar; Mahalingam ;   et al.
2010-10-07
Implant damage of layer for easy removal and reduced silicon recess
Grant 7,772,094 - Nandakumar , et al. August 10, 2
2010-08-10
Semiconductor device manufactured using a non-contact implant metrology
Grant 7,696,021 - Mehta , et al. April 13, 2
2010-04-13
Implant Damage Of Layer For Easy Removal And Reduced Silicon Recess
App 20090170277 - Nandakumar; Mahalingam ;   et al.
2009-07-02
Systems And Methods For Flash Annealing Of Semiconductor Devices
App 20090130864 - MEHTA; Narendra Singh ;   et al.
2009-05-21
Methodology for Reducing Post Burn-In Vmin Drift
App 20090045472 - Chakravarthi; Srinivasan ;   et al.
2009-02-19
Damage Implantation of a Cap Layer
App 20090004805 - Nandakumar; Mahalingam ;   et al.
2009-01-01
Stacked Poly Structure To Reduce The Poly Particle Count In Advanced Cmos Technology
App 20080251864 - Chen; Yuanning ;   et al.
2008-10-16
Highly Selective Liners For Semiconductor Fabrication
App 20080217703 - Mehta; Narendra Singh ;   et al.
2008-09-11
Methods of improving drive currents by employing strain inducing STI liners
Grant 7,396,728 - Varghese , et al. July 8, 2
2008-07-08
Strain modulation employing process techniques for CMOS technologies
Grant 7,384,861 - Mehta , et al. June 10, 2
2008-06-10
Semiconductor Device Manufactured Using a Non-Contact Implant Metrology
App 20080006886 - Mehta; Narendra Singh ;   et al.
2008-01-10
Semiconductor Device Having A Strain Inducing Sidewall Spacer And A Method Of Manufacture Therefor
App 20070196991 - Nandakumar; Mahalingam ;   et al.
2007-08-23
Strain modulation employing process techniques for CMOS technologies
App 20070015347 - Mehta; Narendra Singh ;   et al.
2007-01-18
Methods of improving drive currents by employing strain inducing STI liners
App 20070004118 - Varghese; Ajith ;   et al.
2007-01-04

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed