Mazure; Carlos

Patent Applications and Registrations

Patent applications and USPTO patent grants for Mazure; Carlos.The latest application filed is for "finfet with back-gate".

Company Profile

0.70.63

Mazure; Carlos - Bernin FR
Mazure; Carlos - St. Nazaire les Eymes FR
Mazure; Carlos - Bernjn FR
Mazure; Carlos - Berlin FR
Mazure; Carlos - Saint Nazaire les Eymes FR
Mazure; Carlos - St. Nazire les Eymes FR
Mazure; Carlos - Zorneding DE

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Pseudo-inverter circuit with multiple independent gate transistors Grant 9,496,877 - Mazure , et al. November 15, 2	2016-11-15
Device having a contact between semiconductor regions through a buried insulating layer, and process for fabricating said device Grant 9,490,264 - Mazure , et al. November 8, 2	2016-11-08
Finfet With Back-gate App 20160020326 - MAZURE; Carlos ; et al.	2016-01-21
Semiconductor memory having staggered sense amplifiers associated with a local column decoder Grant 9,159,400 - Ferrant , et al. October 13, 2	2015-10-13
Complementary Fet Injection For A Floating Body Cell App 20150145049 - Hoffman; Franz ; et al.	2015-05-28
Method for manufacturing a semiconductor substrate Grant 9,035,474 - Mazure , et al. May 19, 2	2015-05-19
Bonded semiconductor structures and method of forming same Grant 8,987,114 - Mazure , et al. March 24, 2	2015-03-24
Pseudo-inverter Circuit With Multiple Independent Gate Transistors App 20140225648 - Mazure; Carlos ; et al.	2014-08-14
Substrate Having A Charged Zone In An Insulating Buried Layer App 20140225182 - Shaheen; Mohamad A. ; et al.	2014-08-14
Substrate having a charged zone in an insulating buried layer Grant 8,735,946 - Shaheen , et al. May 27, 2	2014-05-27
Flash memory cell on SeOI having a second control gate buried under the insulating layer Grant 8,664,712 - Mazure , et al. March 4, 2	2014-03-04
Multi-layer structures and process for fabricating semiconductor devices Grant 8,652,887 - Nguyen , et al. February 18, 2	2014-02-18
Pseudo-inverter circuit on SeOI Grant 8,654,602 - Mazure , et al. February 18, 2	2014-02-18
Substrate Having A Charged Zone In An Insulating Buried Layer App 20140015023 - Allibert; Frederic ; et al.	2014-01-16
Nano-sense amplifier Grant 8,625,374 - Mazure , et al. January 7, 2	2014-01-07
Method for transferring a monocrystalline semiconductor layer onto a support substrate Grant 8,603,896 - Gaudin , et al. December 10, 2	2013-12-10
SRAM-type memory cell Grant 8,575,697 - Mazure , et al. November 5, 2	2013-11-05
Substrate having a charged zone in an insulating buried layer Grant 8,535,996 - Shaheen , et al. September 17, 2	2013-09-17
Data-path cell on an SeOI substrate with a back control gate beneath the insulating layer Grant 8,508,289 - Mazure , et al. August 13, 2	2013-08-13
Fully depleted SOI device with buried doped layer Grant 8,492,844 - Enders , et al. July 23, 2	2013-07-23
Relaxation of strained layers Grant 8,481,408 - Letertre , et al. July 9, 2	2013-07-09
Device comprising a field-effect transistor in a silicon-on-insulator Grant 8,455,938 - Nguyen , et al. June 4, 2	2013-06-04
Data-path cell on an SeOI substrate with a back control gate beneath the insulating layer Grant 8,432,216 - Mazure , et al. April 30, 2	2013-04-30
Nano-sense Amplifier App 20130100749 - MAZURE; Carlos ; et al.	2013-04-25
Arrays of transistors with back control gates buried beneath the insulating film of a semiconductor-on-insulator substrate Grant 8,384,425 - Mazure , et al. February 26, 2	2013-02-26
Method For Transferring A Monocrystalline Semiconductor Layer Onto A Support Substrate App 20130029474 - Gaudin; Gweltaz ; et al.	2013-01-31
Nano-sense amplifier Grant 8,358,552 - Mazure , et al. January 22, 2	2013-01-22
Bonded Semiconductor Structures And Method Of Forming Same App 20130015442 - Mazure; Carlos ; et al.	2013-01-17
Devices and methods for comparing data in a content-addressable memory Grant 8,325,506 - Mazure , et al. December 4, 2	2012-12-04
Methods for manufacturing multilayer wafers with trench structures Grant 8,309,426 - Bourdelle , et al. November 13, 2	2012-11-13
DRAM memory cell having a vertical bipolar injector Grant 8,305,803 - Mazure , et al. November 6, 2	2012-11-06
Memory cell with a channel buried beneath a dielectric layer Grant 8,304,833 - Mazure , et al. November 6, 2	2012-11-06
PSEUDO-INVERTER CIRCUIT ON SeOI App 20120250444 - Mazure; Carlos ; et al.	2012-10-04
Semiconductor Memory Having Staggered Sense Amplifiers Associated With A Local Column Decoder App 20120243360 - Ferrant; Richard ; et al.	2012-09-27
Multi-layer Structures And Process For Fabricating Semiconductor Devices App 20120231606 - Nguyen; Bich-Yen ; et al.	2012-09-13
Relaxation Of Strained Layers App 20120214291 - Letertre; Fabrice ; et al.	2012-08-23
Method of fabricating a back-illuminated image sensor Grant 8,241,942 - Bourdelle , et al. August 14, 2	2012-08-14
Fully Depleted Soi Device With Buried Doped Layer App 20120181609 - Enders; Gerhard ; et al.	2012-07-19
Pseudo-inverter circuit on SeOI Grant 8,223,582 - Mazure , et al. July 17, 2	2012-07-17
Forming structures that include a relaxed or pseudo-relaxed layer on a substrate Grant 8,173,512 - Ghyselen , et al. May 8, 2	2012-05-08
Methods For Manufacturing Multilayer Wafers With Trench Structures App 20110294277 - Bourdelle; Konstantin ; et al.	2011-12-01
Method Of Fabricating A Back-illuminated Image Sensor App 20110287571 - Bourdelle; Konstantin ; et al.	2011-11-24
Methods and structures for relaxation of strained layers Grant 8,048,693 - Letertre , et al. November 1, 2	2011-11-01
Device Comprising A Field-effect Transistor In A Silicon-on-insulator App 20110260233 - Nguyen; Bich-Yen ; et al.	2011-10-27
Low-cost double-structure substrates and methods for their manufacture Grant 8,035,163 - Nguyen , et al. October 11, 2	2011-10-11
Method For Manufacturing A Semiconductor Substrate App 20110241157 - Mazure; Carlos ; et al.	2011-10-06
PSEUDO-INVERTER CIRCUIT ON SeO1 App 20110242926 - Mazure; Carlos ; et al.	2011-10-06
Sram-type Memory Cell App 20110233675 - Mazure; Carlos ; et al.	2011-09-29
Nano-sense Amplifier App 20110222361 - Mazure; Carlos ; et al.	2011-09-15
DATA-PATH CELL ON AN SeOI SUBSTRATE WITH A BACK CONTROL GATE BENEATH THE INSULATING LAYER App 20110215860 - Mazure; Carlos ; et al.	2011-09-08
Forming Structures That Include A Relaxed Or Pseudo-relaxed Layer On A Substrate App 20110217825 - Ghyselen; Bruno ; et al.	2011-09-08
Low cost substrates and method of forming such substrates Grant 8,013,417 - Nguyen , et al. September 6, 2	2011-09-06
Dram Memory Cell Having A Vertical Bipolar Injector App 20110170343 - Mazure; Carlos ; et al.	2011-07-14
Memory Cell With A Channel Buried Beneath A Dielectric Layer App 20110169087 - MAZURE; CARLOS ; et al.	2011-07-14
Devices And Methods For Comparing Data In A Content-addressable Memory App 20110170327 - Mazure; Carlos ; et al.	2011-07-14
Device Having A Contact Between Semiconductor Regions Through A Buried Insulating Layer, And Process For Fabricating Said Device App 20110169090 - Mazure; Carlos ; et al.	2011-07-14
Low-cost substrates having high-resistivity properties and methods for their manufacture Grant 7,977,705 - Nguyen , et al. July 12, 2	2011-07-12
Relaxation Of Strained Layers App 20110143522 - Letertre; Fabrice ; et al.	2011-06-16
FLASH MEMORY CELL ON SeOI HAVING A SECOND CONTROL GATE BURIED UNDER THE INSULATING LAYER App 20110134698 - Mazure; Carlos ; et al.	2011-06-09
METHOD OF CONTROLLING A DRAM MEMORY CELL ON THE SeOI HAVING A SECOND CONTROL GATE BURIED UNDER THE INSULATING LAYER App 20110134690 - Mazure; Carlos ; et al.	2011-06-09
Arrays Of Transistors With Back Control Gates Buried Beneath The Insulating Film Of A Semiconductor-on-insulator Substrate App 20110133776 - Mazure; Carlos ; et al.	2011-06-09
DATA-PATH CELL ON AN SeOI SUBSTRATE WITH A BACK CONTROL GATE BENEATH THE INSULATING LAYER App 20110133822 - Mazure; Carlos ; et al.	2011-06-09
Forming structures that include a relaxed or pseudo-relaxed layer on a substrate Grant 7,919,393 - Ghyselen , et al. April 5, 2	2011-04-05
Methods Of Manufacturing Semiconductor Structures And Semiconductor Structures Obtained By Such Methods App 20110042780 - Nguyen; Bich-Yen ; et al.	2011-02-24
Substrate Having A Charged Zone In An Insulating Buried Layer App 20110012200 - Allibert; Frederic ; et al.	2011-01-20
Method for producing a semiconductor substrate Grant 7,833,877 - Bourdelle , et al. November 16, 2	2010-11-16
Method of treating interface defects in a substrate Grant 7,799,651 - Mazure , et al. September 21, 2	2010-09-21
Semiconductor buffer structures Grant 7,785,995 - Cody , et al. August 31, 2	2010-08-31
Forming Structures That Include A Relaxed Or Pseudo-relaxed Layer On A Substrate App 20100210090 - Ghyselen; Bruno ; et al.	2010-08-19
Substrate production method and substrate including amorphization and recrystallizing a top region Grant 7,767,545 - Bourdelle , et al. August 3, 2	2010-08-03
Forming structures that include a relaxed or pseudo-relaxed layer on a substrate Grant 7,736,988 - Ghyselen , et al. June 15, 2	2010-06-15
Method for direct bonding two semiconductor substrates Grant 7,670,929 - Bourdelle , et al. March 2, 2	2010-03-02
Methods And Structures For Relaxation Of Strained Layers App 20100032805 - LETERTRE; Fabrice ; et al.	2010-02-11
Low Cost Substrates And Method Of Forming Such Substrates App 20090321872 - Nguyen; Bich-Yen ; et al.	2009-12-31
Low-cost Substrates Having High-resistivity Properties And Methods For Their Manufacture App 20090321873 - Nguyen; Bich-Yen ; et al.	2009-12-31
Low-cost Double-structure Substrates And Methods For Their Manufacture App 20090321829 - Nguyen; Bich-Yen ; et al.	2009-12-31
Method of fabricating a hybrid substrate Grant 7,575,988 - Bourdelle , et al. August 18, 2	2009-08-18
Film taking-off method Grant 7,572,714 - Aulnette , et al. August 11, 2	2009-08-11
Methods for producing a multilayer semiconductor structure Grant 7,510,949 - Mazure , et al. March 31, 2	2009-03-31
Method Of Treating Interface Defects In A Substrate App 20090014720 - MAZURE; Carlos ; et al.	2009-01-15
Substrate Production Method and Substrate App 20080303061 - Bourdelle; Konstantin ; et al.	2008-12-11
Method for manufacturing a free-standing substrate made of monocrystalline semiconductor material Grant 7,407,869 - Ghyselen , et al. August 5, 2	2008-08-05
Method for concurrently producing at least a pair of semiconductor structures that each include at least one useful layer on a substrate Grant 7,407,867 - Ghyselen , et al. August 5, 2	2008-08-05
Method for transferring a thin layer including a controlled disturbance of a crystalline structure Grant 7,387,947 - Cayrefourcq , et al. June 17, 2	2008-06-17
Method For Producing A Semiconductor Substrate App 20080102601 - Bourdelle; Konstantin ; et al.	2008-05-01
Method For Direct Bonding Two Semiconductor Substrates App 20080014712 - Bourdelle; Konstantin ; et al.	2008-01-17
Method Of Fabricating A Hybrid Substrate App 20080014714 - BOURDELLE; Konstantin ; et al.	2008-01-17
Semiconductor buffer structures App 20070264801 - Cody; Nyles W. ; et al.	2007-11-15
Semiconductor structure for providing strained crystalline layer on insulator and method for fabricating same Grant 7,232,743 - Aulnette , et al. June 19, 2	2007-06-19
Film taking-off method App 20070023867 - Aulnette; Cecile ; et al.	2007-02-01
Method for concurrently producing at least a pair of semiconductor structures that each include at least one useful layer on a substrate App 20060286770 - Ghyselen; Bruno ; et al.	2006-12-21
Hybrid fully SOI-type multilayer structure App 20060220129 - Letertre; Fabrice ; et al.	2006-10-05
Method for concurrently producing at least a pair of semiconductor structures that each include at least one useful layer on a substrate Grant 7,115,481 - Ghyselen , et al. October 3, 2	2006-10-03
Forming structures that include a relaxed or pseudo-relaxed layer on a substrate App 20060128117 - Ghyselen; Bruno ; et al.	2006-06-15
Method for transferring a thin layer including a controlled disturbance of a crystalline structure App 20060099779 - Cayrefourcq; Ian ; et al.	2006-05-11
Semiconductor structure for providing strained crystalline layer on insulator and method for fabricating same App 20060088979 - Aulnette; Cecile ; et al.	2006-04-27
Method for recycling a substrate Grant 7,022,586 - Maleville , et al. April 4, 2	2006-04-04
Forming structures that include a relaxed or pseudo-relaxed layer on a substrate Grant 7,018,909 - Ghyselen , et al. March 28, 2	2006-03-28
Method for manufacturing a free-standing substrate made of monocrystalline semiconductor material App 20060035440 - Ghyselen; Bruno ; et al.	2006-02-16
Semiconductor structure for providing strained crystalline layer on insulator and method for fabricating same Grant 6,995,427 - Aulnette , et al. February 7, 2	2006-02-07
Method of manufacturing a free-standing substrate made of monocrystalline semi-conductor material Grant 6,964,914 - Ghyselen , et al. November 15, 2	2005-11-15
Semiconductor structure and methods for fabricating same Grant 6,955,971 - Ghyselen , et al. October 18, 2	2005-10-18
Methods for producing a multilayer semiconductor structure App 20050191824 - Mazure, Carlos ; et al.	2005-09-01
Method for concurrently producing at least a pair of semiconductor structures that each include at least one useful layer on a substrate App 20040248378 - Ghyselen, Bruno ; et al.	2004-12-09
Forming structures that include a relaxed or pseudo-relaxed layer on a substrate App 20040195656 - Ghyselen, Bruno ; et al.	2004-10-07
Method for forming a relaxed or pseudo-relaxed useful layer on a substrate App 20040192067 - Ghyselen, Bruno ; et al.	2004-09-30
Method of obtaining a self-supported thin semiconductor layer for electronic circuits App 20040175902 - Rayssac, Olivier ; et al.	2004-09-09
Semiconductor structure and methods for fabricating same App 20040150067 - Ghyselen, Bruno ; et al.	2004-08-05
Semiconductor structure for providing strained crystalline layer on insulator and method for fabricating same App 20040150006 - Aulnette, Cecile ; et al.	2004-08-05
Method for recycling a substrate App 20040112866 - Maleville, Christophe ; et al.	2004-06-17
Method for manufacturing a free-standing substrate made of monocrystalline semi-conductor material App 20040023468 - Ghyselen, Bruno ; et al.	2004-02-05
Process for fabricating layered superlattice materials and AB0.sub.3 type metal oxides without exposure to oxygen at high temperatures Grant 5,962,069 - Schindler , et al. October 5, 1	1999-10-05

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