Mandelman; Jack Allan

Patent Applications and Registrations

Patent applications and USPTO patent grants for Mandelman; Jack Allan.The latest application filed is for "layered structure with fuse".

Company Profile

0.110.105

Mandelman; Jack Allan - Flat Rock NC
Mandelman; Jack Allan - Flatrock NC US
Mandelman; Jack Allan - Zumbrota MN
Mandelman; Jack Allan - Stormville NY
Mandelman; Jack Allan - Dutchess County NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
High-voltage silicon-on-insulator transistors and methods of manufacturing the same Grant 8,772,876 - Ma , et al. July 8, 2	2014-07-08
Layered structure with fuse Grant 8,610,244 - Lu-Chen Hsu , et al. December 17, 2	2013-12-17
FinFET with reduced gate to fin overlay sensitivity Grant 8,518,767 - Cheng , et al. August 27, 2	2013-08-27
Layered Structure With Fuse App 20120248567 - Lu-Chen Hsu; Louis ; et al.	2012-10-04
Electronic fuses in semiconductor integrated circuits Grant 8,232,620 - Lu-Chen Hsu , et al. July 31, 2	2012-07-31
Finfet With Reduced Gate To Fin Overlay Sensitivity App 20120146112 - Cheng; Kangguo ; et al.	2012-06-14
Structures incorporating semiconductor device structures with reduced junction capacitance and drain induced barrier lowering Grant 7,984,408 - Cheng , et al. July 19, 2	2011-07-19
Structures incorporating interconnect structures with improved electromigration resistance Grant 7,984,409 - Hsu , et al. July 19, 2	2011-07-19
Method and apparatus for making coplanar isolated regions of different semiconductor materials on a substrate Grant 7,947,566 - Chen , et al. May 24, 2	2011-05-24
Dielectric material with a reduced dielectric constant and methods of manufacturing the same Grant 7,948,084 - Hsu , et al. May 24, 2	2011-05-24
Methods for forming germanium-on-insulator semiconductor structures using a porous layer and semiconductor structures formed by these methods Grant 7,928,436 - Cheng , et al. April 19, 2	2011-04-19
Semiconductor FinFET structures with encapsulated gate electrodes and methods for forming such semiconductor FinFET structures Grant 7,915,682 - Hsu , et al. March 29, 2	2011-03-29
Fuse/anti-fuse structure and methods of making and programming same Grant 7,911,025 - Hsu , et al. March 22, 2	2011-03-22
Semiconductor device structures with self-aligned doped regions and methods for forming such semiconductor device structures Grant 7,898,014 - Cheng , et al. March 1, 2	2011-03-01
Semiconductor structures integrating damascene-body FinFET's and planar devices on a common substrate and methods for forming such semiconductor structures Grant 7,879,660 - Booth, Jr. , et al. February 1, 2	2011-02-01
Hybrid oriented substrates and crystal imprinting methods for forming such hybrid oriented substrates Grant 7,875,960 - Hsu , et al. January 25, 2	2011-01-25
Bulk FinFET device Grant 7,863,122 - Booth, Jr. , et al. January 4, 2	2011-01-04
Electronic Fuses In Semiconductor Integrated Circuits App 20100320563 - Lu-Chen Hsu; Louis ; et al.	2010-12-23
Methods for fabricating a semiconductor structure using a mandrel and semiconductor structures formed thereby Grant 7,847,323 - Cheng , et al. December 7, 2	2010-12-07
Method and structure to reduce contact resistance on thin silicon-on-insulator device Grant 7,833,873 - Greene , et al. November 16, 2	2010-11-16
Structure incorporating latch-up resistant semiconductor device structures on hybrid substrates Grant 7,818,702 - Mandelman , et al. October 19, 2	2010-10-19
Methods for forming semiconductor structures with buried isolation collars and semiconductor structures formed by these methods Grant 7,811,881 - Cheng , et al. October 12, 2	2010-10-12
Apparatus for implementing enhanced hand shake protocol in microelectronic communication systems Grant 7,809,340 - Hsu , et al. October 5, 2	2010-10-05
Crystal imprinting methods for fabricating substrates with thin active silicon layers Grant 7,803,700 - Hsu , et al. September 28, 2	2010-09-28
High-voltage silicon-on-insulator transistors and methods of manufacturing the same Grant 7,790,527 - Ma , et al. September 7, 2	2010-09-07
Semiconductor structures for latch-up suppression and methods of forming such semiconductor structures Grant 7,791,145 - Furukawa , et al. September 7, 2	2010-09-07
Electronic fuses in semiconductor integrated circuits Grant 7,785,934 - Hsu , et al. August 31, 2	2010-08-31
Methods for forming germanium-on-insulator semiconductor structures using a porous layer and semiconductor structures formed by these methods Grant 7,767,541 - Cheng , et al. August 3, 2	2010-08-03
BEOL interconnect structures with simultaneous high-k and low-k dielectric regions Grant 7,768,130 - Hsu , et al. August 3, 2	2010-08-03
Latch-up resistant semiconductor structures on hybrid substrates and methods for forming such semiconductor structures Grant 7,754,513 - Mandelman , et al. July 13, 2	2010-07-13
Design structure incorporating a hybrid substrate Grant 7,750,406 - Cannon , et al. July 6, 2	2010-07-06
Semiconductor device structures for bipolar junction transistors and methods of fabricating such structures Grant 7,737,530 - Cheng , et al. June 15, 2	2010-06-15
Well isolation trenches (WIT) for CMOS devices Grant 7,737,504 - Furukawa , et al. June 15, 2	2010-06-15
Dielectric material with reduced dielectric constant and methods of manufacturing the same Grant 7,732,322 - Hsu , et al. June 8, 2	2010-06-08
Methods and semiconductor structures for latch-up suppression using a conductive region Grant 7,727,848 - Furukawa , et al. June 1, 2	2010-06-01
Semiconductor structures integrating damascene-body FinFET's and planar devices on a common substrate and methods for forming such semiconductor structures Grant 7,692,250 - Booth, Jr. , et al. April 6, 2	2010-04-06
Semiconductor device structures incorporating voids and methods of fabricating such structures Grant 7,691,712 - Chidambarrao , et al. April 6, 2	2010-04-06
Method and structure to reduce contact resistance on thin silicon-on-insulator device Grant 7,687,865 - Greene , et al. March 30, 2	2010-03-30
Interconnect structures with improved electromigration resistance and methods for forming such interconnect structures Grant 7,666,781 - Hsu , et al. February 23, 2	2010-02-23
Bulk FinFET device Grant 7,667,248 - Booth, Jr. , et al. February 23, 2	2010-02-23
Semiconductor device structures with reduced junction capacitance and drain induced barrier lowering and methods for fabricating such device structures and for fabricating a semiconductor-on-insulator substrate Grant 7,659,178 - Cheng , et al. February 9, 2	2010-02-09
Methods and semiconductor structures for latch-up suppression using a conductive region Grant 7,655,985 - Furukawa , et al. February 2, 2	2010-02-02
Hybrid oriented substrates and crystal imprinting methods for forming such hybrid oriented substrates Grant 7,651,929 - Hsu , et al. January 26, 2	2010-01-26
Hybrid substrates and methods for forming such hybrid substrates Grant 7,651,902 - Cannon , et al. January 26, 2	2010-01-26
Method of fabricating semiconductor structures for latch-up suppression Grant 7,648,869 - Chang , et al. January 19, 2	2010-01-19
Semiconductor structures for latch-up suppression and methods of forming such semiconductor structures Grant 7,645,676 - Furukawa , et al. January 12, 2	2010-01-12
Methods for fabricating a semiconductor structure using a mandrel and semiconductor structures formed thereby Grant 7,638,381 - Cheng , et al. December 29, 2	2009-12-29
Semiconductor device structures for bipolar junction transistors and methods of fabricating such structures Grant 7,618,872 - Cheng , et al. November 17, 2	2009-11-17
Semiconductor structures with body contacts and fabrication methods thereof Grant 7,611,931 - Cheng , et al. November 3, 2	2009-11-03
Body-contacted semiconductor structures and methods of fabricating such body-contacted semiconductor structures Grant 7,608,506 - Cheng , et al. October 27, 2	2009-10-27
PFETs and methods of manufacturing the same Grant 7,569,434 - Cheng , et al. August 4, 2	2009-08-04
Fin PIN diode Grant 7,560,784 - Cheng , et al. July 14, 2	2009-07-14
Semiconductor constructions and semiconductor device fabrication methods Grant 7,560,310 - Hsu , et al. July 14, 2	2009-07-14
Method And Apparatus For Making Coplanar Isolated Regions Of Different Semiconductor Materials On A Substrate App 20090121312 - Chen; Howard Hao ; et al.	2009-05-14
Reduced-resistance finFETs by sidewall silicidation and methods of manufacturing the same Grant 7,531,423 - Cheng , et al. May 12, 2	2009-05-12
Bulk FinFET device Grant 7,517,764 - Booth, Jr. , et al. April 14, 2	2009-04-14
Design structures incorporating interconnect structures with liner repair layers Grant 7,494,916 - Hsu , et al. February 24, 2	2009-02-24
Ferromagnetic memory cell and methods of making and using the same Grant 7,491,994 - Cheng , et al. February 17, 2	2009-02-17
Methods and semiconductor structures for latch-up suppression using a conductive region Grant 7,491,618 - Furukawa , et al. February 17, 2	2009-02-17
Semiconductor device structures for bipolar junction transistors Grant 7,482,672 - Cheng , et al. January 27, 2	2009-01-27
Method to reduce contact resistance on thin silicon-on-insulator device Grant 7,479,437 - Greene , et al. January 20, 2	2009-01-20
Hybrid oriented substrates and crystal imprinting methods for forming such hybrid oriented substrates Grant 7,473,985 - Hsu , et al. January 6, 2	2009-01-06
Integrated Fin-Local Interconnect Structure App 20090007036 - Cheng; Kangguo ; et al.	2009-01-01
Integrated Fin-Local Interconnect Structure App 20090001426 - Cheng; Kangguo ; et al.	2009-01-01
Hybrid Fully-Silicided (FUSI)/Partially-Silicided (PASI) Structures App 20090001477 - Hsu; Louis Lu-Chen ; et al.	2009-01-01
Hybrid Fully-Silicided (FUSI)/Partially-Silicided (PASI) Structures App 20090007037 - Hsu; Louis Lu-Chen ; et al.	2009-01-01
Fuse/anti-fuse structure and methods of making and programming same Grant 7,470,929 - Hsu , et al. December 30, 2	2008-12-30
Methods for forming semiconductor structures with buried isolation collars Grant 7,465,642 - Cheng , et al. December 16, 2	2008-12-16
Hybrid Oriented Substrates And Crystal Imprinting Methods For Forming Such Hybrid Oriented Substrates App 20080283920 - Hsu; Louis Lu-Chen ; et al.	2008-11-20
Methods For Fabricating A Semiconductor Structure Using A Mandrel And Semiconductor Structures Formed Thereby App 20080283917 - Cheng; Kangguo ; et al.	2008-11-20
Method And Structure To Reduce Contact Resistance On Thin Silicon-on-insulator Device App 20080274597 - Greene; Brian J. ; et al.	2008-11-06
Method And Structure To Reduce Contact Resistance On Thin Silicon-on-insulator Device App 20080272412 - Greene; Brian J. ; et al.	2008-11-06
Methods And Semiconductor Structures For Latch-up Suppression Using A Conductive Region App 20080268610 - Furukawa; Toshiharu ; et al.	2008-10-30
Hybrid Substrates and Methods for Forming Such Hybrid Substrates App 20080258181 - Cannon; Ethan Harrison ; et al.	2008-10-23
Design Structure Incorporating a Hybrid Substrate App 20080258222 - Cannon; Ethan Harrison ; et al.	2008-10-23
Semiconductor Device Structures and Methods of Fabricating Semiconductor Device Structures for Use in SRAM Devices App 20080251934 - Mandelman; Jack Allan ; et al.	2008-10-16
Structure Incorporating Semiconductor Device Structures For Use In Sram Devices App 20080251878 - Mandelman; Jack Allan ; et al.	2008-10-16
Methods For Fabricating Semiconductor Device Structures With Reduced Susceptibility To Latch-up And Semiconductor Device Structures Formed By The Methods App 20080242016 - Cannon; Ethan Harrison ; et al.	2008-10-02
BULK FinFET DEVICE App 20080233699 - Booth; Roger Allen ; et al.	2008-09-25
Apparatus For Implementing Enhanced Hand Shake Protocol In Microelectronic Communication Systems App 20080227425 - Hsu; Louis Lu-Chen ; et al.	2008-09-18
Semiconductor Device Structures For Bipolar Junction Transistors And Methods Of Fabricating Such Structures App 20080224175 - Cheng; Kangguo ; et al.	2008-09-18
Fuse/anti-fuse structure and methods of making and programming same App 20080224261 - Hsu; Louis C. ; et al.	2008-09-18
Methods And Semiconductor Structures For Latch-up Suppression Using A Conductive Region App 20080217698 - Furukawa; Toshiharu ; et al.	2008-09-11
Latch-Up Resistant Semiconductor Structures on Hybrid Substrates and Methods for Forming Such Semiconductor Structures App 20080217690 - Mandelman; Jack Allan ; et al.	2008-09-11
Methods For Forming Semiconductor Structures With Buried Isolation Collars And Semiconductor Structures Formed By These Methods App 20080217671 - Cheng; Kangguo ; et al.	2008-09-11
Methods For Forming Semiconductor Structures With Buried Isolation Collars And Semiconductor Structures Formed By These Methods App 20080220586 - Cheng; Kangguo ; et al.	2008-09-11
Semiconductor Device Structures For Bipolar Junction Transistors And Methods Of Fabricating Such Structures App 20080220583 - Cheng; Kangguo ; et al.	2008-09-11
Methods For Forming Germanium-on-insulator Semiconductor Structures Using A Porous Layer And Semiconductor Structures Formed By These Methods App 20080211054 - Cheng; Kangguo ; et al.	2008-09-04
Structure Incorporating Latch-Up Resistant Semiconductor Device Structures on Hybrid Substrates App 20080203522 - Mandelman; Jack Allan ; et al.	2008-08-28
FinFET with Reduced Gate to Fin Overlay Sensitivity App 20080203468 - Cheng; Kangguo ; et al.	2008-08-28
Methods For Fabricating Semiconductor Device Structures With Reduced Susceptibility To Latch-up And Semiconductor Device Structures Formed By The Methods App 20080203492 - Cannon; Ethan Harrison ; et al.	2008-08-28
Electronic Fuses In Semiconductor Integrated Circuits App 20080206978 - Hsu; Louis Lu-Chen ; et al.	2008-08-28
Method for implementing enhanced hand shake protocol in microelectronic communication systems Grant 7,412,211 - Hsu , et al. August 12, 2	2008-08-12
Fin Pin Diode App 20080185691 - Cheng; Kangguo ; et al.	2008-08-07
Method and apparatus for making coplanar dielectrically-isolated regions of different semiconductor materials on a substrate Grant 7,399,686 - Chen , et al. July 15, 2	2008-07-15
Interconnect structures with linear repair layers and methods for forming such interconnection structures Grant 7,396,762 - Hsu , et al. July 8, 2	2008-07-08
BULK finFET DEVICE App 20080142891 - Booth; Roger Allen ; et al.	2008-06-19
Crystal Imprinting Methods For Fabricating Substrates With Thin Active Silicon Layers App 20080146006 - Hsu; Louis Lu-Chen ; et al.	2008-06-19
Semiconductor FinFET structures with encapsulated gate electrodes and methods for forming such semiconductor FinFET structures Grant 7,384,838 - Hsu , et al. June 10, 2	2008-06-10
Interconnect Structures with Liner Repair Layers and Methods for Forming Such Interconnection Structures App 20080122090 - Hsu; Louis Lu-Chen ; et al.	2008-05-29
Interconnect Structures with Improved Electromigration Resistance and Methods for Forming Such Interconnect Structures App 20080116582 - Hsu; Louis Lu-Chen ; et al.	2008-05-22
Design Structures Incorporating Interconnect Structures with Improved Electromigration Resistance App 20080120580 - Hsu; Louis Lu-Chen ; et al.	2008-05-22
Semiconductor Constructions And Semiconductor Device Fabrication Methods App 20080105969 - Hsu; Louis L. C. ; et al.	2008-05-08
Triple-well CMOS devices with increased latch-up immunity and methods of fabricating same Grant 7,358,573 - Cecchi , et al. April 15, 2	2008-04-15
Crystal imprinting methods for fabricating substrates with thin active silicon layers Grant 7,358,164 - Hsu , et al. April 15, 2	2008-04-15
Method For Fabricating And Beol Interconnect Structures With Simultaneous Formation Of High-k And Low-k Dielectric Regions App 20080079172 - Hsu; Louis Lu-Chen ; et al.	2008-04-03
Semiconductor structures integrating damascene-body FinFET's and planar devices on a common substrate and methods for forming such semiconductor structures Grant 7,352,034 - Booth, Jr. , et al. April 1, 2	2008-04-01
Method for fabricating and BEOL interconnect structures with simultaneous formation of high-k and low-k dielectric regions Grant 7,348,280 - Hsu , et al. March 25, 2	2008-03-25
Reduced-resistance Finfets By Sidewall Silicidation And Methods Of Manufacturing The Same App 20080054349 - Cheng; Kangguo ; et al.	2008-03-06
Dielectric Material With A Reduced Dielectric Constant And Methods Of Manufacturing The Same App 20080054487 - Hsu; Louis Lu-chen ; et al.	2008-03-06
Semiconductor Structures For Latch-up Suppression And Methods Of Forming Such Semiconductor Structures App 20080057671 - Furukawa; Toshiharu ; et al.	2008-03-06
Design Structures Incorporating Interconnect Structures with Liner Repair Layers App 20080059924 - Hsu; Louis Lu-Chen ; et al.	2008-03-06
Method for Reducing Defects in Buried Oxide Layers of Silicon on Insulator Substrates App 20080048259 - Cheng; Kangguo ; et al.	2008-02-28
Design Structures Incorporating Semiconductor Device Structures with Self-Aligned Doped Regions App 20080048186 - Cheng; Kangguo ; et al.	2008-02-28
High-voltage Silicon-on-insulator Transistors And Methods Of Manufacturing The Same App 20080048263 - Ma; William Hsioh-Lien ; et al.	2008-02-28
Semiconductor Structures Integrating Damascene-body Finfet's And Planar Devices On A Common Substrate And Methods For Forming Such Semiconductor Structures App 20080048265 - Booth; Roger Allen JR. ; et al.	2008-02-28
Semiconductor Finfet Structures With Encapsulated Gate Electrodes And Methods For Forming Such Semiconductor Finfet Structures App 20080048268 - Hsu; Louis Lu-Chen ; et al.	2008-02-28
Semiconductor Structures Integrating Damascene-body Finfet's And Planar Devices On A Common Substrate And Methods For Forming Such Semiconductor Structures App 20080050866 - Booth; Roger Allen JR. ; et al.	2008-02-28
Hybrid Oriented Substrates And Crystal Imprinting Methods For Forming Such Hybrid Oriented Substrates App 20080050890 - Hsu; Louis Lu-Chen ; et al.	2008-02-28
Semiconductor Structures With Body Contacts And Fabrication Methods Thereof App 20080050873 - Cheng; Kangguo ; et al.	2008-02-28
Semiconductor constructions and semiconductor device fabrication methods Grant 7,335,575 - Hsu , et al. February 26, 2	2008-02-26
Method and apparatus for making coplanar isolated regions of different semiconductor materials on a substrate Grant 7,335,599 - Chen , et al. February 26, 2	2008-02-26
Body-contacted Semiconductor Structures And Methods Of Fabricating Such Body-contacted Semiconductor Structures App 20080044959 - Cheng; Kangguo ; et al.	2008-02-21
finFET Device App 20080042219 - Booth; Roger Allen JR. ; et al.	2008-02-21
Methods For Fabricating A Semiconductor Structure Using A Mandrel And Semiconductor Structures Formed Thereby App 20080042204 - Cheng; Kangguo ; et al.	2008-02-21
Design Structure Incorporating Semiconductor Device Structures with Voids App 20080040697 - Chidambarrao; Dureseti ; et al.	2008-02-14
E-Fuse and Method for Fabricating E-Fuses Integrating Polysilicon Resistor Masks App 20080029843 - Booth; Roger Allen JR. ; et al.	2008-02-07
Design Structures Incorporating Semiconductor Device Structures with Reduced Junction Capacitance and Drain Induced Barrier Lowering App 20080034335 - Cheng; Kangguo ; et al.	2008-02-07
Fuse/anti-fuse structure and methods of making and programming same App 20080017858 - Hsu; Louis C. ; et al.	2008-01-24
Semiconductor Device Structures for Bipolar Junction Transistors and Methods of Fabricating Such Structures App 20080003757 - Cheng; Kangguo ; et al.	2008-01-03
Hybrid Field Effect Transistor and Bipolar Junction Transistor Structures and Methods for Fabricating Such Structures App 20080001234 - Cheng; Kangguo ; et al.	2008-01-03
Bulk FinFET Device App 20080001187 - Booth; Roger Allen ; et al.	2008-01-03
Semiconductor Device Structures Incorporating Voids and Methods of Fabricating Such Structures App 20070296039 - Chidambarrao; Dureseti ; et al.	2007-12-27
E-fuse And Method For Fabricating E-fuses Integrating Polysilicon Resistor Masks App 20070262413 - Booth; Roger Allen JR. ; et al.	2007-11-15
Method and structure to reduce contact resistance on thin silicon-on-insulator device App 20070254464 - Greene; Brian J. ; et al.	2007-11-01
Semiconductor Device Structures With Reduced Junction Capacitance And Drain Induced Barrier Lowering And Methods For Fabricating Such Device Structures And For Fabricating A Semiconductor-on-insulator Substrate App 20070246752 - Cheng; Kangguo ; et al.	2007-10-25
Semiconductor Structures For Latch-up Suppression And Methods Of Forming Such Semiconductor Structures App 20070241409 - Furukawa; Toshiharu ; et al.	2007-10-18
Well Isolation Trenches (wit) For Cmos Devices App 20070241408 - Furukawa; Toshiharu ; et al.	2007-10-18
Semiconductor device structures with self-aligned doped regions and methods for forming such semiconductor device structures App 20070235833 - Cheng; Kangguo ; et al.	2007-10-11
Intrinsic dual gate oxide MOSFET using a damascene gate process Grant 7,276,775 - Bertin , et al. October 2, 2	2007-10-02
Semiconductor structures for latch-up suppression and methods of forming such semiconductor structures Grant 7,276,768 - Furukawa , et al. October 2, 2	2007-10-02
Triple-well CMOS devices with increased latch-up immunity and methods of fabricating same Grant 7,268,400 - Cecchi , et al. September 11, 2	2007-09-11
Well isolation trenches (WIT) for CMOS devices Grant 7,268,028 - Furukawa , et al. September 11, 2	2007-09-11
Programmable anti-fuse structures, methods for fabricating programmable anti-fuse structures, and methods of programming anti-fuse structures App 20070205485 - Hsu; Louis Lu-Chen ; et al.	2007-09-06
Methods and apparatus for testing an integrated circuit Grant 7,265,696 - Hsu , et al. September 4, 2	2007-09-04
Methods for fabricating semiconductor device structures with reduced susceptibility to latch-up and semiconductor device structures formed by the methods App 20070194403 - Cannon; Ethan Harrison ; et al.	2007-08-23
Semiconductor constructions and semiconductor device fabrication methods App 20070184581 - Hsu; Louis L. C. ; et al.	2007-08-09
High-voltage silicon-on-insulator transistors and methods of manufacturing the same App 20070182030 - Ma; William Hsioh-Lien ; et al.	2007-08-09
Triple-well Cmos Devices With Increased Latch-up Immunity And Methods Of Fabricating Same App 20070178639 - Cecchi; Delbert R. ; et al.	2007-08-02
Methods and semiconductor structures for latch-up suppression using a conductive region App 20070170543 - Furukawa; Toshiharu ; et al.	2007-07-26
Semiconductor structures for latch-up suppression and methods of forming such semiconductor structures App 20070170518 - Furukawa; Toshiharu ; et al.	2007-07-26
Method for fabricating high performance metal-insulator-metal capacitor (MIMCAP) App 20070173029 - Abadeer; Wagdi William ; et al.	2007-07-26
Triple-well Cmos Devices With Increased Latch-up Immunity And Methods Of Fabricating Same App 20070170516 - Cecchi; Delbert R. ; et al.	2007-07-26
PFETS and methods of manufacturing the same App 20070166890 - Cheng; Kangguo ; et al.	2007-07-19
Methods and semiconductor structures for latch-up suppression using a buried conductive region App 20070158755 - Chang; Shunhua Thomas ; et al.	2007-07-12
Methods and semiconductor structures for latch-up suppression using a buried damage layer App 20070158779 - Cannon; Ethan Harrison ; et al.	2007-07-12
Reduced-resistance finFETs and methods of manufacturing the same App 20070148836 - Cheng; Kangguo ; et al.	2007-06-28
Method and apparatus for implementing enhanced hand shake protocol in microelectronic comunication systems App 20070111699 - Hsu; Louis Lu-Chen ; et al.	2007-05-17
Methods and apparatus for testing an integrated circuit App 20070103350 - Hsu; Louis Lu-Chen ; et al.	2007-05-10
Methods for forming semiconductor structures with buried isolation collars and semiconductor structures formed by these methods App 20070099391 - Cheng; Kangguo ; et al.	2007-05-03
Method for fabricating and BEOL interconnect structures with simultaneous formation of high-k and low-k dielectric regions App 20070096319 - Hsu; Louis Lu-Chen ; et al.	2007-05-03
Methods for forming germanium-on-insulator semiconductor structures using a porous layer and semiconductor structures formed by these methods App 20070093036 - Cheng; Kangguo ; et al.	2007-04-26
Method and apparatus for making coplanar isolated regions of different semiconductor materials on a substrate App 20070087525 - Chen; Howard Hao ; et al.	2007-04-19
Methods for fabricating a semiconductor structure using a mandrel and semiconductor structures formed thereby App 20070082437 - Cheng; Kangguo ; et al.	2007-04-12
Semiconductor FinFET structures with encapsulated gate electrodes and methods for forming such semiconductor FinFET structures App 20070057325 - Hsu; Louis Lu-Chen ; et al.	2007-03-15
Ferromagnetic memory cell and methods of making and using the same App 20070045686 - Cheng; Kangguo ; et al.	2007-03-01
Body-contacted semiconductor structures and methods of fabricating such body-contacted semiconductor structures App 20070045697 - Cheng; Kangguo ; et al.	2007-03-01
Semiconductor structures with body contacts and fabrication methods thereof App 20070045698 - Cheng; Kangguo ; et al.	2007-03-01
Semiconductor structures integrating damascene-body FinFET's and planar devices on a common substrate and methods for forming such semiconductor structures App 20070045748 - Booth; Roger Allen JR. ; et al.	2007-03-01
Method and apparatus for making coplanar dielectrically-isolated regions of different semiconductor materials on a substrate App 20070048975 - Chen; Howard Hao ; et al.	2007-03-01
Crystal imprinting methods for fabricating subsrates with thin active silicon layers App 20060286781 - Hsu; Louis Lu-Chen ; et al.	2006-12-21
Hybrid oriented substrates and crystal imprinting methods for forming such hybrid oriented substrates App 20060284250 - Hsu; Louis Lu-Chen ; et al.	2006-12-21
Capacitor reliability for multiple-voltage power supply systems Grant 7,113,006 - Hsu , et al. September 26, 2	2006-09-26
Capacitor reliability for multiple-voltage power supply systems App 20060192612 - Hsu; Louis L. ; et al.	2006-08-31
Structure and method of vertical transistor DRAM cell having a low leakage buried strap Grant 6,979,851 - Chidambarrao , et al. December 27, 2	2005-12-27
Self-aligned, planarized thin-film transistors, devices employing the same, and methods of fabrication thereof Grant 6,818,487 - Hsu , et al. November 16, 2	2004-11-16
High performance logic and high density embedded dram with borderless contact and antispacer App 20040075111 - Chidambarrao, Dureseti ; et al.	2004-04-22
Structure and method of vertical transistor DRAM cell having a low leakage buried strap App 20040066666 - Chidambarrao, Dureseti ; et al.	2004-04-08
High performance logic and high density embedded dram with borderless contact and antispacer Grant 6,709,926 - Chidambarrao , et al. March 23, 2	2004-03-23
Self-aligned, planarized thin-film transistors, devices employing the same, and methods of fabrication thereof App 20040023449 - Hsu, Louis L. ; et al.	2004-02-05
Method and structure for salicide trench capacitor plate electrode Grant 6,664,161 - Chudzik , et al. December 16, 2	2003-12-16
High Performance Logic And High Density Embedded Dram With Borderless Contact And Antispacer App 20030224573 - Chidambarrao, Dureseti ; et al.	2003-12-04
Self-aligned, planarized thin-film transistors, devices employing the same Grant 6,649,935 - Hsu , et al. November 18, 2	2003-11-18
Method And Structure For Salicide Trench Capacitor Plate Electrode App 20030207532 - Chudzik, Michael Patrick ; et al.	2003-11-06
Intrinsic dual gate oxide mosfet using a damascene gate process App 20030109090 - Bertin, Claude Louis ; et al.	2003-06-12
Intrinsic dual gate oxide MOSFET using a damascene gate process Grant 6,531,410 - Bertin , et al. March 11, 2	2003-03-11
Semiconductor integrated circuits Grant 6,512,275 - Hsu , et al. January 28, 2	2003-01-28
Intrinsic dual gate oxide MOSFET using a damascene gate process App 20020119637 - Bertin, Claude Louis ; et al.	2002-08-29
Deep trench cell capacitor with inverting counter electrode Grant 6,265,278 - Alsmeier , et al. July 24, 2	2001-07-24
Switched body SOI (silicon on insulator) circuits and fabrication method therefor Grant 6,239,649 - Bertin , et al. May 29, 2	2001-05-29
Process for forming a memory structure that includes NVRAM, DRAM, and/or SRAM memory structures on one substrate and process for forming a new NVRAM cell structure Grant 6,232,173 - Hsu , et al. May 15, 2	2001-05-15
Pillar transistor incorporating a body contact Grant 6,204,532 - Gambino , et al. March 20, 2	2001-03-20
Transistor having substantially isolated body and method of making the same Grant 6,177,299 - Hsu , et al. January 23, 2	2001-01-23
Method of controllably forming a LOCOS oxide layer over a portion of a vertically extending sidewall of a trench extending into a semiconductor substrate Grant 6,153,474 - Ho , et al. November 28, 2	2000-11-28
Silicon-on-insulator structure for electrostatic discharge protection and improved heat dissipation Grant 6,121,661 - Assaderaghi , et al. September 19, 2	2000-09-19
Wire shape conferring reduced crosstalk and formation methods Grant 6,110,824 - Licata , et al. August 29, 2	2000-08-29
Threshold voltage tailoring of corner of MOSFET device Grant 6,084,276 - Gambino , et al. July 4, 2	2000-07-04
DRAM cell with transfer device extending along perimeter of trench storage capacitor Grant 6,037,620 - Hoenigschmid , et al. March 14, 2	2000-03-14
Low voltage active body semiconductor device Grant 5,998,847 - Assaderaghi , et al. December 7, 1	1999-12-07
Threshold voltage tailoring of the corner of a MOSFET device Grant 5,994,202 - Gambino , et al. November 30, 1	1999-11-30
Structure for low cost mixed memory integration, new NVRAM structure, and process for forming the mixed memory and NVRAM structure Grant 5,880,991 - Hsu , et al. March 9, 1	1999-03-09
Methods for reducing anomalous narrow channel effect in trench-bounded buried-channel p-MOSFETS Grant 5,858,825 - Alsmeier , et al. January 12, 1	1999-01-12
Trench storage dram cell including a step transfer device Grant 5,831,301 - Horak , et al. November 3, 1	1998-11-03
Trench isolated FET devices, and method for their manufacture Grant 5,798,553 - Furukawa , et al. August 25, 1	1998-08-25
Deep trench cell capacitor with inverting counter electrode Grant 5,793,075 - Alsmeier , et al. August 11, 1	1998-08-11
Optical FET Grant 5,789,276 - Leas , et al. August 4, 1	1998-08-04
Vertical double-gate field effect transistor Grant 5,780,327 - Chu , et al. July 14, 1	1998-07-14
Lateral field emission devices for display elements and methods of fabrication Grant 5,751,097 - Mandelman , et al. May 12, 1	1998-05-12
Non-evacuated lateral fed employing emitter-anode spacing less than mean free path distance of an electron in air Grant 5,736,810 - Mandelman , et al. April 7, 1	1998-04-07
Wire shape conferring reduced crosstalk and formation methods Grant 5,726,498 - Licata , et al. March 10, 1	1998-03-10
Vertical double-gate field effect transistor Grant 5,689,127 - Chu , et al. November 18, 1	1997-11-18
Method of making contacted body silicon-on-insulator field effect transistor Grant 5,670,388 - Machesney , et al. September 23, 1	1997-09-23