Mallela; Hari
Patent Applications and Registrations
Patent applications and USPTO patent grants for Mallela; Hari.The latest application filed is for "stacked resistive random access memory with integrated access transistor and high density layout".
- Mallela; Hari - Poughquag NY
| Patent | Date |
|---|---|
| Nanowire enabled substrate bonding and electrical contact formation Grant 10,833,048 - Hung , et al. November 10, 2 | 2020-11-10 |
| Multi-threshold vertical FETs with common gates Grant 10,811,413 - Ando , et al. October 20, 2 | 2020-10-20 |
| Stacked Resistive Random Access Memory With Integrated Access Transistor And High Density Layout App 20200312912 - VEGA; REINALDO ; et al. | 2020-10-01 |
| Stacked resistive random access memory with integrated access transistor and high density layout Grant 10,770,512 - Vega , et al. Sep | 2020-09-08 |
| Rram Crossbar Array Structure For Multi-task Learning App 20200143233 - Ando; Takashi ; et al. | 2020-05-07 |
| Multi-threshold Vertical Fets With Common Gates App 20200051979 - Ando; Takashi ; et al. | 2020-02-13 |
| Nanowire Enabled Substrate Bonding And Electrical Contact Formation App 20190319006 - HUNG; Li-Wen ; et al. | 2019-10-17 |
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