loadpatents
name:-0.018244981765747
name:-0.033797979354858
name:-0.001600980758667
Ma; Diana Xiaobing Patent Filings

Ma; Diana Xiaobing

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ma; Diana Xiaobing.The latest application filed is for "non-permeable substrate carrier for electroplating".

Company Profile
1.29.13
  • Ma; Diana Xiaobing - Saratoga CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Non-permeable substrate carrier for electroplating
Grant 11,280,019 - Abas , et al. March 22, 2
2022-03-22
Non-permeable Substrate Carrier For Electroplating
App 20190301046 - ABAS; Emmanuel Chua ;   et al.
2019-10-03
Maintainable substrate carrier for electroplating
Grant RE46,088 - Chen , et al. August 2, 2
2016-08-02
Non-permeable Substrate Carrier For Electroplating
App 20160108541 - ABAS; Emmanuel Chua ;   et al.
2016-04-21
Non-permeable substrate carrier for electroplating
Grant 9,222,193 - Abas , et al. December 29, 2
2015-12-29
Non-permeable Substrate Carrier For Electroplating
App 20140034488 - ABAS; Emmanuel Chua ;   et al.
2014-02-06
Non-permeable substrate carrier for electroplating
Grant 8,317,987 - Abas , et al. November 27, 2
2012-11-27
Maintainable substrate carrier for electroplating
Grant 8,221,601 - Chen , et al. July 17, 2
2012-07-17
Non-Permeable Substrate Carrier For Electroplating
App 20120073974 - ABAS; Emmanuel Chua ;   et al.
2012-03-29
Maintainable substrate carrier for electroplating
App 20120073976 - CHEN; Chen-An ;   et al.
2012-03-29
Methods Of Trimming Amorphous Carbon Film For Forming Ultra Thin Structures On A Substrate
App 20090004875 - Shen; Meihua ;   et al.
2009-01-01
CMOS S/D SiGe DEVICE MADE WITH ALTERNATIVE INTEGRATION PROCESS
App 20070284668 - Shen; Meihua ;   et al.
2007-12-13
ALTERNATIVE INTEGRATION SCHEME FOR CMOS S/D SiGe PROCESS
App 20070287244 - Shen; Meihua ;   et al.
2007-12-13
System level in-situ integrated dielectric etch process particularly useful for copper dual damascene
Grant 6,949,203 - Hsieh , et al. September 27, 2
2005-09-27
Plasma chamber having multiple RF source frequencies
App 20050106873 - Hoffman, Daniel J. ;   et al.
2005-05-19
Monitoring dimensions of features at different locations in the processing of substrates
Grant 6,829,056 - Barnes , et al. December 7, 2
2004-12-07
Method for reducing topography dependent charging effects in a plasma enhanced semiconductor wafer processing system
Grant 6,635,577 - Yamartino , et al. October 21, 2
2003-10-21
Method and apparatus for asymmetric gas distribution in a semiconductor wafer processing system
Grant 6,620,289 - Yan , et al. September 16, 2
2003-09-16
System level in-situ integrated dielectric etch process particularly useful for copper dual damascene
App 20030164354 - Hsieh, Chang-Lin ;   et al.
2003-09-04
Method of heating a semiconductor substrate
Grant 6,547,978 - Ye , et al. April 15, 2
2003-04-15
Method for etching low k dielectrics
Grant 6,547,977 - Yan , et al. April 15, 2
2003-04-15
Control of patterned etching in semiconductor features
Grant 6,534,416 - Ye , et al. March 18, 2
2003-03-18
Integrated system for oxide etching and metal liner deposition
App 20030027427 - Ma, Diana Xiaobing ;   et al.
2003-02-06
Etched patterned copper features free from etch process residue
Grant 6,488,862 - Ye , et al. December 3, 2
2002-12-03
Copper etch using HCl and HBR chemistry
Grant 6,489,247 - Ye , et al. December 3, 2
2002-12-03
Method and apparatus for forming metal interconnects
App 20020058408 - Maydan, Dan ;   et al.
2002-05-16
Method of heating a semiconductor substrate
App 20020045354 - Ye, Yan ;   et al.
2002-04-18
Method of pattern etching a low K dielectric layer
Grant 6,331,380 - Ye , et al. December 18, 2
2001-12-18
RF plasma reactor with hybrid conductor and multi-radius dome ceiling
Grant 6,248,250 - Hanawa , et al. June 19, 2
2001-06-19
Plasma reactor having a helicon wave high density plasma source
Grant 6,189,484 - Yin , et al. February 20, 2
2001-02-20
Post-etch treatment of plasma-etched feature surfaces to prevent corrosion
Grant 6,153,530 - Ye , et al. November 28, 2
2000-11-28
Method for high temperature etching of patterned layers using an organic mask stack
Grant 6,143,476 - Ye , et al. November 7, 2
2000-11-07
Method of etching patterned layers useful as masking during subsequent etching or for damascene structures
Grant 6,080,529 - Ye , et al. June 27, 2
2000-06-27
Inductively and multi-capacitively coupled plasma reactor
Grant 6,020,686 - Ye , et al. February 1, 2
2000-02-01
Patterned copper etch for micron and submicron features, using enhanced physical bombardment
Grant 6,010,603 - Ye , et al. January 4, 2
2000-01-04
Process for copper etch back
Grant 5,968,847 - Ye , et al. October 19, 1
1999-10-19
Process gas focusing apparatus and method
Grant 5,891,348 - Ye , et al. April 6, 1
1999-04-06
RF plasma reactor with cleaning electrode for cleaning during processing of semiconductor wafers
Grant 5,817,534 - Ye , et al. October 6, 1
1998-10-06
Plasma process for etching multicomponent alloys
Grant 5,779,926 - Ma , et al. July 14, 1
1998-07-14
RF plasma reactor with hybrid conductor and multi-radius dome ceiling
Grant 5,777,289 - Hanawa , et al. July 7, 1
1998-07-07
Method and apparatus for cleaning by-products from plasma chamber surfaces
Grant 5,756,400 - Ye , et al. May 26, 1
1998-05-26
Inductively and multi-capacitively coupled plasma reactor
Grant 5,710,486 - Ye , et al. January 20, 1
1998-01-20

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed