Lv; Yukun

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lv; Yukun.The latest application filed is for "method for forming high aspect ratio patterning structure".

Company Profile

0.10.12

Lv; Yukun - Shanghai CN

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Simulation method of CMP process Grant 10,083,266 - Cao , et al. September 25, 2	2018-09-25
Method for forming high aspect ratio patterning structure Grant 9,991,116 - Liu , et al. June 5, 2	2018-06-05
Method For Forming High Aspect Ratio Patterning Structure App 20180144929 - Liu; Peng ; et al.	2018-05-24
Simulation Method Of Cmp Process App 20180032648 - Cao; Yun ; et al.	2018-02-01
Method For Forming Shallow Trenches Of The Dual Active Regions App 20180033810 - Jing; Quan ; et al.	2018-02-01
Method for forming shallow trenches of the dual active regions Grant 9,871,064 - Jing , et al. January 16, 2	2018-01-16
Method of etching a shallow trench Grant 9,842,743 - Xu , et al. December 12, 2	2017-12-12
Method for establishing mapping relation in STI etch and controlling critical dimension of STI Grant 9,666,472 - Xu , et al. May 30, 2	2017-05-30
Method For Establishing Mapping Relation In Sti Etch And Controlling Critical Dimension Of Sti App 20170025304 - Xu; Jin ; et al.	2017-01-26
Method Integrating Target Optimization And Optical Proximity Correction App 20160291458 - He; Daquan ; et al.	2016-10-06
Method for etching polysilicon gate Grant 8,900,887 - Tang , et al. December 2, 2	2014-12-02
Method For Etching Polysilicon Gate App 20140106475 - TANG; Zaifeng ; et al.	2014-04-17
High voltage bipolar transistor with pseudo buried layers Grant 8,674,480 - Chiu , et al. March 18, 2	2014-03-18
Method for reducing morphological difference between N-doped and undoped polysilicon gates after etching Grant 8,658,502 - Tang , et al. February 25, 2	2014-02-25
Method For Reducing Morphological Difference Between N-doped And Undoped Polysilicon Gates After Etching App 20130316539 - TANG; Zaifeng ; et al.	2013-11-28
High Voltage Bipolar Transistor with Pseudo Buried Layers App 20110140239 - CHIU; Tzuyin ; et al.	2011-06-16

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