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name:-0.02311897277832
name:-0.010464906692505
name:-0.00046110153198242
Loiko; Konstantin V. Patent Filings

Loiko; Konstantin V.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Loiko; Konstantin V..The latest application filed is for "split gate device with doped region and method therefor".

Company Profile
0.34.31
  • Loiko; Konstantin V. - Austin TX
  • Loiko; Konstantin V - Austin TX
  • Loiko; Konstantin V. - Atstin TX
  • Loiko; Konstantin V. - Singapore SG
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Split gate device with doped region and method therefor
Grant 10,026,820 - Chen , et al. July 17, 2
2018-07-17
Method of forming split gate memory with improved reliability
Grant 9,847,397 - Hong , et al. December 19, 2
2017-12-19
Split Gate Device With Doped Region And Method Therefor
App 20170278937 - CHEN; WEIZE ;   et al.
2017-09-28
Method of making a non-volatile memory (NVM) with trap-up reduction
Grant 9,548,314 - Hong , et al. January 17, 2
2017-01-17
Method Of Forming Split Gate Memory With Improved Reliability
App 20160300919 - HONG; Cheong Min ;   et al.
2016-10-13
Method of forming split gate memory with improved reliability
Grant 9,397,176 - Hong , et al. July 19, 2
2016-07-19
Method of making a split gate non-volatile memory (NVM) cell
Grant 9,379,222 - Winstead , et al. June 28, 2
2016-06-28
Split gate nanocrystal memory integration
Grant 9,343,314 - Loiko , et al. May 17, 2
2016-05-17
Split-gate non-volatile memory cells having gap protection zones
Grant 9,331,160 - Loiko , et al. May 3, 2
2016-05-03
Method of making a split gate non-volatile memory (NVM) cell and a logic transistor
Grant 9,257,445 - Loiko , et al. February 9, 2
2016-02-09
Method Of Forming Split Gate Memory With Improved Reliability
App 20160035848 - Hong; Cheong Min ;   et al.
2016-02-04
Method Of Making A Split Gate Non-volatile Memory (nvm) Cell
App 20150349096 - WINSTEAD; BRIAN A. ;   et al.
2015-12-03
Method Of Making A Split Gate Non-volatile Memory (nvm) Cell And A Logic Transistor
App 20150348985 - LOIKO; KONSTANTIN V. ;   et al.
2015-12-03
Split Gate Nanocrystal Memory Integration
App 20150348786 - LOIKO; KONSTANTIN V. ;   et al.
2015-12-03
Memory with discrete storage elements
Grant 9,202,930 - Loiko , et al. December 1, 2
2015-12-01
Split gate nanocrystal memory integration
Grant 9,111,867 - Loiko , et al. August 18, 2
2015-08-18
Split Gate Nanocrystal Memory Integration
App 20150060989 - Loiko; Konstantin V. ;   et al.
2015-03-05
Split-Gate Non-Volatile Memory Cells Having Gap Protection Zones
App 20150054048 - Loiko; Konstantin V. ;   et al.
2015-02-26
Transistors with different threshold voltages
Grant 8,962,410 - Zhang , et al. February 24, 2
2015-02-24
Split gate non-volatile memory cell
Grant 8,962,416 - Winstead , et al. February 24, 2
2015-02-24
Split Gate Non-volatile Memory Cell
App 20150035034 - WINSTEAD; BRIAN A. ;   et al.
2015-02-05
Shallow Trench Isolation For Soi Structures Combining Sidewall Spacer And Bottom Liner
App 20140299935 - Loiko; Konstantin V. ;   et al.
2014-10-09
Shallow trench isolation for SOI structures combining sidewall spacer and bottom liner
Grant 8,766,362 - Loiko , et al. July 1, 2
2014-07-01
Method of forming a semiconductor device featuring a gate stressor and semiconductor device
Grant 8,587,039 - Winstead , et al. November 19, 2
2013-11-19
Transistors With Different Threshold Voltages
App 20130109141 - Zhang; Da ;   et al.
2013-05-02
Memory With Discrete Storage Elements
App 20120292683 - Loiko; Konstantin V. ;   et al.
2012-11-22
Shallow Trench Isolation For Soi Structures Combining Sidewall Spacer And Bottom Liner
App 20120273889 - LOIKO; Konstantin V. ;   et al.
2012-11-01
Shallow trench isolation for SOI structures combining sidewall spacer and bottom liner
Grant 8,236,638 - Loiko , et al. August 7, 2
2012-08-07
Split-gate non-volatile memory cell and method
Grant 8,035,156 - Winstead , et al. October 11, 2
2011-10-11
Method Of Forming A Semiconductor Device Featuring A Gate Stressor And Semiconductor Device
App 20110220975 - Winstead; Brian A. ;   et al.
2011-09-15
Method of making a semiconductor structure useful in making a split gate non-volatile memory cell
Grant 7,985,649 - Winstead , et al. July 26, 2
2011-07-26
Method Of Making A Semiconductor Structure Useful In Making A Split Gate Non-volatile Memory Cell
App 20110165749 - Winstead; Brian A. ;   et al.
2011-07-07
Method of forming a semiconductor device featuring a gate stressor and semiconductor device
Grant 7,960,243 - Winstead , et al. June 14, 2
2011-06-14
Method for making a stressed non-volatile memory device
Grant 7,960,267 - Loiko , et al. June 14, 2
2011-06-14
Stressed semiconductor device and method for making
Grant 7,821,055 - Loiko , et al. October 26, 2
2010-10-26
Split-gate thin film storage NVM cell with reduced load-up/trap-up effects
Grant 7,811,886 - Winstead , et al. October 12, 2
2010-10-12
Method For Making A Stressed Non-volatile Memory Device
App 20100248466 - Loiko; Konstantin V. ;   et al.
2010-09-30
Stressed Semiconductor Device And Method For Making
App 20100244121 - Loiko; Konstantin V. ;   et al.
2010-09-30
Method for making a transistor with a stressor
Grant 7,799,650 - Bo , et al. September 21, 2
2010-09-21
Split-gate Non-volatile Memory Cell And Method
App 20100078703 - Winstead; Brian A. ;   et al.
2010-04-01
Method for selective removal of a layer
Grant 7,521,314 - Jawarani , et al. April 21, 2
2009-04-21
Method For Making A Transistor With A Stressor
App 20090042351 - Bo; Xiangzheng ;   et al.
2009-02-12
Method Of Forming A Semiconductor Device Featuring A Gate Stressor And Semiconductor Device
App 20080299717 - Winstead; Brian A. ;   et al.
2008-12-04
Shallow trench isolation for SOI structures combining sidewall spacer and bottom liner
App 20080261361 - Loiko; Konstantin V. ;   et al.
2008-10-23
Method For Selective Removal Of A Layer
App 20080261385 - Jawarani; Dharmesh ;   et al.
2008-10-23
Split-gate thin film storage NVM cell with reduced load-up/trap-up effects
App 20080188052 - Winstead; Brian A. ;   et al.
2008-08-07
Dislocation free local oxidation of silicon with suppression of narrow space field oxide thinning effect
Grant 5,894,059 - Peidous , et al. April 13, 1
1999-04-13

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