Liu; Kun-Yi

Patent Applications and Registrations

Patent applications and USPTO patent grants for Liu; Kun-Yi.The latest application filed is for "defect free deep trench method for semiconductor chip".

Company Profile

0.8.5

Liu; Kun-Yi - Vancouver WA US
Liu; Kun-Yi - Tainan TW
Liu; Kun-Yi - Tainan Shien TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Defect free deep trench method for semiconductor chip Grant 8,951,833 - Liu February 10, 2	2015-02-10
Defect Free Deep Trench Method For Semiconductor Chip App 20120322259 - Liu; Kun-Yi	2012-12-20
High throughput wafer stage design for optical lithography exposure apparatus Grant 7,659,965 - Liu February 9, 2	2010-02-09
Method and software for conducting efficient lithography WPH / lost time analysis in semiconductor manufacturing Grant 7,489,982 - Liu , et al. February 10, 2	2009-02-10
High throughput wafer stage design for optical lithography exposure apparatus App 20080084550 - Liu; Kun-Yi	2008-04-10
Method and software for conducting efficient lithography WPH / lost time analysis in semiconductor manufacturing App 20080071405 - Liu; Kun-Yi ; et al.	2008-03-20
Verification photomask Grant 6,824,931 - Liu , et al. November 30, 2	2004-11-30
Dielectric ARC scheme to improve photo window in dual damascene process Grant 6,664,177 - Lin , et al. December 16, 2	2003-12-16
Optical proximity correction verification mask Grant 6,602,642 - Liu , et al. August 5, 2	2003-08-05
Wafer's zero-layer and alignment mark print without mask when using scanner Grant 6,602,641 - Liu August 5, 2	2003-08-05
Optical proximity correction verification mask App 20030044692 - Liu, Kun-Yi ; et al.	2003-03-06
Verification photomask App 20030044696 - Liu, Kun-Yi ; et al.	2003-03-06

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