Liu; Huang

Patent Applications and Registrations

Patent applications and USPTO patent grants for Liu; Huang.The latest application filed is for "semiconductor device and fabrication method thereof".

Company Profile

10.97.112

Liu; Huang - Mechanicville NY
LIU; Huang - Chengdu CN
Liu; Huang - Beijing CN
Liu; Huang - Singapore SG
LIU; Huang - Shenzhen CN
Liu; Huang - Malta NY
Liu; Huang - Halfmoon NY
Liu; Huang - Saingapore SG
Liu, Huang - Wu-Ryh Country TW
Liu, Huang - Wu-Ryh TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Trademarks

Patent Activity

Patent	Date
Semiconductor device for a volatile memory and method of manufacturing semiconductor device Grant 11,244,947 - Zhang , et al. February 8, 2	2022-02-08
Semiconductor device and fabrication method thereof Grant 11,049,862 - Zhang , et al. June 29, 2	2021-06-29
Semiconductor Device And Fabrication Method Thereof App 20210118888 - Zhang; John ; et al.	2021-04-22
Device with large EPI in FinFETs and method of manufacturing Grant 10,910,471 - Peng , et al. February 2, 2	2021-02-02
Method for forming a metal gate including de-oxidation of an oxidized surface of the metal gate utilizing a reducing agent Grant 10,854,472 - Liu , et al. December 1, 2	2020-12-01
Method For Evaluating Difference In Gas Injection Effect Of Gas Injection Wells In Carbonate Reservoir App 20200340356 - HU; Yisheng ; et al.	2020-10-29
Direct method for manufacturing large model fractured core and maintaining original oil-water saturation Grant 10,746,638 - Guo , et al. A	2020-08-18
Capping structure Grant 10,559,470 - Huang , et al. Feb	2020-02-11
Device With Large Epi In Finfets And Method Of Manufacturing App 20200020769 - PENG; Jianwei ; et al.	2020-01-16
Manufacturing method of big-model low-permeability microcrack core Grant 10,364,184 - Guo , et al. July 30, 2	2019-07-30
Capping Structure App 20190228976 - HUANG; Haigou ; et al.	2019-07-25
Self-aligned Gate Isolation App 20190139830 - XIE; Ruilong ; et al.	2019-05-09
Composite method of trapping carbon dioxide in gas mixture Grant 10,173,167 - Chen , et al. J	2019-01-08
Manufacturing Method of Big-model Low-Permeability Microcrack Core App 20190002344 - GUO; Ping ; et al.	2019-01-03
Direct Method For Manufacturing Large Model Fractured Core And Maintaining Original Oil-water Saturation App 20180348105 - GUO; Ping ; et al.	2018-12-06
CD control Grant 10,103,097 - Zou , et al. October 16, 2	2018-10-16
Siloxane and organic-based MOL contact patterning Grant 10,056,458 - Maeng , et al. August 21, 2	2018-08-21
Through silicon via device having low stress, thin film gaps and methods for forming the same Grant 10,043,764 - Liu , et al. August 7, 2	2018-08-07
Methods For Forming Mask Layers Using A Flowable Carbon-containing Silicon Dioxide Material App 20180005893 - Cao; Huy ; et al.	2018-01-04
Controlling Within-die Uniformity Using Doped Polishing Material App 20170338226 - Huang; Haigou ; et al.	2017-11-23
Resource Processing Method and Device for Multi-controller System App 20170308469 - LIU; Huang ; et al.	2017-10-26
Methods for forming mask layers using a flowable carbon-containing silicon dioxide material Grant 9,793,169 - Cao , et al. October 17, 2	2017-10-17
Controlling within-die uniformity using doped polishing material Grant 9,754,837 - Huang , et al. September 5, 2	2017-09-05
Siloxane And Organic-based Mol Contact Patterning App 20170200792 - MAENG; Chang Ho ; et al.	2017-07-13
Composite Method Of Trapping Carbon Dioxide In Gas Mixture App 20170173518 - Chen; Guangjin ; et al.	2017-06-22
Methods For Producing Integrated Circuits With Air Gaps And Integrated Circuits Produced From Such Methods App 20170162430 - Dai; Xintuo ; et al.	2017-06-08
Dimension-controlled via formation processing Grant 9,666,476 - Hu , et al. May 30, 2	2017-05-30
Methods of forming self-aligned contacts on FinFET devices Grant 9,627,274 - Sheng , et al. April 18, 2	2017-04-18
Facilitating etch processing of a thin film via partial implantation thereof Grant 9,620,381 - Patil , et al. April 11, 2	2017-04-11
Methods for fabricating integrated circuits using self-aligned quadruple patterning Grant 9,620,380 - Dai , et al. April 11, 2	2017-04-11
Alternating space decomposition in circuit structure fabrication Grant 9,606,432 - Ning , et al. March 28, 2	2017-03-28
Reducing liner corrosion during metallization of semiconductor devices Grant 9,595,493 - Sun , et al. March 14, 2	2017-03-14
Method for eliminating interlayer dielectric dishing and controlling gate height uniformity Grant 9,589,807 - Huang , et al. March 7, 2	2017-03-07
Reducing Liner Corrosion During Metallization Of Semiconductor Devices App 20170047282 - SUN; Zhiguo ; et al.	2017-02-16
Through Silicon Via Device Having Low Stress, Thin Film Gaps And Methods For Forming The Same App 20160372425 - Liu; Huang ; et al.	2016-12-22
Inhibiting diffusion of elements between material layers of a layered circuit structure Grant 9,502,232 - Gu , et al. November 22, 2	2016-11-22
Integrated circuits having improved gate structures and methods for fabricating same Grant 9,490,129 - Hu , et al. November 8, 2	2016-11-08
Metal resistor using FinFET-based replacement gate process Grant 9,478,625 - Zang , et al. October 25, 2	2016-10-25
Liner and cap layer for placeholder source/drain contact structure planarization and replacement Grant 9,466,723 - Huang , et al. October 11, 2	2016-10-11
Through silicon via device having low stress, thin film gaps and methods for forming the same Grant 9,455,188 - Liu , et al. September 27, 2	2016-09-27
10 nm alternative N/P doped fin for SSRW scheme Grant 9,455,204 - Cao , et al. September 27, 2	2016-09-27
Method for forming air gap structure using carbon-containing spacer Grant 9,443,956 - Yu , et al. September 13, 2	2016-09-13
Lithographic stack excluding SiARC and method of using same Grant 9,431,528 - Yu , et al. August 30, 2	2016-08-30
Method for forming an air gap around a through-silicon via Grant 9,425,127 - Yu , et al. August 23, 2	2016-08-23
Method of forming a dielectric film Grant 9,418,832 - Liu , et al. August 16, 2	2016-08-16
Method for reducing gate height variation due to overlapping masks Grant 9,401,416 - Yu , et al. July 26, 2	2016-07-26
Methods For Preventing Oxidation Damage During Finfet Fabrication App 20160211373 - YU; HONG ; et al.	2016-07-21
Shallow trench isolation integration methods and devices formed thereby Grant 9,385,192 - Shen , et al. July 5, 2	2016-07-05
Defect-free relaxed covering layer on semiconductor substrate with lattice mismatch Grant 9,368,342 - Huang , et al. June 14, 2	2016-06-14
Method For Forming Air Gap Structure Using Carbon-containing Spacer App 20160163816 - Yu; Hong ; et al.	2016-06-09
Method For Reducing Gate Height Variation Due To Overlapping Masks App 20160163830 - Yu; Hong ; et al.	2016-06-09
Integrated circuits and methods of forming the same with multi-level electrical connection Grant 9,349,635 - Liew , et al. May 24, 2	2016-05-24
Alternating Space Decomposition In Circuit Structure Fabrication App 20160124308 - NING; Guoxiang ; et al.	2016-05-05
Achieving A Critical Dimension Target Based On Resist Characteristics App 20160125121 - NING; Guoxiang ; et al.	2016-05-05
Achieving a critical dimension target based on resist characteristics Grant 9,329,471 - Ning , et al. May 3, 2	2016-05-03
Methods for preventing oxidation damage during FinFET fabrication Grant 9,324,841 - Yu , et al. April 26, 2	2016-04-26
Formation of carbon-rich contact liner material Grant 9,318,440 - Cao , et al. April 19, 2	2016-04-19
Dimension-controlled Via Formation Processing App 20160099171 - HU; Xiang ; et al.	2016-04-07
Dimension-controlled via formation processing Grant 9,305,832 - Hu , et al. April 5, 2	2016-04-05
Method to improve selectivity cobalt cap process Grant 9,275,898 - Shu , et al. March 1, 2	2016-03-01
Inhibiting Diffusion Of Elements Between Material Layers Of A Layered Circuit Structure App 20160005598 - GU; Sipeng ; et al.	2016-01-07
Method for producing integrated circuit with smaller grains of tungsten Grant 9,230,863 - Yu , et al. January 5, 2	2016-01-05
Method for forming through silicon via with wafer backside protection Grant 9,230,886 - Leong , et al. January 5, 2	2016-01-05
Uniform gate height for mixed-type non-planar semiconductor devices Grant 9,230,822 - Yu , et al. January 5, 2	2016-01-05
Dimension-controlled Via Formation Processing App 20150380246 - HU; Xiang ; et al.	2015-12-31
Uniform Gate Height For Mixed-type Non-planar Semiconductor Devices App 20150364336 - YU; Hong ; et al.	2015-12-17
Formation Of Carbon-rich Contact Liner Material App 20150357285 - CAO; Huy ; et al.	2015-12-10
Methods Of Fabricating Defect-free Semiconductor Structures App 20150357292 - LIU; Hung-Wei ; et al.	2015-12-10
LITHOGRAPHIC STACK EXCLUDING SiARC AND METHOD OF USING SAME App 20150332934 - YU; Hong ; et al.	2015-11-19
Shallow Trench Isolation Integration Methods And Devices Formed Thereby App 20150333121 - Shen; Hongliang ; et al.	2015-11-19
Integrated Circuits Having Improved Gate Structures And Methods For Fabricating Same App 20150325482 - Hu; Xiang ; et al.	2015-11-12
Reduced Silicon Gouging During Oxide Spacer Formation App 20150325445 - SHU; Jiehui ; et al.	2015-11-12
Semiconductor structures with bridging films and methods of fabrication Grant 9,184,288 - Gu , et al. November 10, 2	2015-11-10
Defect-free Relaxed Covering Layer On Semiconductor Substrate With Lattice Mismatch App 20150295047 - HUANG; Haigou ; et al.	2015-10-15
FinFET gate with insulated vias and method of making same Grant 9,153,693 - Yu , et al. October 6, 2	2015-10-06
Fabrication Of Semiconductor Structures Using Oxidized Polycrystalline Silicon As Conformal Stop Layers App 20150270159 - HUANG; Haigou ; et al.	2015-09-24
De-oxidation Of Metal Gate For Improved Gate Performance App 20150270142 - Liu; Huang ; et al.	2015-09-24
Methods of fabricating defect-free semiconductor structures Grant 9,142,422 - Liu , et al. September 22, 2	2015-09-22
Semiconductor Structures With Bridging Films And Methods Of Fabrication App 20150263169 - GU; Sipeng ; et al.	2015-09-17
Formation of carbon-rich contact liner material Grant 9,130,019 - Cao , et al. September 8, 2	2015-09-08
Shallow trench isolation integration methods and devices formed thereby Grant 9,123,771 - Shen , et al. September 1, 2	2015-09-01
Integrated Circuits With A Tungsten Component And Methods For Producing Such Integrated Circuits App 20150228543 - Yu; Jialin ; et al.	2015-08-13
Modified, etch-resistant gate structure(s) facilitating circuit fabrication Grant 9,093,561 - Yu , et al. July 28, 2	2015-07-28
Integrated circuits including FINFET devices with shallow trench isolation that includes a thermal oxide layer and methods for making the same Grant 9,087,870 - Tong , et al. July 21, 2	2015-07-21
Formation Of Carbon-rich Contact Liner Material App 20150194342 - CAO; Huy ; et al.	2015-07-09
Method of Forming A Dielectric Film App 20150162188 - Liu; Hung-Wei ; et al.	2015-06-11
Method For Forming Through Silicon Via With Wafer Backside Protection App 20150137359 - LEONG; Lup San ; et al.	2015-05-21
Modified, Etch-resistant Gate Structure(s) Facilitating Circuit Fabrication App 20150140751 - YU; Hong ; et al.	2015-05-21
Methods Of Fabricating Defect-free Semiconductor Structures App 20150123250 - LIU; Hung-Wei ; et al.	2015-05-07
Facilitating Etch Processing Of A Thin Film Via Partial Implantation Thereof App 20150104948 - PATIL; Suraj K. ; et al.	2015-04-16
Methods For Preventing Oxidation Damage During Finfet Fabrication App 20150099340 - Yu; Hong ; et al.	2015-04-09
Method For Manufacturing A Semiconductor Device By Stopping Planarization Of Insulating Material On Fins App 20150093877 - HUANG; Haigou ; et al.	2015-04-02
Method of forming a dielectric film Grant 8,993,446 - Liu , et al. March 31, 2	2015-03-31
Reliable interconnect for semiconductor device Grant 8,987,134 - Wang , et al. March 24, 2	2015-03-24
Integrated Circuits Having Smooth Metal Gates And Methods For Fabricating Same App 20150076624 - Liu; Huang ; et al.	2015-03-19
Method For Forming An Air Gap Around A Through-silicon Via App 20150069579 - YU; Hong ; et al.	2015-03-12
Package Interconnects App 20150061085 - YU; Hong ; et al.	2015-03-05
Method and device to achieve self-stop and precise gate height Grant 8,962,407 - Yu , et al. February 24, 2	2015-02-24
Method for forming an air gap around a through-silicon via Grant 8,962,474 - Yu , et al. February 24, 2	2015-02-24
Method for forming through silicon via with wafer backside protection Grant 8,940,637 - Leong , et al. January 27, 2	2015-01-27
Methods for fabricating integrated circuits utilizing silicon nitride layers Grant 8,940,650 - Cao , et al. January 27, 2	2015-01-27
Cd Control App 20140374920 - ZOU; Zheng ; et al.	2014-12-25
Reliable contacts Grant 8,916,939 - Yu , et al. December 23, 2	2014-12-23
Finfet Gate With Insulated Vias And Method Of Making Same App 20140367803 - YU; Hong ; et al.	2014-12-18
Integrated Circuits Including Finfet Devices With Shallow Trench Isolation That Includes A Thermal Oxide Layer And Methods For Making The Same App 20140353795 - Tong; Wei Hua ; et al.	2014-12-04
Low-k Nitride Film And Method Of Making App 20140346648 - CAO; Huy ; et al.	2014-11-27
Package interconnects Grant 8,883,634 - Yu , et al. November 11, 2	2014-11-11
Contact Liner And Methods Of Fabrication Thereof App 20140327139 - YU; Jialin ; et al.	2014-11-06
Damascene process for aligning and bonding through-silicon-via based 3D integrated circuit stacks Grant 8,877,637 - Yu , et al. November 4, 2	2014-11-04
Method Of Forming A Dielectric Film App 20140315385 - Liu; Hung-Wei ; et al.	2014-10-23
Gate electrode(s) and contact structure(s), and methods of fabrication thereof Grant 8,859,417 - Yu , et al. October 14, 2	2014-10-14
STI CMP under polish monitoring Grant 8,852,968 - Li , et al. October 7, 2	2014-10-07
CD control Grant 8,836,139 - Zou , et al. September 16, 2	2014-09-16
Methods For Fabricating Integrated Circuits Utilizing Silicon Nitride Layers App 20140256141 - Cao; Huy ; et al.	2014-09-11
Sti Cmp Under Polish Monitoring App 20140234993 - LI; Liang ; et al.	2014-08-21
Integrated Circuits And Methods Of Forming The Same With Multi-level Electrical Connection App 20140232010 - Liew; San Leong ; et al.	2014-08-21
Shallow Trench Isolation Integration Methods And Devices Formed Thereby App 20140227858 - Shen; Hongliang ; et al.	2014-08-14
Methods of forming replacement gate structures for NFET semiconductor devices and devices having such gate structures Grant 8,803,254 - Laloe , et al. August 12, 2	2014-08-12
Through Silicon Via Device Having Low Stress, Thin Film Gaps And Methods For Forming The Same App 20140203446 - Liu; Huang ; et al.	2014-07-24
Gate Electrode(s) And Contact Structure(s), And Methods Of Fabrication Thereof App 20140183745 - YU; Jialin ; et al.	2014-07-03
Spacer Divot Sealing Method And Semiconductor Device Incorporating Same App 20140175562 - Wang; Haiting ; et al.	2014-06-26
Methods Of Forming Replacement Gate Structures For Nfet Semiconductor Devices And Devices Having Such Gate Structures App 20140145274 - Laloe; Jean-Baptiste ; et al.	2014-05-29
Integrated circuits having replacement gate structures and methods for fabricating the same Grant 8,722,485 - Tong , et al. May 13, 2	2014-05-13
Method of forming a low-K dielectric film Grant 8,716,150 - Sun , et al. May 6, 2	2014-05-06
Copper Hillock Prevention With Hydrogen Plasma Treatment In A Dedicated Chamber App 20140117545 - LIU; Huang ; et al.	2014-05-01
Cd Control App 20140110855 - ZOU; Zheng ; et al.	2014-04-24
Method And Device To Achieve Self-stop And Precise Gate Height App 20140061732 - Yu; Hong ; et al.	2014-03-06
Method For Forming Through Silicon Via With Wafer Backside Protection App 20140008810 - Leong; Lup San ; et al.	2014-01-09
Reliable Contacts App 20130334616 - YU; Hong ; et al.	2013-12-19
Reliable Interconnect For Semiconductor Device App 20130328201 - WANG; Zhehui ; et al.	2013-12-12
Methods of protecting elevated polysilicon structures during etching processes Grant 8,569,173 - Li , et al. October 29, 2	2013-10-29
Reliable contacts Grant 8,519,482 - Yu , et al. August 27, 2	2013-08-27
Integration of eNVM, RMG, and HKMG modules Grant 8,518,775 - Liu , et al. August 27, 2	2013-08-27
Step-like spacer profile Grant 8,492,236 - Rao , et al. July 23, 2	2013-07-23
Step-like Spacer Profile App 20130181259 - Rao; Xuesong ; et al.	2013-07-18
Methods of Protecting Elevated Polysilicon Structures During Etching Processes App 20130149851 - Li; Liang ; et al.	2013-06-13
Through Silicon Via For Stacked Wafer Connections App 20130119543 - YU; Hong ; et al.	2013-05-16
Method For Forming An Air Gap Around A Through-silicon Via App 20130115769 - YU; Hong ; et al.	2013-05-09
INTEGRATION OF eNVM, RMG, AND HKMG MODULES App 20130082318 - Liu; Huang ; et al.	2013-04-04
Reliable Contacts App 20130075823 - YU; Hong ; et al.	2013-03-28
Integrated circuit system with via and method of manufacture thereof Grant 8,405,222 - Yu , et al. March 26, 2	2013-03-26
Damascene Process For Aligning And Bonding Through-silicon-via Based 3d Integrated Circuit Stacks App 20130069232 - Yu; Hong ; et al.	2013-03-21
Method of forming high-k dielectric stop layer for contact hole opening Grant 8,354,347 - Ye , et al. January 15, 2	2013-01-15
Package Interconnects App 20130001793 - YU; Hong ; et al.	2013-01-03
Method Of Forming Oxide Encapsulated Conductive Features App 20120273949 - Liu; Huang ; et al.	2012-11-01
Method of forming shallow trench isolation structures for integrated circuits Grant 8,178,417 - Mishra , et al. May 15, 2	2012-05-15
Nested and isolated transistors with reduced impedance difference Grant 8,143,651 - Widodo , et al. March 27, 2	2012-03-27
Integrated Circuit System With Via And Method Of Manufacture Thereof App 20110316166 - Yu; Hong ; et al.	2011-12-29
Integrated Circuit Including A Stressed Dielectric Layer With Stable Stress App 20110316085 - LIU; Huang ; et al.	2011-12-29
Reliable interconnection Grant 8,035,201 - Liu , et al. October 11, 2	2011-10-11
Integrated circuit including a stressed dielectric layer with stable stress Grant 8,013,372 - Liu , et al. September 6, 2	2011-09-06
Method for reducing silicide defects in integrated circuits Grant 7,960,283 - Ye , et al. June 14, 2	2011-06-14
Integrated circuit system employing sacrificial spacers Grant 7,892,900 - Liu , et al. February 22, 2	2011-02-22
Interconnect capping layer and method of fabrication Grant 7,855,143 - Liu , et al. December 21, 2	2010-12-21
Reliable Interconnection App 20100301461 - Liu; Huang ; et al.	2010-12-02
Nested And Isolated Transistors With Reduced Impedance Difference App 20100301424 - WIDODO; Johnny ; et al.	2010-12-02
Integrated circuit having ultralow-K dielectric layer Grant 7,829,422 - Widodo , et al. November 9, 2	2010-11-09
Method For Reducing Silicide Defects In Integrated Circuits App 20100267236 - YE; Jianhui ; et al.	2010-10-21
Integrated circuit system employing selective epitaxial growth technology Grant 7,795,680 - Liu , et al. September 14, 2	2010-09-14
Nested and isolated transistors with reduced impedance difference Grant 7,767,577 - Widodo , et al. August 3, 2	2010-08-03
Integrated circuit processing system Grant 7,749,894 - Wang , et al. July 6, 2	2010-07-06
Method for reducing silicide defects in integrated circuits Grant 7,745,320 - Ye , et al. June 29, 2	2010-06-29
Reliable Interconnect Integration App 20100109155 - LIU; Huang ; et al.	2010-05-06
Structure and method to prevent charge damage from e-beam curing process Grant 7,678,586 - Liu , et al. March 16, 2	2010-03-16
Integrated Circuit System Employing Single Mask Layer Technique For Well Formation App 20100009527 - Lee; Yong Meng ; et al.	2010-01-14
Integrated Circuit System Employing A Modified Isolation Structure App 20090325359 - Liu; Huang ; et al.	2009-12-31
Stable Stress Dielectric Layer App 20090315121 - GOH; Luona ; et al.	2009-12-24
Method For Reducing Silicide Defects In Integrated Circuits App 20090289309 - YE; Jianhui ; et al.	2009-11-26
Method Of Forming Shallow Trench Isolation Structures For Integrated Circuits App 20090261448 - MISHRA; Shailendra ; et al.	2009-10-22
Stressed Dielectric Layer With Stable Stress App 20090250764 - LIU; Huang ; et al.	2009-10-08
Integrated Circuit System Employing Sacrificial Spacers App 20090250762 - Liu; Huang ; et al.	2009-10-08
Nested And Isolated Transistors With Reduced Impedance Difference App 20090206408 - WIDODO; Johnny ; et al.	2009-08-20
Method and apparatus for providing void structures Grant 7,566,656 - Liu , et al. July 28, 2	2009-07-28
OPTIMIZED SiCN CAPPING LAYER App 20090176367 - Baks; Heidi ; et al.	2009-07-09
Integrated Circuit System Employing Selective Epitaxial Growth Technology App 20090146262 - Liu; Huang ; et al.	2009-06-11
Method of forming high-k dielectric stop layer for contact hole opening App 20090146296 - YE; Jianhui ; et al.	2009-06-11
Method And Apparatus For Providing Void Structures App 20080153252 - LIU; Huang ; et al.	2008-06-26
Integrated Circuit Having Ultralow-K Dielectric Layer App 20080153310 - Widodo; Johnny ; et al.	2008-06-26
Interconnect Capping Layer and Method of Fabrication App 20080150137 - LIU; Huang ; et al.	2008-06-26
Integrated Circuit Processing System App 20080111238 - Wang; Xianbin ; et al.	2008-05-15
OPTIMIZED SiCN CAPPING LAYER App 20070155186 - Baks; Heidi ; et al.	2007-07-05
Structure and method to prevent charge damage from e-beam curing process App 20070134941 - Liu; Huang ; et al.	2007-06-14
Method of making a plastic elbow fitting App 20040140594 - Liu, Huang	2004-07-22
Method for forming tool box hinge by blown molding App 20030067101 - Liu, Huang	2003-04-10
Intermetal dielectric layer for integrated circuits App 20020130418 - Liu, Huang ; et al.	2002-09-19
Two-step, low argon, HDP CVD oxide deposition process Grant 6,211,040 - Liu , et al. April 3, 2	2001-04-03