Lien; Chuen-Der

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lien; Chuen-Der.The latest application filed is for "memory device and multi physical cells error correction method thereof".

Company Profile

19.103.30

Lien; Chuen-Der - San Jose CA
Lien; Chuen-Der - Los Altos Hills CA
Lien; Chuen-Der - Taichung TW
Lien; Chuen-Der - Los Altos CA
Lien; Chuen-Der - Mountain View CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Memory device and multi physical cells error correction method thereof Grant 11,314,588 - Lien , et al. April 26, 2	2022-04-26
Non-volatile memory device Grant 11,114,180 - Lin , et al. September 7, 2	2021-09-07
Memory apparatus and data accessing method thereof Grant 11,088,711 - Lien , et al. August 10, 2	2021-08-10
Memory storage apparatus with dynamic data repair mechanism and method of dynamic data repair thereof Grant 11,010,245 - Lien , et al. May 18, 2	2021-05-18
Memory Device And Multi Physical Cells Error Correction Method Thereof App 20210141689 - Lien; Chuen-Der ; et al.	2021-05-13
Encoding method and memory storage apparatus using the same Grant 11,003,529 - Lien , et al. May 11, 2	2021-05-11
Error correction code memory device and codeword accessing method thereof Grant 10,956,259 - Lien , et al. March 23, 2	2021-03-23
Memory Apparatus And Data Accessing Method Thereof App 20210013906 - Lien; Chuen-Der ; et al.	2021-01-14
Memory apparatus having hierarchical error correction code layer Grant 10,853,167 - Lien , et al. December 1, 2	2020-12-01
RRAM with plurality of 1TnR structures Grant 10,811,092 - Lin , et al. October 20, 2	2020-10-20
Memory device having parameter adjusting mechanism and method of adjusting parameter by memory device Grant 10,783,973 - Lien , et al. Sept	2020-09-22
Memory Apparatus Having Hierarchical Error Correction Code Layer App 20200241957 - Lien; Chuen-Der ; et al.	2020-07-30
Error Correction Code Memory Device And Codeword Accessing Method Thereof App 20200233743 - Lien; Chuen-Der ; et al.	2020-07-23
Memory Storage Apparatus With Dynamic Data Repair Mechanism And Method Of Dynamic Data Repair Thereof App 20190391874 - Lien; Chuen-Der ; et al.	2019-12-26
Encoding method and memory storage apparatus using the same Grant 10,514,980 - Lien , et al. Dec	2019-12-24
Encoding Method And Memory Storage Apparatus Using The Same App 20190340070 - Lien; Chuen-Der ; et al.	2019-11-07
Method Of Implementing Error Correction Code Used By Memory Storage Apparatus And Memory Storage Apparatus Using The Same App 20190294497 - Lien; Chuen-Der ; et al.	2019-09-26
Encoding Method And Memory Storage Apparatus Using The Same App 20190294496 - Lien; Chuen-Der ; et al.	2019-09-26
Encoding method and a memory storage apparatus using the same Grant 10,372,535 - Lien , et al.	2019-08-06
Data read method and memory storage device using the same Grant 10,348,337 - Lien , et al. July 9, 2	2019-07-09
Error checking and correcting decoder Grant 10,236,913 - Lien , et al.	2019-03-19
Encoding Method And A Memory Storage Apparatus Using The Same App 20190065307 - Lien; Chuen-Der ; et al.	2019-02-28
Error Checking And Correcting Decoder App 20180331700 - Lien; Chuen-Der ; et al.	2018-11-15
Data Read Method And Memory Storage Device Using The Same App 20180239533 - Lien; Chuen-Der ; et al.	2018-08-23
Methods and systems for detecting and correcting errors in nonvolatile memory Grant 9,836,349 - Lien , et al. December 5, 2	2017-12-05
Memory system includes a memory controller coupled to a non-volatile memory array configured to provide special write operation to write data in the non-volatile memory array before a board mount operation is applied and provde a regular write operation after a board mount operation is applied Grant 9,798,481 - Shieh , et al. October 24, 2	2017-10-24
Methods and systems for nonvolatile memory data management Grant 9,720,771 - Lien , et al. August 1, 2	2017-08-01
Methods And Systems For Nonvolatile Memory Data Management App 20170102994 - LIEN; Chuen-Der ; et al.	2017-04-13
Methods and systems for nonvolatile memory data management Grant 9,563,505 - Lien , et al. February 7, 2	2017-02-07
Methods And Systems For Detecting And Correcting Errors In Nonvolatile Memory App 20160350178 - Lien; Chuen-Der ; et al.	2016-12-01
Methods And Systems For Nonvolatile Memory Data Management App 20160350183 - LIEN; Chuen-Der ; et al.	2016-12-01
Look-ahead built-in self tests with temperature elevation of functional elements Grant 8,028,211 - Miller , et al. September 27, 2	2011-09-27
Clock generator and method for providing reliable clock signal using array of MEMS resonators Grant 7,941,723 - Lien , et al. May 10, 2	2011-05-10
Method for forming integrated circuit device using cell library with soft error resistant logic cells Grant 7,921,400 - Lien , et al. April 5, 2	2011-04-05
Look-ahead built-in self tests Grant 7,877,657 - Miller , et al. January 25, 2	2011-01-25
Method and apparatus for CAM with reduced cross-coupling interference Grant 7,859,876 - Lien , et al. December 28, 2	2010-12-28
CAM arrays having CAM cells therein with match line and low match line connections and methods of operating same Grant RE41,351 - Lien , et al. May 25, 2	2010-05-25
Electrical overstress (EOS) and electrostatic discharge (ESD) protection circuit and method of use Grant 7,706,113 - Lien , et al. April 27, 2	2010-04-27
Logic soft error rate prediction and improvement Grant 7,644,311 - Lien , et al. January 5, 2	2010-01-05
Method and apparatus for clock generation Grant 7,602,226 - Hwang , et al. October 13, 2	2009-10-13
Method for forming CMOS device with self-aligned contacts and region formed using salicide process Grant 7,582,567 - Syau , et al. September 1, 2	2009-09-01
Die seal with reduced noise coupling Grant 7,560,800 - Lien , et al. July 14, 2	2009-07-14
Method and apparatus for CAM with reduced cross-coupling interference Grant 7,545,660 - Lien , et al. June 9, 2	2009-06-09
Method and apparatus for CAM with reduced cross-coupling interference Grant 7,522,438 - Lien , et al. April 21, 2	2009-04-21
Binary and ternary non-volatile CAM Grant 7,499,303 - Lien , et al. March 3, 2	2009-03-03
Method for improved single event latch up resistance in an integrated circuit Grant 7,474,011 - Lien , et al. January 6, 2	2009-01-06
Memory array bit line coupling capacitor cancellation Grant 7,443,747 - Lien , et al. October 28, 2	2008-10-28
System and method for integrated circuit charge recycling Grant 7,414,460 - Lien , et al. August 19, 2	2008-08-19
Self-biased electrostatic discharge protection method and circuit Grant 7,408,751 - Lien , et al. August 5, 2	2008-08-05
Method for improved single event latch up resistance in an integrated circuit App 20080122473 - Lien; Chuen-Der ; et al.	2008-05-29
Content addressable memory (CAM) devices that support background BIST and BISR operations and methods of operating same Grant 7,304,875 - Lien , et al. December 4, 2	2007-12-04
Dual port memory cell with reduced coupling capacitance and small cell size Grant 7,286,438 - Lien , et al. October 23, 2	2007-10-23
Logic soft error rate prediction and improvement App 20070234125 - Lien; Chuen-Der ; et al.	2007-10-04
Method and apparatus for CAM with reduced cross-coupling interference Grant 7,248,492 - Lien , et al. July 24, 2	2007-07-24
Memory cell with reduced soft error rate Grant 7,214,990 - Lee , et al. May 8, 2	2007-05-08
Method and apparatus for CAM with reduced cross-coupling interference Grant 7,187,571 - Lien , et al. March 6, 2	2007-03-06
Method and apparatus for clock generation Grant 7,176,738 - Hwang , et al. February 13, 2	2007-02-13
Dual port memory cell with reduced coupling capacitance and small cell size App 20060227649 - Lien; Chuen-Der ; et al.	2006-10-12
Electrostatic discharge protection circuit Grant 7,102,862 - Lien , et al. September 5, 2	2006-09-05
Method for forming cmos device with self-aligned contacts and region formed using salicide process Grant 7,098,114 - Syau , et al. August 29, 2	2006-08-29
Content addressable memory (CAM) arrays and cells having low power requirements Grant RE39,227 - Lien , et al. August 8, 2	2006-08-08
Content addressable memory (CAM) devices that support power saving longest prefix match operations and methods of operating same Grant 7,050,317 - Lien , et al. May 23, 2	2006-05-23
Binary and ternary non-volatile CAM App 20060067097 - Lien; Chuen-Der ; et al.	2006-03-30
Memory array bit line coupling capacitor cancellation App 20060028860 - Lien; Chuen-Der ; et al.	2006-02-09
CAM circuit with radiation resistance Grant 6,924,995 - Lien August 2, 2	2005-08-02
Content addressable memory (CAM) devices having error detection and correction control circuits therein and methods of operating same Grant 6,879,504 - Lien , et al. April 12, 2	2005-04-12
Content addressable memory (CAM) devices with dual-function check bit cells that support column redundancy and check bit cells with reduced susceptibility to soft errors Grant 6,870,749 - Park , et al. March 22, 2	2005-03-22
CAM circuit with radiation resistance App 20040208034 - Lien, Chuen-Der	2004-10-21
Content addressable memory (CAM) devices that utilize multi-port CAM cells and control logic to support multiple overlapping search cycles that are asynchronously timed relative to each other Grant 6,781,857 - Lien , et al. August 24, 2	2004-08-24
CAM circuit with radiation resistance Grant 6,754,093 - Lien June 22, 2	2004-06-22
ESD protection circuit Grant 6,724,601 - Lien , et al. April 20, 2	2004-04-20
FIFO memory devices having multi-port cache memory arrays therein that support hidden EDC latency and bus matching and methods of operating same App 20040047209 - Lien, Chuen-Der ; et al.	2004-03-11
Cam circuit with error correction Grant 6,700,827 - Lien , et al. March 2, 2	2004-03-02
FIFO memory devices having multi-port cache memory arrays therein that support hidden EDC latency and bus matching and methods of operating same App 20040019743 - Au, Mario ; et al.	2004-01-29
CAM circuit with radiation resistance App 20030227788 - Lien, Chuen-Der	2003-12-11
Cam Circuit With Separate Memory And Logic Operating Voltages App 20030227789 - Lien, Chuen-Der ; et al.	2003-12-11
Cam circuit with separate memory and logic operating voltages Grant 6,661,687 - Lien , et al. December 9, 2	2003-12-09
Content addressable memory (CAM) devices having reliable column redundancy characteristics and methods of operating same Grant 6,657,878 - Lien , et al. December 2, 2	2003-12-02
Content addressable memory (CAM) devices having reliable column redundancy characteristics and methods of operating same App 20030165073 - Lien, Chuen-Der ; et al.	2003-09-04
Gate structures with increased etch margin for self-aligned contact and the method of forming the same Grant 6,566,236 - Syau , et al. May 20, 2	2003-05-20
DRAM circuit with separate refresh memory Grant 6,563,754 - Lien , et al. May 13, 2	2003-05-13
CAM circuit with radiation resistance Grant 6,560,156 - Lien , et al. May 6, 2	2003-05-06
Cam circuit with error correction App 20030007408 - Lien, Chuen-Der ; et al.	2003-01-09
Increasing priority encoder speed using the most significant bit of a priority address Grant 6,505,271 - Lien , et al. January 7, 2	2003-01-07
CAM circuit with radiation resistance App 20020159320 - Lien, Chuen-Der ; et al.	2002-10-31
Pipelining a content addressable memory cell array for low-power operation Grant 6,470,418 - Lien , et al. October 22, 2	2002-10-22
ESD protection circuit App 20020131221 - Lien, Chuen-Der ; et al.	2002-09-19
DRAM-based CAM cell using 3T or 4T DRAM cells Grant 6,421,265 - Lien , et al. July 16, 2	2002-07-16
Ternary CAM cell with DRAM mask circuit Grant 6,400,593 - Lien , et al. June 4, 2	2002-06-04
Method of forming self-aligned via structure Grant 6,372,641 - Lien April 16, 2	2002-04-16
Semiconductor integrated circuit with an insulation structure having reduced permittivity App 20010040267 - Lien, Chuen-Der ; et al.	2001-11-15
High speed buffer circuit with improved noise immunity Grant 6,307,399 - Lien , et al. October 23, 2	2001-10-23
Ternary CAM array Grant 6,262,907 - Lien , et al. July 17, 2	2001-07-17
High Voltage Tolerable Input Buffer App 20010002798 - Lien, Chuen-Der	2001-06-07
Air gap with borderless contact Grant 6,232,647 - Lien , et al. May 15, 2	2001-05-15
Semiconductor device having programmable interconnect layers Grant 6,222,212 - Lee , et al. April 24, 2	2001-04-24
Testing method and apparatus for identifying disturbed cells within a memory cell array Grant 6,216,239 - Lien April 10, 2	2001-04-10
Five-transistor SRAM cell Grant 6,205,049 - Lien , et al. March 20, 2	2001-03-20
Identical gate conductivity type static random access memory cell Grant 6,191,460 - Choi , et al. February 20, 2	2001-02-20
Low-power content addressable memory cell Grant 6,128,207 - Lien , et al. October 3, 2	2000-10-03
High voltage tolerable input buffer and method for operating same Grant 6,104,229 - Lien August 15, 2	2000-08-15
Six transistor content addressable memory cell Grant 6,101,116 - Lien , et al. August 8, 2	2000-08-08
Process for making six-transistor SRAM cell local interconnect structure Grant 6,100,128 - Wang , et al. August 8, 2	2000-08-08
ESD damage protection using a clamp circuit Grant 6,069,782 - Lien , et al. May 30, 2	2000-05-30
Compact static RAM cell Grant 6,031,267 - Lien February 29, 2	2000-02-29
Method for fabricating air gap with borderless contact Grant 6,025,260 - Lien , et al. February 15, 2	2000-02-15
Methods for fabricating a bonding pad having improved adhesion to an underlying structure Grant 5,989,991 - Lien November 23, 1	1999-11-23
Methods for making compact P-channel/N-channel transistor structure Grant 5,953,604 - Lien September 14, 1	1999-09-14
SRAM cell using thin gate oxide pulldown transistors Grant 5,939,762 - Lien August 17, 1	1999-08-17
Efficient method for fabricating P-wells and N-wells Grant 5,926,704 - Choi , et al. July 20, 1	1999-07-20
Method for testing data retention in a static random access memory using isolated V.sub.cc supply Grant 5,910,922 - Huggins , et al. June 8, 1	1999-06-08
Method of manufacturing a BiCMOS integrated circuit fully integrated within a CMOS process flow Grant 5,888,861 - Chien , et al. March 30, 1	1999-03-30
CMOS process forming wells after gate formation Grant 5,830,789 - Lien , et al. November 3, 1	1998-11-03
Local interconnect structure and process for six-transistor SRAM cell Grant 5,831,899 - Wang , et al. November 3, 1	1998-11-03
Structure for controlling threshold voltage of MOSFET Grant 5,793,088 - Choi , et al. August 11, 1	1998-08-11
Method of topside and inter-metal oxide coating Grant 5,789,314 - Yen , et al. August 4, 1	1998-08-04
High voltage tolerable pull-up driver and method for operating same Grant 5,777,510 - Lien July 7, 1	1998-07-07
Changed device model electrostatic discharge protection circuit for output drivers and method of implementing same Grant 5,729,419 - Lien March 17, 1	1998-03-17
Memory cell having active regions without N+ implants Grant 5,710,449 - Lien , et al. January 20, 1	1998-01-20
Method for fabricating P-wells and N-wells having optimized field and active regions Grant 5,679,588 - Choi , et al. October 21, 1	1997-10-21
Method for fabricating a CMOS device Grant 5,654,213 - Choi , et al. August 5, 1	1997-08-05
Semiconductor structure containing multiple optimized well regions Grant 5,652,456 - Lien July 29, 1	1997-07-29
Structure and fabrication of high capacitance insulated-gate field effect transistor Grant 5,644,155 - Lien July 1, 1	1997-07-01
Method for making high speed poly-emitter bipolar transistor Grant 5,643,809 - Lien July 1, 1	1997-07-01
Parallel manufacturing of semiconductor devices and the resulting structure Grant 5,514,613 - Santadrea , et al. May 7, 1	1996-05-07
Efficient method for fabricating optimal BiCMOS N-wells for bipolar and field effect transistors Grant 5,470,766 - Lien November 28, 1	1995-11-28
Self-aligned via structure Grant 5,471,094 - Lien November 28, 1	1995-11-28
ESD protection for poly resistor on oxide Grant 5,401,997 - Lien March 28, 1	1995-03-28
Method of optimizing wells for PMOS and bipolar to yield an improved BICMOS process Grant 5,393,677 - Lien , et al. February 28, 1	1995-02-28
Conductor capacitance reduction in integrated circuits Grant 5,310,700 - Lien , et al. May 10, 1	1994-05-10
Static random access memory cell using a P/N-MOS transistors Grant 5,128,731 - Lien , et al. July 7, 1	1992-07-07
CMOS output driver Grant 5,008,568 - Leung , et al. April 16, 1	1991-04-16
BiCMOS output driver Grant 4,933,574 - Lien , et al. June 12, 1	1990-06-12

Company Registrations

SEC

0001230198

LIEN CHUEN DER