| Patent | Date |
|---|
Metal on metal multiple patterning
Grant 11,398,378 - Chen , et al. July 26, 2 | 2022-07-26 |
Self Aligned Buried Power Rail
App 20220181198 - LICAUSI; Nicholas V. ; et al. | 2022-06-09 |
Self aligned buried power rail
Grant 11,309,210 - Licausi , et al. April 19, 2 | 2022-04-19 |
Fully aligned via in ground rule region
Grant 11,114,338 - Licausi , et al. September 7, 2 | 2021-09-07 |
Interconnect structures with airgaps arranged between capped interconnects
Grant 11,101,169 - LiCausi August 24, 2 | 2021-08-24 |
Skip via for metal interconnects
Grant 10,978,388 - Amanapu , et al. April 13, 2 | 2021-04-13 |
Metal On Metal Multiple Patterning
App 20210005454 - CHEN; Hsueh-Chung ; et al. | 2021-01-07 |
Interconnect structure having reduced resistance variation and method of forming same
Grant 10,832,944 - LiCausi , et al. November 10, 2 | 2020-11-10 |
Metal on metal multiple patterning
Grant 10,818,494 - Chen , et al. October 27, 2 | 2020-10-27 |
Line end structures for semiconductor devices
Grant 10,770,392 - Licausi , et al. Sep | 2020-09-08 |
Interconnect Structures With Airgaps And Dielectric-capped Interconnects
App 20200227308 - LiCausi; Nicholas V. ; et al. | 2020-07-16 |
Interconnect Structures With Airgaps Arranged Between Capped Interconnects
App 20200227307 - LiCausi; Nicholas V. | 2020-07-16 |
Interconnect structures with airgaps and dielectric-capped interconnects
Grant 10,707,119 - LiCausi , et al. | 2020-07-07 |
Structure, method and system for measuring RIE lag depth
Grant 10,677,855 - LiCausi | 2020-06-09 |
Interconnect Structure Having Reduced Resistance Variation And Method Of Forming Same
App 20200144106 - LiCausi; Nicholas V. ; et al. | 2020-05-07 |
Methods of identifying space within integrated circuit structure as mandrel space or non-mandrel space
Grant 10,622,266 - Verduijn , et al. | 2020-04-14 |
Skip Via For Metal Interconnects
App 20200111736 - Amanapu; Hari Prasad ; et al. | 2020-04-09 |
Metal On Metal Multiple Patterning
App 20200083043 - CHEN; Hsueh-Chung ; et al. | 2020-03-12 |
Interconnects formed by a metal displacement reaction
Grant 10,580,696 - Lin , et al. | 2020-03-03 |
Interconnects Formed By A Metal Displacement Reaction
App 20200066585 - Lin; Sean Xuan ; et al. | 2020-02-27 |
Self Aligned Buried Power Rail
App 20200006112 - LICAUSI; Nicholas V. ; et al. | 2020-01-02 |
Via and skip via structures
Grant 10,485,111 - Law , et al. Nov | 2019-11-19 |
Self aligned buried power rail
Grant 10,475,692 - Licausi , et al. Nov | 2019-11-12 |
Fully Aligned Via In Ground Rule Region
App 20190311948 - LICAUSI; Nicholas V. ; et al. | 2019-10-10 |
Fully aligned via in ground rule region
Grant 10,366,919 - Licausi , et al. July 30, 2 | 2019-07-30 |
Back-end-of-line Structures With Air Gaps
App 20190206718 - LiCausi; Nicholas V. ; et al. | 2019-07-04 |
Method of forming complementary nano-sheet/wire transistor devices with same depth contacts
Grant 10,304,833 - Suvarna , et al. | 2019-05-28 |
Interconnects formed by a metal replacement process
Grant 10,283,372 - Lin , et al. | 2019-05-07 |
Fully Aligned Via In Ground Rule Region
App 20190088541 - LICAUSI; Nicholas V. ; et al. | 2019-03-21 |
Interconnects Formed By A Metal Replacement Process
App 20190088500 - Lin; Sean Xuan ; et al. | 2019-03-21 |
Structure, Method And System For Measuring Rie Lag Depth
App 20190079128 - LiCausi; Nicholas V. | 2019-03-14 |
Via and skip via structures
Grant 10,199,261 - McMahon , et al. Fe | 2019-02-05 |
Via And Skip Via Structures
App 20190027401 - McMahon; James ; et al. | 2019-01-24 |
Via And Skip Via Structures
App 20190021176 - Law; Shao Beng ; et al. | 2019-01-17 |
Method For Manufacturing Fully Aligned Via Structures Having Relaxed Gapfills
App 20190013236 - LiCausi; Nicholas V. ; et al. | 2019-01-10 |
Interconnects Formed With Structurally-modified Caps
App 20190013240 - LiCausi; Nicholas V. ; et al. | 2019-01-10 |
Method for manufacturing fully aligned via structures having relaxed gapfills
Grant 10,177,028 - LiCausi , et al. J | 2019-01-08 |
Metallization levels and methods of making thereof
Grant 10,134,580 - LiCausi , et al. November 20, 2 | 2018-11-20 |
Etch profile control during skip via formation
Grant 10,109,526 - Zhang , et al. October 23, 2 | 2018-10-23 |
Self Aligned Buried Power Rail
App 20180294267 - LICAUSI; Nicholas V. ; et al. | 2018-10-11 |
Methods Of Identifying Space Within Integrated Circuit Structure As Mandrel Space Or Non-mandrel Space
App 20180286681 - Verduijn; Erik A. ; et al. | 2018-10-04 |
Formation of IC structure with pair of unitary metal fins
Grant 9,570,394 - Zhang , et al. February 14, 2 | 2017-02-14 |
FINFET fin height control
Grant 9,530,654 - Licausi December 27, 2 | 2016-12-27 |
Finfet Device With A Substantially Self-aligned Isolation Region Positioned Under The Channel Region
App 20160190306 - Xie; Ruilong ; et al. | 2016-06-30 |
Methods of forming substantially self-aligned isolation regions on FinFET semiconductor devices and the resulting devices
Grant 9,318,388 - Xie , et al. April 19, 2 | 2016-04-19 |
Methods Of Forming Substantially Self-aligned Isolation Regions On Finfet Semiconductor Devices And The Resulting Devices
App 20150294912 - Xie; Ruilong ; et al. | 2015-10-15 |
Methods of forming substantially self-aligned isolation regions on FinFET semiconductor devices and the resulting devices
Grant 9,093,302 - Xie , et al. July 28, 2 | 2015-07-28 |
Methods Of Forming Substantially Self-aligned Isolation Regions On Finfet Semiconductor Devices And The Resulting Devices
App 20150129934 - Xie; Ruilong ; et al. | 2015-05-14 |
NARROW DIFFUSION BREAK FOR A FIN FIELD EFFECT (FinFET) TRANSISTOR DEVICE
App 20150123211 - Zhang; Qi ; et al. | 2015-05-07 |
Extra Narrow Diffusion Break For 3d Finfet Technologies
App 20150050792 - Samavedam; Srikanth B. ; et al. | 2015-02-19 |
Semiconductor Structure With Improved Isolation And Method Of Fabrication To Enable Fine Pitch Transistor Arrays
App 20150001628 - LiCausi; Nicholas V. ; et al. | 2015-01-01 |
Methods of forming conductive structures using a sacrificial liner layer
Grant 8,889,549 - Zhang , et al. November 18, 2 | 2014-11-18 |
Finfet Fin Height Control
App 20140306317 - LICAUSI; Nicholas V. | 2014-10-16 |
Methods of trimming nanowire structures
Grant 8,846,511 - LiCausi , et al. September 30, 2 | 2014-09-30 |
Forming a diffusion break during a RMG process
Grant 8,846,491 - Pham , et al. September 30, 2 | 2014-09-30 |
Methods Of Repairing Damaged Insulating Materials By Introducing Carbon Into The Layer Of Insulating Material
App 20140256064 - Taylor, JR.; William J. ; et al. | 2014-09-11 |
Methods Of Forming Conductive Structures Using A Sacrificial Liner Layer
App 20140227872 - Zhang; Xunyuan ; et al. | 2014-08-14 |
Methods Of Trimming Nanowire Structures
App 20140227849 - LiCausi; Nicholas V. ; et al. | 2014-08-14 |
Methods of forming dielectrically isolated fins for a FinFET semiconductor by performing an etching process wherein the etch rate is modified via inclusion of a dopant material
Grant 8,691,640 - LiCausi , et al. April 8, 2 | 2014-04-08 |
Methods of forming FinFET devices with alternative channel materials
Grant 8,673,718 - Maszara , et al. March 18, 2 | 2014-03-18 |
Methods of forming SRAM devices using sidewall image transfer techniques
Grant 8,669,186 - LiCausi March 11, 2 | 2014-03-11 |
Methods Of Forming Finfet Devices With Alternative Channel Materials
App 20140011341 - Maszara; Witold P. ; et al. | 2014-01-09 |
Methods Of Forming Finfet Devices With Alternative Channel Materials
App 20130309847 - Maszara; Witold P. ; et al. | 2013-11-21 |
Methods of forming FinFET devices with alternative channel materials
Grant 8,580,642 - Maszara , et al. November 12, 2 | 2013-11-12 |
Methods of patterning features in a structure using multiple sidewall image transfer technique
Grant 8,557,675 - LiCausi October 15, 2 | 2013-10-15 |
Methods of Forming SRAM Devices Using Sidewall Image Transfer Techniques
App 20130196508 - LiCausi; Nicholas V. | 2013-08-01 |
Methods of Patterning Features in a Structure Using Multiple Sidewall Image Transfer Technique
App 20130134486 - LiCausi; Nicholas V. | 2013-05-30 |
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