| Patent | Date |
|---|
Semiconductor ROM device and manufacturing method thereof
Grant 7,589,990 - Sung , et al. September 15, 2 | 2009-09-15 |
Non-volatile memory and method of fabricating the same
App 20080135915 - Liaw; Ing-Ruey ; et al. | 2008-06-12 |
Fabrication method for flash memory source line and flash memory
Grant 7,129,134 - Yang , et al. October 31, 2 | 2006-10-31 |
Semiconductor ROM device and manufacturing method thereof
App 20060120133 - Star Sung; Chih-Ta ; et al. | 2006-06-08 |
Fabrication method for flash memory source line and flash memory
App 20050181563 - Yang, Jui-Hsiang ; et al. | 2005-08-18 |
Method for forming a polysilicon spacer with a vertical profile
Grant 6,762,096 - Meng , et al. July 13, 2 | 2004-07-13 |
Method of manufacture of a crown or stack capacitor with a monolithic fin structure made with a different oxide etching rate in hydrogen fluoride vapor
Grant 6,555,433 - Liaw April 29, 2 | 2003-04-29 |
Method of fabricating a self-align contact with a disposable spacer
App 20020132403 - Hung, Cheng-Yu ; et al. | 2002-09-19 |
Methods of manufacture of crown or stack capacitor with a monolithic fin structure made with a different oxide etching rate in hydrogen fluoride vapor
Grant 6,344,392 - Liaw February 5, 2 | 2002-02-05 |
Method of manufacture of a crown or stack capacitor with a monolithic fin structure made with a different oxide etching rate in hydrogen fluoride vapor
App 20010034114 - Liaw, Ing-Ruey | 2001-10-25 |
Crown or stack capacitor with a monolithic fin structure
App 20010031531 - Liaw, Ing-Ruey | 2001-10-18 |
Method for fabricating a low resistance Poly-Si/metal gate
Grant 6,277,719 - Chern , et al. August 21, 2 | 2001-08-21 |
Fabrication Method To Approach The Conducting Structure Of A Dram Cell With Straight Forward Bit Line
App 20010010958 - Liaw, Ing-Ruey ; et al. | 2001-08-02 |
Fabrication method to approach the conducting structure of a DRAM cell with straightforward bit line
Grant 6,249,018 - Liaw , et al. June 19, 2 | 2001-06-19 |
Shallow trench isolator via non-critical chemical mechanical polishing
Grant 6,171,929 - Yang , et al. January 9, 2 | 2001-01-09 |
Method for fabricating crown-shaped capacitor structures
Grant 6,168,987 - Jeng , et al. January 2, 2 | 2001-01-02 |
Method for fabricating capacitor-over-bit-line dynamic random access memory (DRAM) using self-aligned contact etching technology
Grant 6,136,643 - Jeng , et al. October 24, 2 | 2000-10-24 |
Method of forming landing plugs for PMOS and NMOS
Grant 6,087,253 - Liaw July 11, 2 | 2000-07-11 |
Plasma-enhanced chemical vapor deposited SIO.sub.2 /SI.sub.3 N.sub.4 multilayer passivation layer for semiconductor applications
Grant 6,017,614 - Tsai , et al. January 25, 2 | 2000-01-25 |
Design and a novel process for formation of DRAM bit line and capacitor node contacts
Grant 6,008,085 - Sung , et al. December 28, 1 | 1999-12-28 |
Method for crown type capacitor in dynamic random access memory
Grant 5,956,587 - Chen , et al. September 21, 1 | 1999-09-21 |
Small contacts for ultra large scale integration semiconductor devices without separation ground rule
Grant 5,874,359 - Liaw , et al. February 23, 1 | 1999-02-23 |
Method for making a plasma-enhanced chemical vapor deposited SiO.sub.2 Si.sub.3 N.sub.4 multilayer passivation layer for semiconductor applications
Grant 5,851,603 - Tsai , et al. December 22, 1 | 1998-12-22 |
Method for forming a capacitor using a silicon oxynitride etching stop layer
Grant 5,837,576 - Chen , et al. November 17, 1 | 1998-11-17 |
Method of fabricating LDD spacers in MOS devices with double spacers and device manufactured thereby
Grant 5,763,312 - Jeng , et al. June 9, 1 | 1998-06-09 |
Method for fabricating a multiple walled crown capacitor of a semiconductor device
Grant 5,712,202 - Liaw , et al. January 27, 1 | 1998-01-27 |
Method for forming interconnections and conductors for high density integrated circuits
Grant 5,710,073 - Jeng , et al. January 20, 1 | 1998-01-20 |
Method for fabricating DRAM cells having fin-type stacked storage capacitors
Grant 5,491,104 - Lee , et al. February 13, 1 | 1996-02-13 |
Process of making an integrated circuit having a planar conductive layer
Grant 5,480,837 - Liaw , et al. January 2, 1 | 1996-01-02 |
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