loadpatents
name:-0.0088729858398438
name:-0.01464581489563
name:-0.00048184394836426
Liang; Minchang Patent Filings

Liang; Minchang

Patent Applications and Registrations

Patent applications and USPTO patent grants for Liang; Minchang.The latest application filed is for "method of semiconductor integrated circuit fabrication".

Company Profile
0.18.10
  • Liang; Minchang - Zhu-Dong Town N/A TW
  • Liang; Minchang - Zhu-Dong TW
  • Liang; Minchang - Santa Clara CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Semiconductor device with biased feature
Grant 9,059,001 - Liu , et al. June 16, 2
2015-06-16
Fin-like field effect transistor (FinFET) based, metal-semiconductor alloy fuse device and method of manufacturing same
Grant 8,969,999 - Liang , et al. March 3, 2
2015-03-03
Method of semiconductor integrated circuit fabrication
Grant 8,937,006 - Liang , et al. January 20, 2
2015-01-20
Method of Semiconductor Integrated Circuit Fabrication
App 20140030880 - Liang; Minchang ;   et al.
2014-01-30
Semiconductor Device With Biased Feature
App 20130154004 - Liu; Chia-Chu ;   et al.
2013-06-20
Fin-like Field Effect Transistor (finfet) Based, Metal-semiconductor Alloy Fuse Device And Method Of Manufacturing Same
App 20130105895 - Liang; Minchang ;   et al.
2013-05-02
Apparatus and methods for integrated circuit with devices with body contact and devices with electrostatic discharge protection
Grant 7,859,056 - Liu , et al. December 28, 2
2010-12-28
Apparatus And Methods For Integrated Circuit With Devices With Body Contact And Devices With Electrostatic Discharge Protection
App 20080232011 - Liu; Yowjuang W. ;   et al.
2008-09-25
Apparatus and methods for multi-gate silicon-on-insulator transistors
Grant 7,415,690 - Liang , et al. August 19, 2
2008-08-19
Apparatus and methods for integrated circuit with devices with body contact and devices with electrostatic discharge protection
Grant 7,394,132 - Liu , et al. July 1, 2
2008-07-01
Apparatus And Methods For Multi-gate Silicon-on-insulator Transistors
App 20080061821 - LIANG; MINCHANG ;   et al.
2008-03-13
Apparatus and methods for multi-gate silicon-on-insulator transistors
Grant 7,307,445 - Liang , et al. December 11, 2
2007-12-11
Bipolar transistors with low base resistance for CMOS integrated circuits
Grant 7,285,454 - Liang , et al. October 23, 2
2007-10-23
Apparatus And Methods For Multi-gate Silicon-on-insulator Transistors
App 20060279333 - Liang; Minchang ;   et al.
2006-12-14
Method for implementing electro-static discharge protection in silicon-on-insulator devices
Grant 7,125,760 - Reese , et al. October 24, 2
2006-10-24
Apparatus and methods for multi-gate silicon-on-insulator transistors
Grant 7,112,997 - Liang , et al. September 26, 2
2006-09-26
Bipolar transistors with low base resistance for CMOS integrated circuits
Grant 6,972,466 - Liang , et al. December 6, 2
2005-12-06
Apparatus and methods for integrated circuit with devices with body contact and devices with electrostatic discharge protection
App 20050250263 - Liu, Yowjuang W. ;   et al.
2005-11-10
Apparatus and methods for integrated circuit with devices with body contact and devices with electrostatic discharge protection
Grant 6,939,752 - Liu , et al. September 6, 2
2005-09-06
Method for implementing electro-static discharge protection in silicon-on-insulator devices
Grant 6,906,387 - Reese , et al. June 14, 2
2005-06-14
EEPROM active area castling
Grant 6,624,467 - McElheny , et al. September 23, 2
2003-09-23
Biasing scheme for reducing stress and improving reliability in EEPROM cells
Grant 5,905,675 - Madurawe , et al. May 18, 1
1999-05-18

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