loadpatents
name:-0.029576063156128
name:-0.023125171661377
name:-0.00058603286743164
Lammers; Stefan Patent Filings

Lammers; Stefan

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lammers; Stefan.The latest application filed is for "method and apparatus for current sense amplifier calibration in mram devices".

Company Profile
0.20.24
  • Lammers; Stefan - Heek DE
  • Lammers; Stefan - South Burlington VT
  • Lammers; Stefan - S. Burlington VT
  • Lammers; Stefan - Munchen DE
  • Lammers; Stefan - Wappingers Falls NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method and apparatus for current sense amplifier calibration in MRAM devices
Grant 7,239,537 - DeBrosse , et al. July 3, 2
2007-07-03
Semiconductor memory device having a plurality of memory areas with memory elements
Grant 7,158,405 - Bohm , et al. January 2, 2
2007-01-02
Method And Apparatus For Current Sense Amplifier Calibration In Mram Devices
App 20060152970 - DeBrosse; John K. ;   et al.
2006-07-13
Precharging the write path of an MRAM device for fast write operation
Grant 7,057,924 - Lammers , et al. June 6, 2
2006-06-06
Reference current distribution in MRAM devices
Grant 6,972,989 - Lammers December 6, 2
2005-12-06
Cross-point MRAM array with reduced voltage drop across MTJ's
Grant 6,930,915 - Lammers , et al. August 16, 2
2005-08-16
Precharging the write path of an MRAM device for fast write operation
App 20050157546 - Lammers, Stefan ;   et al.
2005-07-21
Reference current distribution in MRAM devices
App 20050078531 - Lammers, Stefan
2005-04-14
Circuit for transforming a single ended signal into a differential mode signal
Grant 6,853,229 - Viehmann , et al. February 8, 2
2005-02-08
CML (current mode logic) OCD (off chip driver)--ODT (on die termination) circuit for bidirectional data transmission
Grant 6,847,225 - Viehmann , et al. January 25, 2
2005-01-25
Cross-point MRAM array with reduced voltage drop across MTJ's
App 20040257869 - Lammers, Stefan ;   et al.
2004-12-23
Current mode logic (CML) circuit concept for a variable delay element
Grant 6,825,707 - Viehmann , et al. November 30, 2
2004-11-30
Circuit for transforming a differential mode signal into a single ended signal with reduced standby current consumption
Grant 6,819,142 - Viehmann , et al. November 16, 2
2004-11-16
Magnetic memory configuration
Grant 6,816,406 - Honigschmid , et al. November 9, 2
2004-11-09
Circuit for transforming a single ended signal into a differential mode signal
App 20040183580 - Viehmann, Hans-Heinrich ;   et al.
2004-09-23
CML (current mode logic) OCD (off chip driver) - ODT (on die termination) circuit for bidirectional data transmission
App 20040183565 - Viehmann, Hans-Heinrich ;   et al.
2004-09-23
Current Mode Logic (cml) Circuit Concept For A Variable Delay Element
App 20040178827 - Viehmann, Hans-Heinrich ;   et al.
2004-09-16
Circuit For Transforming A Differential Mode Signal Into A Single Ended Signal With Reduced Standby Current Consumption
App 20040178828 - Viehmann, Hans-Heinrich ;   et al.
2004-09-16
MRAM semiconductor memory configuration with redundant cell arrays
Grant 6,781,896 - Lammers , et al. August 24, 2
2004-08-24
Magnetoresistive memory (MRAM)
Grant 6,744,662 - Freitag , et al. June 1, 2
2004-06-01
Magnetic memory configuration
App 20040100836 - Honigschmid, Heinz ;   et al.
2004-05-27
Integrated memory with memory cell array
Grant 6,657,916 - Honigschmid , et al. December 2, 2
2003-12-02
Magnetoresistive memory (MRAM)
App 20030206461 - Freitag, Martin ;   et al.
2003-11-06
Configuration and method for the low-loss writing of an MRAM
Grant 6,639,829 - Gogl , et al. October 28, 2
2003-10-28
Semiconductor memory device having row and column redundancy circuit and method of manufacturing the circuit
Grant 6,618,306 - Bohm , et al. September 9, 2
2003-09-09
Segmented write line architecture
Grant 6,594,191 - Lammers , et al. July 15, 2
2003-07-15
Current source and drain arrangement for magnetoresistive memories (MRAMs)
Grant 6,594,176 - Lammers July 15, 2
2003-07-15
Segmented Write Line Architecture
App 20030112654 - Lammers, Stefan ;   et al.
2003-06-19
Method for preventing unwanted programming in an MRAM configuration
Grant 6,577,527 - Freitag , et al. June 10, 2
2003-06-10
Read/write memory with self-test device and associated test method
Grant 6,539,506 - Lammers , et al. March 25, 2
2003-03-25
Digital memory circuit and method of manufacturing the circuit
App 20030039157 - Bohm, Thomas ;   et al.
2003-02-27
Semiconductor memory device
App 20030007382 - Bohm, Thomas ;   et al.
2003-01-09
MRAM semiconductor memory configuration with redundant cell arrays
App 20020159317 - Lammers, Stefan ;   et al.
2002-10-31
Integrated memory
App 20020116591 - Honigschmid, Heinz ;   et al.
2002-08-22
Current source and drain arrangement for magnetoresistive memories (MRAMS)
App 20020097602 - Lammers, Stefan
2002-07-25
Method for preventing unwanted programming in an MRAM configuration
App 20020085411 - Freitag, Martin ;   et al.
2002-07-04
MRAM module configuration
App 20020075718 - Bohm, Thomas ;   et al.
2002-06-20
Integrated memory and corresponding operating method
App 20020044493 - Bohm, Thomas ;   et al.
2002-04-18
Integrated semiconductor memory with redundant units for memory cells
Grant 6,353,562 - Bohm , et al. March 5, 2
2002-03-05
Chip ID register configuration
App 20020021590 - Lammers, Stefan ;   et al.
2002-02-21
Configuration for implementing redundancy for a memory chip
App 20020012281 - Fischer, Helmut ;   et al.
2002-01-31
MRAM configuration
App 20020003720 - Bohm, Thomas ;   et al.
2002-01-10
CMOS voltage divider
App 20010030573 - Bohm, Thomas ;   et al.
2001-10-18
Integrated semiconductor memory with redundant units for memory cells
App 20010021134 - Bohm, Thomas ;   et al.
2001-09-13

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