loadpatents
name:-0.15121912956238
name:-0.15368294715881
name:-0.03165602684021
La Rosa; Francesco Patent Filings

La Rosa; Francesco

Patent Applications and Registrations

Patent applications and USPTO patent grants for La Rosa; Francesco.The latest application filed is for "method for in-memory convolutional computation and corresponding integrated circuit".

Company Profile
15.103.100
  • La Rosa; Francesco - Rousset FR
  • La Rosa; Francesco - Catania IT
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Device of physically unclonable function with transistors, and manufacturing method
Grant 11,405,223 - La Rosa , et al. August 2, 2
2022-08-02
Method For In-memory Convolutional Computation And Corresponding Integrated Circuit
App 20220044099 - Conte; Antonino ;   et al.
2022-02-10
Method And Apparatus For Convolutional Computation Based On Floating Gate Nvm Array
App 20220043885 - La Rosa; Francesco ;   et al.
2022-02-10
Power-on-reset circuit and corresponding electronic device
Grant 11,171,644 - Conte , et al. November 9, 2
2021-11-09
Method For Writing In A Non-volatile Memory According To The Ageing Of The Memory Cells And Corresponding Integrated Circuit
App 20210319836 - LA ROSA; Francesco ;   et al.
2021-10-14
Physical Unclonable Function Device And Method
App 20210303735 - La Rosa; Francesco
2021-09-30
Power-on-reset Circuit And Corresponding Electronic Device
App 20210297074 - Conte; Antonino ;   et al.
2021-09-23
Non-volatile memory data bus
Grant 11,056,180 - La Rosa July 6, 2
2021-07-06
Structure and method of forming a semiconductor device
Grant 10,971,633 - La Rosa , et al. April 6, 2
2021-04-06
Structure and Method of Forming a Semiconductor Device
App 20210066510 - La Rosa; Francesco ;   et al.
2021-03-04
Non-volatile Memory Data Bus
App 20200342930 - LA ROSA; Francesco
2020-10-29
Method for programming a split-gate memory cell and corresponding memory device
Grant 10,796,763 - La Rosa , et al. October 6, 2
2020-10-06
Compact non-volatile memory device of the type with charge trapping in a dielectric interface
Grant 10,790,293 - La Rosa , et al. September 29, 2
2020-09-29
Device Of Physically Unclonable Function With Transistors, And Manufacturing Method
App 20200274722 - La Rosa; Francesco ;   et al.
2020-08-27
Device Of Physically Unclonable Function With Floating Gate Transistors, And Manufacturing Method
App 20200274723 - La Rosa; Francesco
2020-08-27
Memory cell comprising non-self-aligned horizontal and vertical control gates
Grant 10,686,046 - La Rosa , et al.
2020-06-16
Circuit and method for detecting a fault attack
Grant 10,677,839 - La Rosa
2020-06-09
Electronic circuit with device for monitoring a power supply using a trip threshold chosen from a range of voltages around a band gap voltage
Grant 10,673,431 - Fort , et al.
2020-06-02
Electronic circuit with device for monitoring a power supply
Grant 10,560,089 - Borrel , et al. Feb
2020-02-11
Method for fabricating an array of diodes, in particular for a non-volatile memory, and corresponding device
Grant 10,541,270 - La Rosa , et al. Ja
2020-01-21
Compact Non-volatile Memory Device Of The Type With Charge Trapping In A Dielectric Interface
App 20190371805 - La Rosa; Francesco ;   et al.
2019-12-05
Memory Cell Comprising Non-self-aligned Horizontal And Vertical Control Gates
App 20190341462 - LA ROSA; Francesco ;   et al.
2019-11-07
Compact non-volatile memory device of the type with charge trapping in a dielectric interface
Grant 10,438,960 - La Rosa , et al. O
2019-10-08
Memory cell comprising non-self-aligned horizontal and vertical control gates
Grant 10,403,730 - La Rosa , et al. Sep
2019-09-03
Method For Programming A Split-gate Memory Cell And Corresponding Memory Device
App 20190237141 - LA ROSA; Francesco ;   et al.
2019-08-01
Testing circuit of a longtime-constant circuit stage and corresponding testing method
Grant 10,281,512 - Conte , et al.
2019-05-07
Electronic Circuit With Device For Monitoring A Power Supply Using A Trip Threshold Chosen From A Range Of Voltages Around A Band Gap Voltage
App 20190123737 - FORT; Jimmy ;   et al.
2019-04-25
Electronic Circuit With Device For Monitoring A Power Supply
App 20190123736 - BORREL; Nicolas ;   et al.
2019-04-25
Method for Forming a PN Junction and Associated Semiconductor Device
App 20190067309 - La Rosa; Francesco ;   et al.
2019-02-28
Reading circuit of a long time constant circuit stage and corresponding reading method
Grant 10,217,503 - Conte , et al. Feb
2019-02-26
Ring oscillator operation management method and apparatus
Grant 10,218,336 - La Rosa Feb
2019-02-26
Reading Circuit of a Long time Constant Circuit Stage and Corresponding Reading Method
App 20190035450 - Conte; Antonino ;   et al.
2019-01-31
Vertical memory cell with non-self-aligned floating drain-source implant
Grant 10,192,999 - Mantelli , et al. Ja
2019-01-29
Method for forming a PN junction and associated semiconductor device
Grant 10,147,733 - La Rosa , et al. De
2018-12-04
Method for reducing a memory operation time in a non-volatile memory device and corresponding non-volatile memory device
Grant 10,147,490 - Grande , et al. De
2018-12-04
Reading circuit with a shifting stage and corresponding reading method
Grant 10,127,966 - Conte , et al. November 13, 2
2018-11-13
Vertical bipolar transistor
Grant 10,128,314 - Boivin , et al. November 13, 2
2018-11-13
Method For Fabricating An Array Of Diodes, In Particular For A Non-volatile Memory, And Corresponding Device
App 20180294313 - La Rosa; Francesco ;   et al.
2018-10-11
Method for managing a fail row of the memory plane of a non volatile memory and corresponding memory device
Grant 10,083,753 - La Rosa , et al. September 25, 2
2018-09-25
Method and device for controlling a charge pump circuit
Grant 10,038,372 - La Rosa , et al. July 31, 2
2018-07-31
Memory Cell Comprising Non-self-aligned Horizontal And Vertical Control Gates
App 20180197963 - LA ROSA; Francesco ;   et al.
2018-07-12
Method for fabricating an array of diodes, in particular for a non-volatile memory, and corresponding device
Grant 10,002,906 - La Rosa , et al. June 19, 2
2018-06-19
Sense amplifier
Grant 9,997,213 - La Rosa , et al. June 12, 2
2018-06-12
Method For Reducing A Memory Operation Time In A Non-volatile Memory Device And Corresponding Non-volatile Memory Device
App 20180151231 - Grande; Francesca ;   et al.
2018-05-31
Compact Non-volatile Memory Device Of The Type With Charge Trapping In A Dielectric Interface
App 20180151584 - La Rosa; Francesco ;   et al.
2018-05-31
Method for managing a fail bit line of a memory plane of a non volatile memory and corresponding memory device
Grant 9,984,770 - La Rosa , et al. May 29, 2
2018-05-29
Vertical Memory Cell With Non-self-aligned Floating Drain-source Implant
App 20180145183 - MANTELLI; Marc ;   et al.
2018-05-24
Method for Managing a Fail Row of the Memory Plane of a Non Volatile Memory and Corresponding Memory Device
App 20180108413 - La Rosa; Francesco ;   et al.
2018-04-19
Non-volatile memory with a variable polarity line decoder
Grant 9,941,010 - La Rosa April 10, 2
2018-04-10
Twin memory cell interconnection structure
Grant 9,941,012 - La Rosa , et al. April 10, 2
2018-04-10
Memory cell comprising non-self-aligned horizontal and vertical control gates
Grant 9,941,369 - La Rosa , et al. April 10, 2
2018-04-10
Ring Oscillator Operation Management Method And Apparatus
App 20180091094 - La Rosa; Francesco
2018-03-29
Method for managing a fail row of the memory plane of a non volatile memory and corresponding memory device
Grant 9,875,798 - La Rosa , et al. January 23, 2
2018-01-23
Vertical memory cell with non-self-aligned floating drain-source implant
Grant 9,876,122 - Mantelli , et al. January 23, 2
2018-01-23
Reading Circuit with a Shifting Stage and Corresponding Reading Method
App 20180005684 - Conte; Antonino ;   et al.
2018-01-04
Testing Circuit of a Longtime-Constant Circuit Stage and Corresponding Testing Method
App 20180003761 - Conte; Antonino ;   et al.
2018-01-04
Method For Fabricating An Array Of Diodes, In Particular For A Non-volatile Memory, And Corresponding Device
App 20170352703 - La Rosa; Francesco ;   et al.
2017-12-07
Method for Forming a PN Junction and Associated Semiconductor Device
App 20170345836 - La Rosa; Francesco ;   et al.
2017-11-30
Read performance of a non-volatile memory device, in particular a non-volatile memory device with buried selection transistor
Grant 9,825,186 - La Rosa , et al. November 21, 2
2017-11-21
Sense Amplifier
App 20170323670 - La Rosa; Francesco ;   et al.
2017-11-09
Sense Amplifier For Memory Device
App 20170301378 - La Rosa; Francesco ;   et al.
2017-10-19
Method and Device for Controlling a Charge Pump Circuit
App 20170302168 - La Rosa; Francesco ;   et al.
2017-10-19
Sense amplifier for memory device
Grant 9,792,962 - La Rosa , et al. October 17, 2
2017-10-17
Read Performance Of A Non-volatile Memory Device, In Particular A Non-volatile Memory Device With Buried Selection Transistor
App 20170278577 - La Rosa; Francesco ;   et al.
2017-09-28
Circuit And Method For Detecting A Fault Attack
App 20170254848 - La Rosa; Francesco
2017-09-07
Circuit and method for detecting a fault attack
Grant 9,714,976 - La Rosa July 25, 2
2017-07-25
Dynamic sense amplifier with offset compensation
Grant 9,698,765 - La Rosa , et al. July 4, 2
2017-07-04
Memory cell having a vertical selection gate formed in an FDSOI substrate
Grant 9,691,866 - Regnier , et al. June 27, 2
2017-06-27
Twin Memory Cell Interconnection Structure
App 20170178733 - LA ROSA; Francesco ;   et al.
2017-06-22
Method for Managing a Fail Row of the Memory Plane of a Non Volatile Memory and Corresponding Memory Device
App 20170162264 - La Rosa; Francesco ;   et al.
2017-06-08
Method for Managing a Fail Bit Line of a Memory Plane of a Non Volatile Memory and Corresponding Memory Device
App 20170163291 - La Rosa; Francesco ;   et al.
2017-06-08
Integrated circuit protected from short circuits caused by silicide
Grant 9,666,484 - Regnier , et al. May 30, 2
2017-05-30
Individually read-accessible twin memory cells
Grant 9,653,470 - La Rosa , et al. May 16, 2
2017-05-16
Vertical Bipolar Transistor
App 20170117326 - Boivin; Philippe ;   et al.
2017-04-27
Sense amplifier circuit with offset compensation for a non-volatile memory device
Grant 9,627,011 - Conte , et al. April 18, 2
2017-04-18
Twin memory cell interconnection structure
Grant 9,627,068 - La Rosa , et al. April 18, 2
2017-04-18
Dual non-volatile memory cell comprising an erase transistor
Grant 9,613,709 - La Rosa , et al. April 4, 2
2017-04-04
Non-volatile Memory With A Variable Polarity Line Decoder
App 20170084336 - La Rosa; Francesco
2017-03-23
Vertical Memory Cell With Non-self-aligned Floating Drain-source Implant
App 20170084749 - MANTELLI; Marc ;   et al.
2017-03-23
Vertical bipolar transistor
Grant 9,570,513 - Boivin , et al. February 14, 2
2017-02-14
Dual Non-volatile Memory Cell Comprising An Erase Transistor
App 20170011804 - La Rosa; Francesco ;   et al.
2017-01-12
Vertical memory cell with non-self-aligned floating drain-source implant
Grant 9,543,311 - Mantelli , et al. January 10, 2
2017-01-10
Non-volatile memory with a variable polarity line decoder
Grant 9,543,018 - La Rosa January 10, 2
2017-01-10
Memory Cell Having A Vertical Selection Gate Formed In An Fdsoi Substrate
App 20160372561 - Regnier; Arnaud ;   et al.
2016-12-22
Method and device for characterizing or measuring a floating capacitance
Grant 9,506,964 - La Rosa November 29, 2
2016-11-29
Twin Memory Cell Interconnection Structure
App 20160336070 - La Rosa; Francesco ;   et al.
2016-11-17
Dual non-volatile memory cell comprising an erase transistor
Grant 9,484,107 - La Rosa , et al. November 1, 2
2016-11-01
Memory Cell Comprising Non-self-aligned Horizontal And Vertical Control Gates
App 20160308011 - LA ROSA; Francesco ;   et al.
2016-10-20
Page or word-erasable composite non-volatile memory
Grant 9,460,798 - La Rosa October 4, 2
2016-10-04
Lower power sense amplifier for reading non-volatile memory cells
Grant 9,460,761 - La Rosa October 4, 2
2016-10-04
Memory cell having a vertical selection gate formed in an FDSOI substrate
Grant 9,461,129 - Regnier , et al. October 4, 2
2016-10-04
Method for programming a non-volatile memory cell comprising a shared select transistor gate
Grant 9,443,598 - La Rosa , et al. September 13, 2
2016-09-13
Non-volatile Memory With A Variable Polarity Line Decoder
App 20160247572 - La Rosa; Francesco
2016-08-25
Memory cell comprising non-self-aligned horizontal and vertical control gates
Grant 9,406,686 - La Rosa , et al. August 2, 2
2016-08-02
Memory Cell Having A Vertical Selection Gate Formed In An Fdsoi Substrate
App 20160181265 - Regnier; Arnaud ;   et al.
2016-06-23
Method for biasing an embedded source plane of a non-volatile memory having vertical select gates
Grant 9,368,215 - La Rosa , et al. June 14, 2
2016-06-14
Method For Biasing An Embedded Source Plane Of A Non-volatile Memory Having Vertical Select Gates
App 20160071598 - La Rosa; Francesco ;   et al.
2016-03-10
Page Or Word-erasable Composite Non-volatile Memory
App 20160064089 - La Rosa; Francesco
2016-03-03
Low-power Sense Amplifier
App 20160049179 - LA ROSA; Francesco
2016-02-18
Hot-carrier injection programmable memory and method of programming such a memory
Grant 9,224,482 - La Rosa , et al. December 29, 2
2015-12-29
Individually Read-accessible Twin Memory Cells
App 20150348981 - La Rosa; Francesco ;   et al.
2015-12-03
Method For Programming A Non-volatile Memory Cell Comprising A Shared Select Transistor Gate
App 20150348635 - La Rosa; Francesco ;   et al.
2015-12-03
Dual Non-volatile Memory Cell Comprising An Erase Transistor
App 20150348640 - La Rosa; Francesco ;   et al.
2015-12-03
Integrated Circuit Protected From Short Circuits Caused By Silicide
App 20150325581 - Regnier; Arnaud ;   et al.
2015-11-12
Vertical Memory Cell With Non-self-aligned Floating Drain-source Implant
App 20150236031 - MANTELLI; Marc ;   et al.
2015-08-20
Electric charge flow circuit for a time measurement
Grant 9,110,116 - La Rosa , et al. August 18, 2
2015-08-18
Method and device for characterizing or measuring a capacitance
Grant 9,091,713 - La Rosa July 28, 2
2015-07-28
Non-volatile memory with vertical selection transistors
Grant 9,076,878 - La Rosa , et al. July 7, 2
2015-07-07
Circuit And Method For Detecting A Fault Attack
App 20150130502 - La Rosa; Francesco
2015-05-14
Memory Cell Comprising Non-self-aligned Horizontal And Vertical Control Gates
App 20150117117 - La Rosa; Francesco ;   et al.
2015-04-30
Hot-carrier Injection Programmable Memory And Method Of Programming Such A Memory
App 20150117109 - LA ROSA; Francesco ;   et al.
2015-04-30
Method of manufacturing a non-volatile memory
Grant 9,012,961 - La Rosa , et al. April 21, 2
2015-04-21
Circuit and method for detecting a fault attack
Grant 8,963,574 - La Rosa February 24, 2
2015-02-24
Electric Charge Flow Circuit For A Time Measurement
App 20150043269 - La Rosa; Francesco ;   et al.
2015-02-12
Nonvolatile memory comprising mini wells at a floating potential
Grant 8,940,604 - La Rosa January 27, 2
2015-01-27
Nonvolatile memory cells with a vertical selection gate of variable depth
Grant 8,901,634 - La Rosa , et al. December 2, 2
2014-12-02
Electric charge flow circuit for a time measurement
Grant 8,872,177 - La Rosa , et al. October 28, 2
2014-10-28
Method of reading and writing nonvolatile memory cells
Grant 8,830,761 - La Rosa , et al. September 9, 2
2014-09-09
Integrated Circuit Protected From Short Circuits Caused By Silicide
App 20140246720 - Regnier; Arnaud ;   et al.
2014-09-04
Hot electron injection nanocrystals MOS transistor
Grant 8,824,210 - La Rosa September 2, 2
2014-09-02
Device for protecting an integrated circuit against back side attacks
Grant 8,809,858 - Lisart , et al. August 19, 2
2014-08-19
Method Of Manufacturing A Non-volatile Memory
App 20140191291 - La Rosa; Francesco ;   et al.
2014-07-10
Vertical Bipolar Transistor
App 20140191179 - Boivin; Philippe ;   et al.
2014-07-10
Non-volatile Memory With Vertical Selection Transistors
App 20140097481 - La Rosa; Francesco ;   et al.
2014-04-10
Nonvolatile Memory Comprising Mini Wells At A Floating Potential
App 20130250700 - La Rosa; Francesco
2013-09-26
Method Of Reading And Writing Nonvolatile Memory Cells
App 20130229875 - La Rosa; Francesco ;   et al.
2013-09-05
Nonvolatile Memory Cells With A Vertical Selection Gate Of Variable Depth
App 20130228846 - LA ROSA; Francesco ;   et al.
2013-09-05
Sense amplifier with fast bitline precharge means
Grant 8,467,251 - La Rosa June 18, 2
2013-06-18
Electric Charge Flow Circuit For A Time Measurement
App 20130088263 - La Rosa; Francesco ;   et al.
2013-04-11
Method And Device For Characterizing Or Measuring A Floating Capacitance
App 20130063157 - La Rosa; Francesco
2013-03-14
Sense Amplifier With Fast Bitline Precharge Means
App 20130064021 - La Rosa; Francesco
2013-03-14
Method And Device For Characterizing Or Measuring A Capacitance
App 20130057298 - La Rosa; Francesco
2013-03-07
EEPROM memory architecture optimized for embedded memories
Grant 8,391,079 - La Rosa March 5, 2
2013-03-05
Charge pump stage, method for controlling a charge pump stage and memory having a charge pump stage
Grant 8,390,366 - Pagano , et al. March 5, 2
2013-03-05
Self-timed low power sense amplifier
Grant 8,363,499 - La Rosa January 29, 2
2013-01-29
Programming of a charge retention circuit for a time measurement
Grant 8,339,848 - La Rosa December 25, 2
2012-12-25
Charge retention circuit for a time measurement
Grant 8,331,203 - La Rosa December 11, 2
2012-12-11
EEPROM charge retention circuit for time measurement
Grant 8,320,176 - La Rosa November 27, 2
2012-11-27
Sense amplifier with fast bitline precharge means
Grant 8,305,815 - La Rosa November 6, 2
2012-11-06
Hot Electron Injection Nanocrystals Mos Transistor
App 20120250417 - La Rosa; Francesco
2012-10-04
Circuit And Method For Detecting A Fault Attack
App 20110267094 - La Rosa; Francesco
2011-11-03
Non-volatile memory including an auxiliary memory area with rotating sectors
Grant 8,050,107 - La Rosa , et al. November 1, 2
2011-11-01
Fast writing non-volatile memory with main and auxiliary memory areas
Grant 8,050,106 - La Rosa , et al. November 1, 2
2011-11-01
Circuit for reading a charge retention element for a time measurement
Grant 8,036,020 - La Rosa October 11, 2
2011-10-11
Internal Supply Voltage Circuit Of An Integrated Circuit
App 20110215862 - La Rosa; Francesco
2011-09-08
Charge Pump Stage, Method For Controlling A Charge Pump Stage And Memory Having A Charge Pump Stage
App 20110128070 - Pagano; Santi Nunzio Antonino ;   et al.
2011-06-02
Sense Amplifier With Fast Bitline Precharge Means
App 20110090745 - La Rosa; Francesco
2011-04-21
Self-timed Low Power Sense Amplifier
App 20110026346 - La Rosa; Francesco
2011-02-03
Phase change memory erasable and programmable by a row decoder
Grant 7,869,268 - Giovinazzi , et al. January 11, 2
2011-01-11
Eeprom Memory Architecture Optimized For Embedded Memories
App 20100331045 - La Rosa; Francesco
2010-12-30
Fast erasable non-volatile memory
Grant 7,791,953 - La Rosa , et al. September 7, 2
2010-09-07
Sense amplifier for non-volatile memories
Grant 7,733,726 - La Rosa June 8, 2
2010-06-08
Circuit For Reading A Charge Retention Element For A Time Measurement
App 20100054024 - La Rosa; Francesco
2010-03-04
Programming Of A Charge Retention Circuit For A Time Measurement
App 20100054038 - La Rosa; Francesco
2010-03-04
Eeprom Charge Retention Circuit For Time Measurement
App 20100027334 - La Rosa; Francesco
2010-02-04
Charge Retention Circuit For A Time Measurement
App 20100020648 - La Rosa; Francesco
2010-01-28
Method for reading electrically programmable and erasable memory cells, with bit line precharge-ahead
Grant 7,529,145 - La Rosa , et al. May 5, 2
2009-05-05
EEPROM memory having an improved resistance to the breakdown of transistors
Grant 7,492,639 - La Rosa February 17, 2
2009-02-17
Non-volatile Memory With Auxiliary Rotating Sectors
App 20080301357 - La Rosa; Francesco ;   et al.
2008-12-04
Fast Writing Non-volatile Memory
App 20080301356 - La Rosa; Francesco ;   et al.
2008-12-04
Fast Erasable Non-volatile Memory
App 20080273400 - La Rosa; Francesco ;   et al.
2008-11-06
EEPROM memory architecture
Grant 7,414,893 - La Rosa August 19, 2
2008-08-19
Sense Amplifier For Non-volatile Memories
App 20080175075 - La Rosa; Francesco
2008-07-24
Phase Change Memory Erasable And Programmable By A Row Decoder
App 20080062752 - Giovinazzi; Thierry ;   et al.
2008-03-13
Eeprom Memory Having An Improved Resistance To The Breakdown Of Transistors
App 20080002474 - La Rosa; Francesco
2008-01-03
EEPROM memory architecture
App 20060262603 - La Rosa; Francesco
2006-11-23
Double read stage sense amplifier
Grant 7,031,212 - La Rosa April 18, 2
2006-04-18
Method for reading electrically programmable and erasable memory cells, with bit line precharge-ahead
App 20060067129 - La Rosa; Francesco ;   et al.
2006-03-30
EEPROM memory protected against the effects from a breakdown of an access transistor
Grant 6,934,192 - Tailliet , et al. August 23, 2
2005-08-23
Programmable POR circuit with two switching thresholds
Grant 6,897,689 - La Rosa May 24, 2
2005-05-24
EEPROM memory including an error correction system
Grant 6,854,083 - La Rosa February 8, 2
2005-02-08
Double read stage sense amplifier
App 20040252568 - La Rosa, Francesco
2004-12-16
Current or voltage generator with a temperature stable operating point
Grant 6,831,503 - La Rosa December 14, 2
2004-12-14
Electrically erasable and programmable memory comprising an internal supply voltage management device
Grant 6,829,169 - Ganivet , et al. December 7, 2
2004-12-07
Supply voltage comparator
Grant 6,812,747 - Ganivet , et al. November 2, 2
2004-11-02
Read amplifier with a low current consumption differential output stage
Grant 6,760,265 - La Rosa July 6, 2
2004-07-06
EEPROM memory comprising means for simultaneous reading of special bits of a first and second type
Grant 6,738,286 - La Rosa May 18, 2
2004-05-18
Method for the correction of a bit in a string of bits
Grant 6,735,733 - La Rosa May 11, 2
2004-05-11
Bias circuit with voltage and temperature stable operating point
Grant 6,724,243 - La Rosa April 20, 2
2004-04-20
Programmable POR circuit with two switching thresholds
App 20040070430 - La Rosa, Francesco
2004-04-15
Supply voltage comparator
App 20040032243 - Ganivet, Filipe ;   et al.
2004-02-19
Electrically erasable and programmable memory comprising an internal supply voltage management device
App 20030223289 - Ganivet, Filipe ;   et al.
2003-12-04
Current or voltage generator with a temperature stable operating point
App 20030143796 - La Rosa, Francesco
2003-07-31
Read amplifier with a low current consumption differential output stage
App 20030095453 - La Rosa, Francesco
2003-05-22
EEPROM memory comprising means for simultaneous reading of special bits of a first and second type
App 20030090936 - La Rosa, Francesco
2003-05-15
EEPROM memory protected against the effects from a breakdown of an access transistor
App 20030035329 - Tailliet, Francois ;   et al.
2003-02-20
Circuit for the filtering of parasitic logic signals
Grant 6,507,221 - La Rosa January 14, 2
2003-01-14
Antistatic contact for a polycrystalline silicon line
App 20030001228 - Boivin, Philippe ;   et al.
2003-01-02
Circuit for the filtering of parasitic logic signals
App 20020113643 - La Rosa, Francesco
2002-08-22
Buffer circuit for the reception of a clock signal
App 20020070757 - La Rosa, Francesco
2002-06-13
Method for the correction of a bit in a string of bits
App 20010044922 - La Rosa, Francesco
2001-11-22
Sense amplifier for non-volatile memory devices
Grant 6,094,394 - La Rosa July 25, 2
2000-07-25
Dynamic sense amplifier for EPROM, EEPROM and flash-EPROM memory devices
Grant 6,072,727 - La Rosa June 6, 2
2000-06-06
Bitline bias circuit for non-volatile memory devices
Grant 6,049,491 - La Rosa April 11, 2
2000-04-11

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