loadpatents
Patent applications and USPTO patent grants for Kung; Moriss.The latest application filed is for "multi-chip package".
Patent | Date |
---|---|
Multi-chip package Grant 8,269,329 - Kung , et al. September 18, 2 | 2012-09-18 |
Chip package Grant 7,638,881 - Chang , et al. December 29, 2 | 2009-12-29 |
Manufacturing process of a chip package structure Grant 7,622,326 - Ho , et al. November 24, 2 | 2009-11-24 |
Multi-chip package App 20090200651 - Kung; Moriss ;   et al. | 2009-08-13 |
Chip and manufacturing method and application thereof Grant 7,504,726 - Ho , et al. March 17, 2 | 2009-03-17 |
Multi-conducting through hole structure Grant 7,470,864 - Ho , et al. December 30, 2 | 2008-12-30 |
Chip package and bump connecting structure thereof Grant 7,382,049 - Ho , et al. June 3, 2 | 2008-06-03 |
Chip And Manufacturing Method And Application Thereof App 20080122077 - Ho; Kwun-Yao ;   et al. | 2008-05-29 |
Electronic Apparatus App 20080084677 - Ho; Chih-Long ;   et al. | 2008-04-10 |
Low coefficient of thermal expansion build-up layer packaging and method thereof Grant 7,342,317 - Ho , et al. March 11, 2 | 2008-03-11 |
Chip package and fabricating method thereof App 20070222072 - Chang; Chia-Jung ;   et al. | 2007-09-27 |
Chip carrier with oxidation protection layer Grant 7,247,951 - Ho , et al. July 24, 2 | 2007-07-24 |
Semiconductor package and fabricating method thereof App 20070164447 - Ho; Kwun-Yao ;   et al. | 2007-07-19 |
Conductive block mounting process for electrical connection Grant 7,235,429 - Ho , et al. June 26, 2 | 2007-06-26 |
Bumpless chip package and fabricating process thereof App 20070069352 - Ho; Kwun-Yao ;   et al. | 2007-03-29 |
Chip package and bump connecting structure thereof App 20070045869 - Ho; Kwun-Yao ;   et al. | 2007-03-01 |
Stacked multi-chip package Grant 7,180,166 - Ho , et al. February 20, 2 | 2007-02-20 |
Integrated circuit package with a balanced-part structure Grant 7,176,559 - Ho , et al. February 13, 2 | 2007-02-13 |
High performance thermally enhanced package and method of fabricating the same Grant 7,173,341 - Ho , et al. February 6, 2 | 2007-02-06 |
Manufacturing Process Of A Chip Package Structure App 20060231863 - Ho; Kwun-Yao ;   et al. | 2006-10-19 |
Flip chip package and the fabrication thereof App 20060220245 - Ho; Kwun-Yao ;   et al. | 2006-10-05 |
Integrated circuit packages without solder mask and method for the same Grant 7,101,781 - Ho , et al. September 5, 2 | 2006-09-05 |
Electrical package capable of increasing the density of bonding pads and fine circuit lines inside a interconnection Grant 7,071,569 - Ho , et al. July 4, 2 | 2006-07-04 |
Assembly structure and method for embedded passive device App 20060118931 - Ho; Kwun-Yao ;   et al. | 2006-06-08 |
Packaging substrate without plating bar and a method of forming the same Grant 7,033,917 - Ho , et al. April 25, 2 | 2006-04-25 |
Cavity-down stacked multi-chip package App 20060071314 - Ho; Kwun-Yao ;   et al. | 2006-04-06 |
Chip carrier and chip package structure thereof App 20060055023 - Ho; Kwun-Yao ;   et al. | 2006-03-16 |
Multi-conducting through hole structure App 20060012030 - Ho; Kwun-Yao ;   et al. | 2006-01-19 |
Circuit board and fabricating process thereof Grant 6,981,320 - Ho , et al. January 3, 2 | 2006-01-03 |
Module board having embedded chips and components and method of forming the same Grant 6,972,964 - Ho , et al. December 6, 2 | 2005-12-06 |
Packaging substrate without plating bar and a method of forming the same App 20050266608 - Ho, Kwun-Yao ;   et al. | 2005-12-01 |
Fine-pitch packaging substrate and a method of forming the same App 20050258551 - Ho, Kwun-Yao ;   et al. | 2005-11-24 |
Stacked multi-chip package App 20050253224 - Ho, Kwun-Yao ;   et al. | 2005-11-17 |
Multi-chip package and manufacturing method thereof Grant 6,960,826 - Ho , et al. November 1, 2 | 2005-11-01 |
Chip Packaging Structure App 20050230797 - Ho, Kwun-Yo ;   et al. | 2005-10-20 |
Chip packaging structure and manufacturing process thereof Grant 6,951,773 - Ho , et al. October 4, 2 | 2005-10-04 |
Vertical routing structure Grant 6,946,727 - Ho , et al. September 20, 2 | 2005-09-20 |
Process of plating through hole App 20050196898 - Ho, Kwun-Yao ;   et al. | 2005-09-08 |
Low coefficient of thermal expansion build-up layer packaging and method thereof App 20050189644 - Ho, Kwun-Yao ;   et al. | 2005-09-01 |
Electrical connection device between a pin-typed IC package and a circuit board Grant 6,929,488 - Kung , et al. August 16, 2 | 2005-08-16 |
Bump process for flip chip package Grant 6,916,687 - Ho , et al. July 12, 2 | 2005-07-12 |
Lamination process and structure of high layout density substrate Grant 6,913,814 - Ho , et al. July 5, 2 | 2005-07-05 |
Module board having embedded chips and components and method of forming the same App 20050122698 - Ho, Kwun-Yao ;   et al. | 2005-06-09 |
Process of forming bonding columns Grant 6,902,997 - Ho , et al. June 7, 2 | 2005-06-07 |
Method of fabricating circuit substrate Grant 6,896,173 - Ho , et al. May 24, 2 | 2005-05-24 |
Tab package Grant 6,894,904 - Kung , et al. May 17, 2 | 2005-05-17 |
Pattern formation process for an integrated circuit substrate Grant 6,881,662 - Kung , et al. April 19, 2 | 2005-04-19 |
Chip scale package with heat dissipating part Grant 6,876,087 - Ho , et al. April 5, 2 | 2005-04-05 |
Module board having embedded chips and components and method of forming the same Grant 6,865,089 - Ho , et al. March 8, 2 | 2005-03-08 |
[electrical Package And Manufacturing Method Thereof] App 20050035464 - Ho, Kwun-Yao ;   et al. | 2005-02-17 |
Bump transfer fixture App 20050035453 - Ho, Kwun-Yao ;   et al. | 2005-02-17 |
[multi-chip Package And Manufacturing Method Thereof] App 20050029644 - Ho, Kwun-Yao ;   et al. | 2005-02-10 |
Conductive block mounting process for electrical connection App 20050026330 - Ho, Kwun-Yao ;   et al. | 2005-02-03 |
Process of forming bonding columns Grant 6,849,534 - Ho , et al. February 1, 2 | 2005-02-01 |
High density integrated circuit packages and method for the same Grant 6,849,955 - Ho , et al. February 1, 2 | 2005-02-01 |
[method Of Fabricating Circuit Substrate] App 20050017058 - Ho, Kwun-Yao ;   et al. | 2005-01-27 |
[multi-chip Package] App 20050017336 - Kung, Moriss ;   et al. | 2005-01-27 |
Integrated circuit package with a balanced-part structure App 20050012189 - Ho, Kwun Yao ;   et al. | 2005-01-20 |
Under-bump metallugical structure App 20050012211 - Kung, Moriss ;   et al. | 2005-01-20 |
Process of forming bonding columns App 20050003651 - Ho, Kwun-Yao ;   et al. | 2005-01-06 |
Circuit board and fabricating process thereof App 20040238215 - Ho, Kwun-Yao ;   et al. | 2004-12-02 |
[bump Process For Flip Chip Package] App 20040241911 - HO, KWUN-YAO ;   et al. | 2004-12-02 |
Vertical routing structure App 20040211594 - Ho, Kwun-Yao ;   et al. | 2004-10-28 |
Hybrid interconnect substrate and method of manufacture thereof Grant 6,808,643 - Ho , et al. October 26, 2 | 2004-10-26 |
Vertical routing structure App 20040155347 - Ho, Kwun-Yao ;   et al. | 2004-08-12 |
[chip Package Structure And Manufacturing Process Thereof] App 20040155357 - HO, KWUN-YAO ;   et al. | 2004-08-12 |
High-density multichip module package App 20040124513 - Ho, Kwun Yao ;   et al. | 2004-07-01 |
Lamination process and structure of high layout density substrate App 20040105955 - Ho, Kwun Yao ;   et al. | 2004-06-03 |
Method for manufacturing multi-layer package substrates Grant 6,743,659 - Kung , et al. June 1, 2 | 2004-06-01 |
Chip Packaging Structure And Manufacturing Process Thereof App 20040090756 - Ho, Kwun-Yo ;   et al. | 2004-05-13 |
Process of forming bonding columns App 20040082161 - Ho, Kwun-Yao ;   et al. | 2004-04-29 |
Hybrid interconnect substrate and method of manufacture thereof App 20040074865 - Ho, Kwun-Yao ;   et al. | 2004-04-22 |
Electrical connection device App 20040072462 - Kung, Moriss ;   et al. | 2004-04-15 |
Flexible electric-contact structure for IC package Grant 6,716,037 - Kung , et al. April 6, 2 | 2004-04-06 |
Fabrication process and structure of laminated capacitor Grant 6,716,692 - Ho , et al. April 6, 2 | 2004-04-06 |
High density integrated circuit package Grant 6,717,264 - Ho , et al. April 6, 2 | 2004-04-06 |
Chip package structure Grant 6,707,162 - Ho , et al. March 16, 2 | 2004-03-16 |
High density integrated circuit packages and method for the same App 20040046264 - Ho, Kwun Yao ;   et al. | 2004-03-11 |
Tab Package And Method For Fabricating The Same App 20040042185 - Kung, Moriss ;   et al. | 2004-03-04 |
Chip Scale Package And Manufacturing Method Therefor App 20040036180 - HO, KWUN-YAO ;   et al. | 2004-02-26 |
High performance thermally enhanced package and method of fabricating the same App 20040036154 - Ho, Kwun-Yao ;   et al. | 2004-02-26 |
Metal post manufacturing method Grant 6,696,305 - Kung , et al. February 24, 2 | 2004-02-24 |
Thin planar heat distributor Grant 6,695,040 - Kung , et al. February 24, 2 | 2004-02-24 |
Electrical connection device Grant 6,692,265 - Kung , et al. February 17, 2 | 2004-02-17 |
Flexible electric-contact structure for IC package App 20040018753 - Kung, Moriss ;   et al. | 2004-01-29 |
Module board having embedded chips and components and method of forming the same App 20040001324 - Ho, Kwun Yao ;   et al. | 2004-01-01 |
Method for high layout density integrated circuit package substrate Grant 6,667,190 - Kung , et al. December 23, 2 | 2003-12-23 |
High-density integrated circuit package and method for the same App 20030218249 - Ho, Kwun-Yao ;   et al. | 2003-11-27 |
Integrated circuit packages without solder mask and method for the same App 20030218055 - Ho, Kun-Yao ;   et al. | 2003-11-27 |
Method For High Layout Density Integrated Circuit Package Substrate App 20030218250 - Kung, Moriss ;   et al. | 2003-11-27 |
Fine patterning and fine solid via process for multi-layer substrate App 20030215566 - Kung, Moriss ;   et al. | 2003-11-20 |
Ultra fine patterning process for multi-layer substrate App 20030196987 - Kung, Moriss ;   et al. | 2003-10-23 |
Pattern formation process for an integrated circuit substrate App 20030190799 - Kung, Moriss ;   et al. | 2003-10-09 |
Pin-typed electric connection device App 20030143884 - Kung, Moriss ;   et al. | 2003-07-31 |
Metal post manufacturing method App 20030139032 - Kung, Moriss ;   et al. | 2003-07-24 |
Method for forming a metal layer on an IC package App 20030138991 - Kung, Moriss | 2003-07-24 |
Method for manufacturing multi-layer package substrates App 20030113951 - Kung, Moriss ;   et al. | 2003-06-19 |
Electrical connection device App 20030114023 - Kung, Moriss ;   et al. | 2003-06-19 |
Structure of a ball-grid array package substrate and processes for producing thereof Grant 6,569,712 - Ho , et al. May 27, 2 | 2003-05-27 |
Structure Of A Ball-grid Array Package Substrate And Processes For Producing Thereof App 20030075357 - Ho, Kwun-Yao ;   et al. | 2003-04-24 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.