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Method for adjusting reading speed of memory system, comparison circuit and memory system
Grant 11,373,693 - Kuang , et al. June 28, 2 | 2022-06-28 |
Method For Adjusting Reading Speed Of Memory System, Comparison Circuit And Memory System
App 20210398575 - KUANG; Jente Benedict ; et al. | 2021-12-23 |
Methods and apparatus for varying a supply voltage or reference voltage using independent control of diode voltage in asymmetrical double-gate devices
Grant 9,076,509 - Chuang , et al. July 7, 2 | 2015-07-07 |
Structure for high density stable static random access memory
Grant 8,405,129 - Chuang , et al. March 26, 2 | 2013-03-26 |
Design Structure for High Density Stable Static Random Access Memory
App 20120205721 - Chuang; Ching-Te K. ; et al. | 2012-08-16 |
High density stable static random access memory
Grant 8,217,427 - Chuang , et al. July 10, 2 | 2012-07-10 |
Methods and apparatus for varying a supply voltage or reference voltage using independent control of diode voltage in asymmetrical double-gate devices
Grant 7,952,422 - Chuang , et al. May 31, 2 | 2011-05-31 |
Dual gate transistor keeper dynamic logic
Grant 7,876,131 - Chuang , et al. January 25, 2 | 2011-01-25 |
System to evaluate a voltage in a charge pump and associated methods
Grant 7,692,480 - Gebara , et al. April 6, 2 | 2010-04-06 |
System To Evaluate A Voltage In A Charge Pump And Associated Methods
App 20100001766 - Gebara; Fadi Hikmat ; et al. | 2010-01-07 |
Dual Gate Transistor Keeper Dynamic Logic
App 20090302894 - Chuang; Ching-Te ; et al. | 2009-12-10 |
Methods and Apparatus for Varying a Supply Voltage or Reference Voltage Using Independent Control of Diode Voltage in Asymmetrical Double-Gate Devices
App 20090302929 - Chuang; Ching-Te Kent ; et al. | 2009-12-10 |
Methods and Apparatus for Varying a Supply Voltage or Reference Voltage Using Independent Control of Diode Voltage in Asymmetrical Double-Gate Devices
App 20090303778 - Chuang; Ching-Te Kent ; et al. | 2009-12-10 |
Method and Apparatus for Implementing Enhanced Timing Performance Through Bus Signal Wire Permutation With Repowering Buffers
App 20080178133 - Kuang; Jente Benedict ; et al. | 2008-07-24 |
Dual gate transistor keeper dynamic logic
Grant 7,336,105 - Chuang , et al. February 26, 2 | 2008-02-26 |
Independent gate control logic circuitry
Grant 7,265,589 - Chuang , et al. September 4, 2 | 2007-09-04 |
Control circuitry for power gating virtual power supply rails at differing voltage potentials
Grant 7,219,244 - Kuang , et al. May 15, 2 | 2007-05-15 |
Computing carry-in bit to most significant bit carry save adder in current stage
Grant 7,216,141 - Belluomini , et al. May 8, 2 | 2007-05-08 |
Dynamic logic circuit apparatus and method for reducing leakage power consumption via separate clock and output stage control
Grant 7,202,705 - Ngo , et al. April 10, 2 | 2007-04-10 |
Dynamic logic circuit incorporating reduced leakage state-retaining devices
Grant 7,193,446 - Ngo , et al. March 20, 2 | 2007-03-20 |
Control circuitry for power gating virtual power supply rails at differing voltage potentials
App 20070046323 - Kuang; Jente Benedict ; et al. | 2007-03-01 |
Methods and apparatus for varying a supply voltage or reference voltage using independent control of diode voltage in asymmetrical double-gate devices
App 20070047364 - Chuang; Ching-Te Kent ; et al. | 2007-03-01 |
Independent gate control logic circuitry
App 20060290384 - Chuang; Ching-Te ; et al. | 2006-12-28 |
Dual gate dynamic logic
App 20060290383 - Chuang; Ching-Te ; et al. | 2006-12-28 |
Fast turn-off circuit for controlling leakage
Grant 7,142,015 - Kuang , et al. November 28, 2 | 2006-11-28 |
Dynamic logic circuit incorporating reduced leakage state-retaining devices
App 20060103431 - Ngo; Hung Cai ; et al. | 2006-05-18 |
Dynamic logic circuit apparatus and method for reducing leakage power consumption via separate clock and output stage control
App 20060082389 - Ngo; Hung Cai ; et al. | 2006-04-20 |
Fast turn-off circuit for controlling leakage
App 20060061388 - Kuang; Jente Benedict ; et al. | 2006-03-23 |
Computing carry-in bit to most significant bit carry save adder in current stage
App 20050102346 - Belluomini, Wendy A. ; et al. | 2005-05-12 |
SOI FET and method for creating FET body connections with high-quality matching characteristics and no area penalty for partially depleted SOI technologies
Grant 6,635,518 - Aipperspach , et al. October 21, 2 | 2003-10-21 |
Method and apparatus to ensure functionality and timing robustness in SOI circuits
Grant 6,608,785 - Chuang , et al. August 19, 2 | 2003-08-19 |
Method And Apparatus To Ensure Functionality And Timing Robustness In Soi Circuits
App 20030128606 - Chuang, Ching-Te Kent ; et al. | 2003-07-10 |
Method and apparatus for enhanced SOI passgate operations
Grant 6,504,212 - Allen , et al. January 7, 2 | 2003-01-07 |
SOI FET and method for creating FET body connections with high-quality matching characteristics and no area penalty for partially depleted SOI technologies
App 20020145174 - Aipperspach, Anthony Gus ; et al. | 2002-10-10 |
Single-stage tri-state Schmitt trigger
Grant 6,448,830 - Chuang , et al. September 10, 2 | 2002-09-10 |
SOI CMOS Schmitt trigger circuits with controllable hysteresis
Grant 6,441,663 - Chuang , et al. August 27, 2 | 2002-08-27 |
Tri-state dynamic body charge modulation for sensing devices in SOI RAM applications
Grant 6,373,281 - Chuang , et al. April 16, 2 | 2002-04-16 |
Method and apparatus for reducing parasitic bipolar current in a silicon-on-insulator transistor
Grant 6,281,737 - Kuang , et al. August 28, 2 | 2001-08-28 |
Method and apparatus for improving device matching and switching point tolerance in silicon-on-insulator cross-coupled circuits
Grant 6,252,429 - Assaderaghi , et al. June 26, 2 | 2001-06-26 |
SOI CMOS sense amplifier with enhanced matching characteristics and sense point tolerance
Grant 6,222,394 - Allen , et al. April 24, 2 | 2001-04-24 |
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