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name:-0.00050687789916992
Kowarik; Oskar Patent Filings

Kowarik; Oskar

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kowarik; Oskar.The latest application filed is for "circuit for non-destructive, self-normalizing reading-out of mram memory cells".

Company Profile
0.13.10
  • Kowarik; Oskar - Neubiberg DE
  • Kowarik; Oskar - Grafing DE
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Evaluation configuration for semiconductor memories
Grant 6,806,550 - Hoffmann , et al. October 19, 2
2004-10-19
Semiconductor memory device
Grant 6,768,667 - Hoffmann , et al. July 27, 2
2004-07-27
Circuit for non-destructive, self-normalizing reading-out of MRAM memory cells
Grant 6,747,891 - Hoffmann , et al. June 8, 2
2004-06-08
Circuit for non-destructive, self-normalizing reading-out of MRAM memory cells
App 20040017712 - Hoffmann, Kurt ;   et al.
2004-01-29
Resistive ferroelectric memory cell
Grant 6,627,935 - Kowarik , et al. September 30, 2
2003-09-30
Semiconductor memory device
App 20030058710 - Hoffmann, Kurt ;   et al.
2003-03-27
Evaluation configuration for semiconductor memories
App 20030052344 - Hoffmann, Kurt ;   et al.
2003-03-20
Method for reading nonvolatile semiconductor memory configurations
Grant 6,407,945 - von Schwerin , et al. June 18, 2
2002-06-18
Method for nondestructively reading memory cells of an MRAM memory
Grant 6,388,917 - Hoffmann , et al. May 14, 2
2002-05-14
Method For Nondestructively Reading Memory Cells Of An Mram Memory
App 20020018361 - Hoffmann, Kurt ;   et al.
2002-02-14
Method for reading nonvolatile semiconductor memory configurations
App 20020018366 - von Schwerin, Andreas Graf ;   et al.
2002-02-14
Memory configuration including a plurality of resistive ferroelectric memory cells
App 20020018356 - Hoffmann, Kurt ;   et al.
2002-02-14
Configuration for self-referencing ferroelectric memory cells
Grant 6,317,356 - Hoffmann , et al. November 13, 2
2001-11-13
Circuit configuration for generating a reference voltage for reading a ferroelectric memory
App 20010038557 - Braun, Georg ;   et al.
2001-11-08
Resistive ferroelectric memory cell
App 20010038109 - Kowarik, Oskar ;   et al.
2001-11-08
Memory configuration including a plurality of resistive ferroelectric memory cells
App 20010033516 - Kowarik, Oskar ;   et al.
2001-10-25
Semiconductor circuit configuration
App 20010028090 - Braun, Georg ;   et al.
2001-10-11
Integrated buffer circuit which functions independently of fluctuations on the supply voltage
Grant 5,774,014 - Stecker , et al. June 30, 1
1998-06-30
Integrated semiconductor circuit
Grant 5,276,643 - Hoffmann , et al. January 4, 1
1994-01-04
Integrated semiconductor memory of the dram type and method for testing the same
Grant 5,184,326 - Hoffmann , et al. February 2, 1
1993-02-02
Circuit configuration and a method of testing storage cells
Grant 4,956,819 - Hoffmann , et al. September 11, 1
1990-09-11
Multi-stage integrated decoder device
Grant 4,906,994 - Hoffmann , et al. March 6, 1
1990-03-06
Method and circuit configuration of the parallel input of data into a semiconductor memory
Grant 4,885,748 - Hoffmann , et al. December 5, 1
1989-12-05

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