Kim; Unsoon

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kim; Unsoon.The latest application filed is for "method of forming high-voltage transistor with thin gate poly".

Company Profile

10.50.32

Kim; Unsoon - San Jose CA
Kim; Unsoon - Santa Clara CA
Kim; Unsoon - San Clara CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Memory first process flow and device Grant 11,342,429 - Fang , et al. May 24, 2	2022-05-24
Method of Forming High-Voltage Transistor with Thin Gate Poly App 20210296343 - Chen; Chun ; et al.	2021-09-23
Embedded Non-volatile Memory Device And Fabrication Method Of The Same App 20210134811 - Chen; Chun ; et al.	2021-05-06
Memory First Process Flow and Device App 20210091198 - Fang; Shenqing ; et al.	2021-03-25
Charge trapping split gate device and method of fabricating same Grant 10,923,601 - Chen , et al. February 16, 2	2021-02-16
Embedded non-volatile memory device and fabrication method of the same Grant 10,872,898 - Chen , et al. December 22, 2	2020-12-22
Memory first process flow and device Grant 10,818,761 - Fang , et al. October 27, 2	2020-10-27
Memory First Process Flow and Device App 20190386109 - Fang; Shenqing ; et al.	2019-12-19
Split-gate flash cell formed on recessed substrate Grant 10,497,710 - Kang , et al. De	2019-12-03
Method of Forming High-Voltage Transistor with Thin Gate Poly App 20190304990 - Chen; Chun ; et al.	2019-10-03
Memory first process flow and device Grant 10,403,731 - Fang , et al. Sep	2019-09-03
Method of forming high-voltage transistor with thin gate poly Grant 10,242,996 - Chen , et al.	2019-03-26
Method of Forming High-Voltage Transistor with Thin Gate Poly App 20190027487 - Chen; Chun ; et al.	2019-01-24
Embedded Non-volatile Memory Device And Fabrication Method Of The Same App 20190027484 - Chen; Chun ; et al.	2019-01-24
Manufacturing of FET devices having lightly doped drain and source regions Grant 10,177,040 - Fang , et al. J	2019-01-08
Memory First Process Flow and Device App 20180366551 - Fang; Shenqing ; et al.	2018-12-20
Three dimensional capacitor Grant 10,141,393 - Ramsbey , et al. Nov	2018-11-27
Charge Trapping Split Gate Device and Method of Fabricating Same App 20180323314 - Chen; Chun ; et al.	2018-11-08
Memory first process flow and device Grant 10,014,380 - Fang , et al. July 3, 2	2018-07-03
Split-Gate Flash Cell formed on Recessed Substrate App 20180166458 - Kang; Sung-Taeg ; et al.	2018-06-14
Charge trapping split gate device and method of fabricating same Grant 9,966,477 - Chen , et al. May 8, 2	2018-05-08
Charge trapping split gate embedded flash memory and associated methods Grant 9,922,833 - Ramsbey , et al. March 20, 2	2018-03-20
Flash memory cells having trenched storage elements Grant 9,917,211 - Zheng , et al. March 13, 2	2018-03-13
Memory first process flow and device Grant 9,917,166 - Fang , et al. March 13, 2	2018-03-13
Split-gate flash cell formed on recessed substrate Grant 9,853,039 - Kang , et al. December 26, 2	2017-12-26
Manufacturing of FET Devices Having Lightly Doped Drain and Source Regions App 20170221768 - Fang; Shenqing ; et al.	2017-08-03
Memory First Process Flow and Device App 20170141201 - Fang; Shenqing ; et al.	2017-05-18
Memory First Process Flow and Device App 20160293720 - Fang; Shenqing ; et al.	2016-10-06
Memory first process flow and device Grant 9,368,606 - Fang , et al. June 14, 2	2016-06-14
Charge Trapping Split Gate Embedded Flash Memory And Associated Methods App 20160111292 - RAMSBEY; Mark ; et al.	2016-04-21
Memory gate landing pad made from dummy features Grant 9,209,197 - Ramsbey , et al. December 8, 2	2015-12-08
Method for fabricating memory cells having split charge storage nodes Grant 9,159,568 - Lee , et al. October 13, 2	2015-10-13
Process charging protection for split gate charge trapping flash Grant 8,816,438 - Chen , et al. August 26, 2	2014-08-26
Flash Memory Cells Having Trenched Storage Elements App 20140225177 - ZHENG; Wei ; et al.	2014-08-14
System and method for improving reliability in a semiconductor device Grant 8,802,537 - Wu , et al. August 12, 2	2014-08-12
Manufacturing of FET Devices Having Lightly Doped Drain and Source Regions App 20140210012 - FANG; Shenqing ; et al.	2014-07-31
System and method for reducing cross-coupling noise between charge storage elements in a semiconductor device Grant 8,759,894 - Wu , et al. June 24, 2	2014-06-24
Three Dimensional Capacitor App 20140167220 - RAMSBEY; Mark ; et al.	2014-06-19
Memory First Process Flow and Device App 20140167140 - FANG; Shenqing ; et al.	2014-06-19
Charge Trapping Split Gate Embedded Flash Memory and Associated Methods App 20140167141 - RAMSBEY; Mark ; et al.	2014-06-19
Charge Trapping Split Gate Device and Method of Fabricating Same App 20140170843 - CHEN; Chun ; et al.	2014-06-19
Memory Gate Landing Pad Made From Dummy Features App 20140167128 - RAMSBEY; Mark ; et al.	2014-06-19
Process Charging Protection for Split Gate Charge Trapping Flash App 20140167135 - CHEN; Chun ; et al.	2014-06-19
Flash memory cells having trenched storage elements Grant 8,742,486 - Zheng , et al. June 3, 2	2014-06-03
System and method for improving mesa width in a semiconductor device Grant 8,598,645 - Kim , et al. December 3, 2	2013-12-03
Semiconductor memory comprising dual charge storage nodes and methods for its fabrication Grant 8,076,712 - Lee , et al. December 13, 2	2011-12-13
System and method for improving reliability in a semiconductor device Grant 7,985,687 - Hui , et al. July 26, 2	2011-07-26
System And Method For Improving Mesa Width In A Semiconductor Device App 20110037115 - KIM; Unsoon ; et al.	2011-02-17
System and method for improving mesa width in a semiconductor device Grant 7,842,618 - Kim , et al. November 30, 2	2010-11-30
Semiconductor Memory Comprising Dual Charge Storage Nodes And Methods For Its Fabrication App 20100283100 - LEE; Chungho ; et al.	2010-11-11
Dual storage node memory devices and methods for fabricating the same Grant 7,785,965 - Kim , et al. August 31, 2	2010-08-31
Semiconductor memory comprising dual charge storage nodes and methods for its fabrication Grant 7,767,517 - Lee , et al. August 3, 2	2010-08-03
System and method for improving oxide-nitride-oxide (ONO) coupling in a semiconductor device Grant 7,679,129 - Hui , et al. March 16, 2	2010-03-16
Shallow trench isolation approach for improved STI corner rounding Grant 7,439,141 - Kim , et al. October 21, 2	2008-10-21
Semiconductor Memory Comprising Dual Charge Storage Nodes And Methods For Its Fabrication App 20080149999 - Lee; Chungho ; et al.	2008-06-26
Memory cells having split charge storage nodes and methods for fabricating memory cells having split charge storage nodes App 20080142875 - Lee; Chungho ; et al.	2008-06-19
Dual Storage Node Memory Devices And Methods For Fabricating The Same App 20080064165 - Kim; Unsoon ; et al.	2008-03-13
Non-critical complementary masking method for poly-1 definition in flash memory device fabrication Grant 7,307,002 - Kim , et al. December 11, 2	2007-12-11
Method for controlling poly 1 thickness and uniformity in a memory array fabrication process Grant 7,294,573 - Achuthan , et al. November 13, 2	2007-11-13
Flash memory cells having trenched storage elements App 20070205455 - Zheng; Wei ; et al.	2007-09-06
System and method for improving mesa width in a semiconductor device App 20070026675 - Kim; Unsoon ; et al.	2007-02-01
Non-critical complementary masking method for poly-1 definition in flash memory device fabrication App 20060223278 - Kim; Unsoon ; et al.	2006-10-05
Memory device having improved periphery and core isolation Grant 7,078,314 - Kim , et al. July 18, 2	2006-07-18
Self-aligned gate formation using polysilicon polish with peripheral protective layer Grant 6,924,220 - Yang , et al. August 2, 2	2005-08-02
Method for reducing shallow trench isolation edge thinning on tunnel oxides using partial nitride strip and small bird's beak formation for high performance flash memory devices Grant 6,764,920 - Yang , et al. July 20, 2	2004-07-20
Flash memory cell with minimized floating gate to drain/source overlap for minimizing charge leakage Grant 6,693,009 - Kim , et al. February 17, 2	2004-02-17
Shallow trench isolation fill process Grant 6,670,691 - Sachar , et al. December 30, 2	2003-12-30
Non self-aligned shallow trench isolation process with disposable space to define sub-lithographic poly space Grant 6,664,191 - Kim , et al. December 16, 2	2003-12-16
Shallow trench isolation approach for improved STI corner rounding App 20030176043 - Kim, Unsoon ; et al.	2003-09-18
Self-aligned polysilicon polish Grant 6,610,577 - Thomas , et al. August 26, 2	2003-08-26
Hard mask removal process including isolation dielectric refill Grant 6,607,925 - Kim , et al. August 19, 2	2003-08-19
Non-volatile memory dielectric as charge pump dielectric Grant 6,548,855 - Ramsbey , et al. April 15, 2	2003-04-15
Manufacture of semiconductor device with spacing narrower than lithography limit App 20030064585 - Wu, Yider ; et al.	2003-04-03
Formation of STI (shallow trench isolation) structures within core and periphery areas of flash memory device Grant 6,509,232 - Kim , et al. January 21, 2	2003-01-21
Isolation boundaries in flash memory cores Grant 6,040,597 - Kim , et al. March 21, 2	2000-03-21
Core array and periphery isolation technique Grant 6,004,862 - Kim , et al. December 21, 1	1999-12-21
Process for fabricating an integrated circuit with a self-aligned contact Grant 5,907,781 - Chen , et al. May 25, 1	1999-05-25

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