Kianian; Sohrab

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kianian; Sohrab.The latest application filed is for "method for forming a textured surface on a semiconductor substrate using a nanofabric layer".

Company Profile

0.18.20

Kianian; Sohrab - Los Angeles CA
Kianian; Sohrab - Los Altos Hills CA
Kianian; Sohrab - Los Altos CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method For Forming A Textured Surface On A Semiconductor Substrate Using A Nanofabric Layer App 20110034008 - Kianian; Sohrab	2011-02-10
Non-planar non-volatile memory cell with an erase gate, an array therefor, and a method of making same Grant 7,547,603 - Chen , et al. June 16, 2	2009-06-16
Self-aligned method of forming a semiconductor memory array of floating gate memory cells with buried source line and floating gate Grant 7,537,996 - Hu , et al. May 26, 2	2009-05-26
Smart memory card wallet Grant 7,533,063 - Kianian May 12, 2	2009-05-12
Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried bit-line and raised source line, and a memory array made thereby Grant 7,411,246 - Kianian August 12, 2	2008-08-12
Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried bit-line and raised source line, and a memory array made thereby Grant 7,326,614 - Kianian February 5, 2	2008-02-05
Buried bit line non-volatile floating gate memory cell with independent controllable control gate in a trench, and array thereof, and method of formation Grant 7,307,308 - Lee , et al. December 11, 2	2007-12-11
Non-volatile memory cell in a trench having a first portion deeper than a second portion, an array of such memory cells, and method of manufacturing App 20070215931 - Kianian; Sohrab ; et al.	2007-09-20
Method of making a bi-directional read/program non-volatile floating gate memory cell Grant 7,205,198 - Chen , et al. April 17, 2	2007-04-17
Bi-directional read/program non-volatile floating gate memory cell with independent controllable control gates, and array thereof, and method of formation Grant 7,190,018 - Chen , et al. March 13, 2	2007-03-13
Be-directional read/program non-volatile floating gate memory cell with independent controllable control gates, and array thereof, and method of formation App 20070020854 - Chen; Bomy ; et al.	2007-01-25
Non-planar non-volatile memory cell with an erase gate, an array therefor, and a method of making same App 20070007581 - Chen; Bomy ; et al.	2007-01-11
Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried bit-line and raised source line Grant 7,144,778 - Kianian , et al. December 5, 2	2006-12-05
Non-planar non-volatile memory cell with an erase gate, an array therefor, and a method of making same Grant 7,129,536 - Chen , et al. October 31, 2	2006-10-31
Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried bit-line and vertical word line transistor Grant 7,074,672 - Kianian , et al. July 11, 2	2006-07-11
Non-planar non-volatile memory cell with an erase gate, an array therefor, and a method of making same App 20060043459 - Chen; Bomy ; et al.	2006-03-02
Self-aligned method of forming a semiconductor memory array of floating gate memory cells with buried source line and floating gate App 20050269624 - Hu, Yaw Wen ; et al.	2005-12-08
Semiconductor memory array of floating gate memory cells with buried bit-line and raised source line Grant 6,952,033 - Kianian , et al. October 4, 2	2005-10-04
Semiconductor memory array of floating gate memory cells with buried source line and floating gate Grant 6,952,034 - Hu , et al. October 4, 2	2005-10-04
Vertical NROM and methods for making thereof Grant 6,940,125 - Kianian , et al. September 6, 2	2005-09-06
Semiconductor memory array of floating gate memory cells with buried bit-line and vertical word line transistor Grant 6,917,069 - Kianian , et al. July 12, 2	2005-07-12
Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried bit-line and raised source line, and a memory array made thereby App 20050104115 - Kianian, Sohrab	2005-05-19
Method of programming electrons onto a floating gate of a non-volatile memory cell Grant 6,891,220 - Yeh , et al. May 10, 2	2005-05-10
Method of manufacturing an array of bi-directional nonvolatile memory cells Grant 6,861,315 - Chen , et al. March 1, 2	2005-03-01
Method Of Manufacturing An Array Of Bi-directional Nonvolatile Memory Cells App 20050037576 - Chen, Bomy ; et al.	2005-02-17
Buried bit line non-volatile floating gate memory cell with independent controllable control gate in a trench, and array thereof, and method of formation App 20040253787 - Lee, Dana ; et al.	2004-12-16
Bi-directional read/program non-volatile floating gate memory cell with independent controllable control gates, and array thereof, and method of formation App 20040196694 - Chen, Bomy ; et al.	2004-10-07
Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried bit-line and raised source line App 20040191990 - Kianian, Sohrab ; et al.	2004-09-30
Method of programming electrons onto a floating gate of a non-volatile memory cell App 20040183121 - Yeh, Bing ; et al.	2004-09-23
Method Of Operating A Semiconductor Memory Array Of Floating Gate Memory Cells With Buried Bit-line And Vertical Word Line Transistor App 20040160824 - Kianian, Sohrab ; et al.	2004-08-19
Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried bit-line and vertical word line transistor App 20040159864 - Kianian, Sohrab ; et al.	2004-08-19
Vertical NROM and methods for making thereof App 20040031984 - Kianian, Sohrab ; et al.	2004-02-19
Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried bit-line and raised source line, and a memory array made thereby App 20030227048 - Kianian, Sohrab	2003-12-11
Self-aligned method of forming a semiconductor memory array of floating gate memory cells with buried source line and floating gate, and a memory array made thereby App 20030223296 - Hu, Yaw Wen ; et al.	2003-12-04
Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried bit-line and raised source line, and a memory array made thereby App 20030178668 - Kianian, Sohrab ; et al.	2003-09-25
Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried bitline and vertical word line transistor, and a memory array made thereby App 20030073275 - Kianian, Sohrab ; et al.	2003-04-17
Smart memory card wallet App 20020194139 - Kianian, Sohrab	2002-12-19
Electrically erasable and programmable read-only memory having a small unit for program and erase Grant 5,852,577 - Kianian , et al. December 22, 1	1998-12-22

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