Kajiwara; Kengo

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kajiwara; Kengo.The latest application filed is for "three-dimensional memory device with backside support pillar structures and methods of forming the same".

Company Profile

4.7.7

Kajiwara; Kengo - Yokkaichi JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Three-dimensional memory device containing auxiliary support pillar structures and method of making the same Grant 11,398,497 - Kajiwara , et al. July 26, 2	2022-07-26
Three-dimensional Memory Device With Backside Support Pillar Structures And Methods Of Forming The Same App 20220223614 - TAKUMA; Shunsuke ; et al.	2022-07-14
Three-dimensional Memory Device Containing Auxiliary Support Pillar Structures And Method Of Making The Same App 20210358937 - YAMAGUCHI; Kohei ; et al.	2021-11-18
Three-dimensional Memory Device Containing Auxiliary Support Pillar Structures And Method Of Making The Same App 20210358936 - TAKUMA; Shunsuke ; et al.	2021-11-18
Three-dimensional Memory Device Containing Auxilliary Support Pillar Structures And Method Of Making The Same App 20210358941 - KAJIWARA; Kengo ; et al.	2021-11-18
Method for etching bottom punch-through opening in a memory film of a multi-tier three-dimensional memory device Grant 11,018,152 - Hinoue , et al. May 25, 2	2021-05-25
Method For Etching Bottom Punch-through Opening In A Memory Film Of A Multi-tier Three-dimensional Memory Device App 20210005627 - HINOUE; Tatsuya ; et al.	2021-01-07
Memory die containing stress reducing backside contact via structures and method of making the same Grant 10,804,197 - Kawasaki , et al. October 13, 2	2020-10-13
Memory Die Containing Stress Reducing Backside Contact Via Structures And Method Of Making The Same App 20200312765 - KAWASAKI; Motoki ; et al.	2020-10-01
Three-dimensional memory device with discrete self-aligned charge storage elements and method of making thereof Grant 9,991,277 - Tsutsumi , et al. June 5, 2	2018-06-05
Three-dimensional Memory Device With Discrete Self-aligned Charge Storage Elements And Method Of Making Thereof App 20180151588 - Tsutsumi; Masanori ; et al.	2018-05-31
Vertical thin film transistors with surround gates Grant 9,754,999 - Takaki , et al. September 5, 2	2017-09-05
Vertical thin film transistors with surround gates Grant 9,673,257 - Takaki , et al. June 6, 2	2017-06-06
Method of reducing control gate electrode curvature in three-dimensional memory devices Grant 9,589,839 - Ikawa , et al. March 7, 2	2017-03-07

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